Analysis of a Resonant Converter with Wide Input Voltage

Abstract

A DC-DC converter with a 16:1 (V_in,max = 16V_in,min) wide input voltage operation is presented for auxiliary power supplies on solar power conversion circuits or railway vehicles. The solar cell output voltage is associated with the solar intensity (day or night) and geographical location. Thus, the wide input voltage capability of DC converters is required for photovoltaic power conversion. For low power supplies on railway vehicles, the nominal input voltages are 24 V~110 V for the electric door system, motor drive, solid state lighting systems and braking systems. The presented converter uses buck/boost and resonant circuits to achieve the wide input voltage range operation from 18 V to 288 V. If V_in stays on a low input voltage range (18 V~72 V), the buck/boost circuit is operated at a voltage boost characteristic. On the other hand, the buck/boost circuit is operated at a voltage buck characteristic when the input voltage climbs to a high voltage range (72 V~288 V). Thus, the buck/boost circuit can output a constant voltage. Then, the resonant circuit in the second stage is worked at a constant input voltage case so that the frequency variation range is reduced. Finally, to investigate the performance and effectiveness of the studied circuit, experiments with a 500 W prototype were conducted to investigate the performance of the studied circuit.

1. Introduction

Wide voltage range DC-DC converters have been discussed and presented for solar cell power conversion due to the variable output voltage of the photovoltaic panel. The output voltage of a photovoltaic panel depends on the solar intensity of the day and night. Therefore, DC converters with a wide voltage range are developed for solar power conversion and the self-supplying power units are developed for remote control systems. Wide voltage DC-DC converters are also needed on a railway vehicle due to many different nominal DC voltages (24 V~110 V) that are requested for the communication system, lighting system, electric door system and braking system. Thus, pulse-width modulation (PWM) converters with a wide voltage operation are welcomed and demanded on railway power supply units. Multi-stage converters [1,2] have been proposed to actualize the wide voltage capability operation. The buck or boost circuit topology is selected on the front-stage to achieve a buck or boost operation. The flyback, forward or half-bridge circuit topology with pulse-width modulation is adopted on the rear-stage to regulate output voltage. However, these solutions have high switching losses on power devices and the input voltage range is still limited at V_in,max ≤ 4V_in,min or V_in,max ≤ 6V_in,min. Series-parallel connection DC converters have been discussed in [3,4,5]. Unfortunately, the circuit structure is too complicated and more expensive for use in low or medium power supplies. Single-stage DC converters with a PWM operation were discussed in [6,7,8,9,10,11,12] to extend the input voltage range. However, the input voltage range in [6,7,8,9,10,11,12] is still limited at V_in,max ≤ 4V_in,min. In [13], the thermal constraints issue has been discussed for a current-mode monolithic DC-DC converter.

In this paper, we present and investigate a DC-DC converter that has a 16:1 (V_in = 288 V~18 V) wide voltage operation and soft switching turn-on operation. To realize a 16:1 wide voltage operation, a buck/boost DC-DC circuit is utilized in the first stage to accomplish either a voltage boost action if the V_in is on a low input voltage range (V_in,min < V_in < 4V_in,min) or a voltage buck action if the V_in is on a high input voltage range (4V_in,min < V_in < 16V_in,min). Therefore, the output terminal voltage of the buck/boost converter is controlled at a constant value. An LLC converter is used in the rear-stage to control the output voltage while accomplishing zero voltage switching (ZVS) for active devices. Since the input voltage of the LLC converter is almost constant due to the buck/boost converter regulation, the variation in switching frequency is limited to a narrow frequency range. Compared to conventional DC-DC converters and multi-stage converters, the main contributions in this paper are (1) the wide voltage range action, (2) the soft switching operation in the second stage circuit, and (3) the simple control scheme. The converter characteristics are confirmed by the experiments using a prototype circuit.

2. Circuit Structure

Figure 1 provides the circuit schematic of the presented PWM converter with the function of a 16:1 voltage range operation for PV panel power converters or the auxiliary power on railway vehicles. The presented circuit is a two-stage DC converter. The front-stage is a buck/boost circuit and the rear-stage is an LLC converter. The components of a buck/boost circuit include Q₁, D₁, L_f, Q₂, D₂ and C_dc. The LLC converter includes L_r, S₁, S₂, T, C_r, D_o1, D_o2 and C_o. The buck/boost circuit can achieve a wide input voltage range operation. When V_in < V_dc, the buck/boost circuit is operated at a voltage boost. On the other hand, the buck/boost circuit is worked at a buck operation if V_in > V_dc. The LLC resonant circuit in the rear-stage is operated at a constant input voltage V_dc condition. Therefore, the switching frequency of a resonant circuit can be designed at a series resonant frequency to lessen the magnetizing current losses, while, at the same time, having ZVS characteristics for switches S₁ and S₂ and diodes D_o1 and D_o2. According to the input voltage range, the presented converter can be operated at two voltage ranges (V_in,min~4V_in,min) and (4V_in,min~16V_in,min). When V_in is greater than V_in,min and less than 4V_in,min, the switch Q₁ is on, diode D₁ is on the reverse biased and Q₂ is controlled with pulse-width modulation. Thus, the buck/boost circuit is worked like a boost converter to achieve a voltage step-up characteristic, as shown in Figure 2a. The DC bus voltage V_dc is controlled at the reference voltage V_dc,ref and the LLC resonant circuit is controlled at a constant input voltage case. When 4V_in,min < V_in < 16V_in,min, switch Q₂ is off and switch Q₁ is controlled with a pulse-width modulation scheme to control the DC bus voltage V_dc = V_dc,ref. Thus, the buck/boost converter is working as a buck converter to achieve a voltage step-down characteristic, as shown in Figure 2b. According to the adopted control algorithm, the studied converter has a 16:1 (V_in,max = 16V_in,min) voltage range operation for a solar PV panel power conversion and a railway vehicle with low power supplies and applications.

3. Operation Principle

The studied converter is a two-stage circuit. The front-stage is a buck/boost converter to achieve either a voltage boost action if V_in is on a low input voltage range or a voltage buck action if V_in is on a high input voltage range. The buck/boost converter is regulated by a pulse-width modulation. The second stage is an LLC resonant converter to accomplish both electric isolation and a ZVS turn-on operation for active devices.

3.1. Circuit Operation of the Buck/Boost Converter

The buck/boost converter can work at a voltage boost operation or buck operation. To accomplish a wide voltage operation, the DC bus voltage of the buck/boost converter is controlled at V_dc = 4V_in,min. When V_in,min ≤ V_in < 4V_in,min, the buck/boost converter operates at a boost operation (Figure 2a)and Q₁ is on, diode D₁ is off and Q₂ is controlled by a pulse-width modulation to have a voltage boost action. Figure 3a gives the PWM signals of the buck/boost converter for a voltage step-up action. Under a continuous conduction mode operation, two circuit modes are observed (Figure 3b,c). Based on a voltage-second balance on the inductor L_f, the DC bus voltage V_dc is obtained as d_Q1V_in/(1 − d_Q2) = V_in/(1 − d_Q2) where d_Q1 and d_Q2 are duty cycles of Q₁ and Q₂, respectively, and d_Q1 = 1 under the boost operation.

Mode 1 [t₀~t₀ + d_Q2T_sw]: At t = t₀, Q₂ is activated to turn on. Since Q₁ is always on and D₁ is reverse biased for the voltage boost operation, the voltage across on L_f can be obtained as v_Lf = V_in and v_D2 is −V_DC. The inductor current i_Lf increases and the diode D₂ is reverse biased. Capacitor C_dc is discharged to supply current i_dc to the secondstage resonant converter.

Mode 2 [t₀ + d_Q2T_sw~t₀ + T_sw]: At t = t₀ + d_Q2T_sw, Q₂ is turned off. The inductor i_Lf flows through D₂ to charge C_dc. The inductor voltage v_Lf = V_in − V_dc < 0 so that i_Lf decreases. The drain-to-source voltage of Q₂ is equal to the DC bus voltage V_dc. Mode 2 is ended at time t₀ + T_sw.

When 4V_in,min < V_in ≤ 16V_in,min, the buck/boost converter operates as a voltage step-down operation (Figure 2b). The switch Q₂ is controlled at an off state, diode D₂ is always conducting and Q₁ is activated by pulse-width modulation to accomplish a voltage step-down. The pulse-width modulation waveforms of the voltage step-down operation are given in Figure 4a and two circuit modes are shown in Figure 4b,c under a continuous conduction mode. Based on a flux balance on inductor L_f, the DC bus voltage V_dc is calculated as d_Q1V_in/(1 − d_Q2) = d_Q1V_in where d_Q2 = 0 under the buck operation.

Mode 1 [t₀~t₀ + d_Q1T_sw]: At time t₀, Q₁ turns on. Since Q₂ is always off and D₂ is forward biased for the voltage step-down operation, the inductor voltage v_Lf = V_in − V_dc > 0 and v_D1 is −V_in. In this mode, i_Lf increases, the D₁ is reverse biased and C_dc is charged.

Mode 2 [t₀ + d_Q1T_sw~t₀ + T_sw]: At time t₀ + d_Q1T_sw, Q₁ turns off. In mode 2, v_Lf = −V_dc, i_Lf decreases, v_Q1,ds = V_in, v_Q2,ds = V_dc and C_dc is discharged. This mode ends at time t₀ + T_sw.

3.2. Circuit Operation of the LLC Resonant Circuit

Since the DC bus voltage V_dc is a constant voltage due to the buck/boost circuit operation, the LLC resonant converter is operated under almost constant voltage V_dc. Thus, the switching frequency of the LLC resonant circuit is controlled at a limited narrow frequency range. The converter voltage gain is calculated as G_LLC = 2nV_o/V_dc = 2nV_o (1 − d_Q2)/d_Q1V_in. Figure 5a gives the main circuit waveforms of the resonant converter and Figure 5b–g shows the six mode operations.

Mode 1 [t₀~t₁]: At time t < t₀, the active device S₁ is off, v_CS1 is positive and i_Lr is negative. At time t₀, v_CS1 = 0 and D_S1 is conducting. After time t₀, S₁ can turn on at the ZVS action. Since D_o1 is conducting, v_Lm = nV_o. Power is delivered to a load side through the components S₁, L_r, T, C_r and D_o1. L_r and C_r are naturally resonant, with frequency $f_r=1/2\pi \sqrt{L_r{C}_r}$. If f_r is greater than the switching frequency f_sw, then the circuit proceeds to mode 2, or it goes to mode 3.

Mode 2 [t₁~t₂]: Since f_r > f_sw, i_Do1 will decrease to 0 at t₁. D_o1 is off. i_Lr will flow through S₁, L_m, L_r and C_r. Together with L_r and L_m, C_r is naturally resonant, with frequency $f_m=1/2\pi \sqrt{(L_m+L_r)C_r}$ and f_m < f_r.

Mode 3 [t₂~t₃]: Active device S₁ is turned off at time t₂ under zero voltage. After time t₂, i_Lr > 0 and i_Lr < i_Lm. Thus, C_S2 (C_S1) discharges (charges) and the secondary diode D_o2 conducts.

Mode 4 [t₃~t₄]: At time t₃, C_S2 is discharged to zero and D_S2 is conducting due to i_Lr(t₃) > 0. After t₃, S₂ turns on under zero voltage. D_o2 is forward biased on the secondary side, v_Lm = −nV_o. Energy stored on C_r is transferred to the output load. L_r and C_r are naturally resonant, with frequency f_r.

Mode 5 [t₄~t₅]: If f_sw < f_r, then i_D2 will decrease to 0 at t₄. D_o2 is reverse biased. No power is delivered to the output load. L_r, L_m and C_r are naturally resonant, with frequency f_m.

Mode 6 [t₅~T_sw + t₀]: S₂ turns off at time t₅. C_S1 (C_S2) discharges (charges) and D_o1 conducts because the i_Lr(t₅) < 0 and i_Lr(t₅) > i_Lm(t₅). Mode 6 ends at time T_sw + t₀.

4. Circuit Characteristics

The buck/boost converter is operated by a 16:1 wide voltage range operation. The output voltage V_dc of the buck/boost converter is controlled at V_dc,ref = 4V_in,min. If V_in is on a low voltage range (V_in < V_dc,ref = 4V_in,min), then the converter is operated at the boost operation. As a result, Q₁ stays on, Q₂ is operated by a duty cycle control and D₁ is reverse biased. When V_in is on a high input voltage range (V_in > V_dc,ref = 4V_in,min), the converter is operated at a buck operation. As a result, Q₂ stays off and Q₁ is operated by pulse-width modulation. Thus, the LLC resonant circuit is operated at a constant input voltage of V_dc = 4V_in,min. The buck/boost converter is controlled at a continuous conduction mode. For the boost operation, V_Lf = V_in (or V_in − V_o) if Q₂ is on (or off) as shown in Figure 3. For the buck operation, V_Lf = V_in − V_o (or −V_o) if Q₁ is on (or off) as shown in Figure 4. For a continuous conduction mode, the DC bus voltage V_dc is calculated as:

$$V_{dc}=\{\begin{array}{ll}{V}_{in}/(1-d_{Q2}),& V_{in}<V_{dc,ref}=4V_{in,min}\\ d_{Q1}{V}_{in},& V_{in}>V_{dc,ref}=4V_{in,min}\end{array}$$

(1)

where d_Q1 and d_Q2 are duty cycles of Q₁ and Q₂, respectively. V_in is greater than V_in,min and less than 4V_in,min on the low voltage range. Therefore, the maximum and minimum duty cycles of Q₂ are expressed as:

$$d_{Q2,max}=(V_{dc,ref}-V_{in,min})/V_{dc,ref}$$

(2)

$$d_{Q2,min}=(V_{dc,ref}-4V_{in,min})/V_{dc,ref}$$

(3)

In the same manner, the maximum and minimum duty cycles of Q₁ are expressed as (4) and (5) on the high input voltage range (4V_in,min < V_in < 16V_in,min).

$$d_{Q1,max}=V_{dc,ref}/4V_{in,min}$$

(4)

$$d_{Q1,min}=V_{dc,ref}/16V_{in,min}$$

(5)

If the DC bus current and d_Q1 and d_Q2 are given, then the root mean square (rms) currents I_Q1,rms and I_Q2,rms are obtained in (6) and (7).

$$I_{Q1,rms}=\{\begin{array}{ll}{I}_{dc}/(1-d_{Q2}),& V_{in}<V_{dc,ref}=4V_{in,min}\\ \sqrt{d_{Q1}}{I}_{dc},& V_{in}>V_{dc,ref}=4V_{in,min}\end{array}$$

(6)

$$I_{Q2,rms}=\{\begin{array}{ll}{I}_{dc}\sqrt{d_{Q2}}/(1-d_{Q2}),& V_{in}<V_{dc,ref}=4V_{in,min}\\ 0,& V_{in}>V_{dc,ref}=4V_{in,min}\end{array}$$

(7)

From the on/off states of Q₁, Q₂, D₁ and D₂, the voltage ratings of Q₁ and Q₂ are V_in,max and V_dc, respectively. The average currents I_D1 and I_D2 are obtained in (8) and (9).

$$I_{D1}=\{\begin{array}{ll}0,& V_{in}<V_{dc,ref}=4V_{in,min}\\ (1-d_{Q1})I_{dc},& V_{in}>V_{dc,ref}=4V_{in,min}\end{array}$$

(8)

$$I_{D2}=I_{dc}$$

(9)

V_in,max and V_dc are the voltage ratings of D₁ and D₂ respectively. Based on the boost or buck operation, the rms inductor current is calculated as:

$$I_{Lf,rms}=\{\begin{array}{ll}{I}_{dc}/(1-d_{Q2}),& V_{in}<V_{dc,ref}=4V_{in,min}\\ I_{dc},& V_{in}>V_{dc,ref}=4V_{in,min}\end{array}$$

(10)

The half-bridge resonant circuit is controlled with pulse frequency modulation. Since S₁ and S₂ have a 50% duty cycle, a square wave voltage waveform with 0 and V_dc is generated on voltage v_ab. The rms value of v_ab approximates $V_{ab,rms}=\sqrt{2}{V}_{dc}/\pi$. According to the conducting states of D_o1 and D_o2, a square voltage waveform is generated on the magnetizing voltage v_Lm and $V_{Lm,rms}=2\sqrt{2}n{V}_o/\pi$. The fundamental primary-side resistance is calculated as $R_{ac}=8n^2{R}_o/{\pi }^2$, where R_o is the DC load resistance. Since the resonant tank (L_m, C_r, L_r and R_ac) is adopted in the rear-stage, in (11) the voltage transfer function of the resonant tank is obtained.

$$\begin{array}{ll}\left|G_{LLC}\right|& =\frac{V_{Lm,rms}}{V_{ab,rms}}=|\frac{R_{ac}//j2\pi f_{sw}{L}_m}{j2\pi f_{sw}{L}_r+{\left(j2\pi f_{sw}{C}_r\right)}^{-1}+R_{ac}//j2\pi f_{sw}{L}_m}|\\ & =\frac{1}{\sqrt{{[1+\frac{1}{L_B}\frac{f_n^2-1}{f_n^2}]}^2+Q^2{[\frac{f_n^2-1}{f_n}]}^2}}=\frac{2n{V}_o}{V_{dc}}\end{array}$$

(11)

where L_B = L_m/L_r, $Q=\sqrt{L_r/C_r}/R_{ac}$ and f_n = f_sw/f_r. Since the DC bus voltage V_dc is regulated at V_dc,ref by the front-stage buck/boost circuit, the switching frequency f_sw depends on I_o or R_o. The LLC resonant circuit is controlled at an inductive load. Therefore, active devices of the resonant circuit are operated using a soft switching operation.

5. Experimental Results

The studied circuit is tested and investigated to show the performance of the prototype circuit. The prototype is designed under the following specifications: V_in = 288 V~18 V (16:1 ratio), V_o = 12 V, P_o,rated = 500 W and f_r = 60 kHz. When V_in = 18 V~65 V, the buck/boost converter is controlled at boost operation. The voltage V_dc is maintained at 72 V. If the input voltage V_in = 76 V~288 V, then the buck/boost converter is operated at a buck operation and the DC bus voltage V_dc = 72 V. However, no voltage step-up or step-down is operated on the buck/boost converter when 65 V < V_in < 76 V. Q₁ (Q₂) is on (off) under this condition and V_dc = V_in. Therefore, the resonant circuit is designed under the input of a DC bus voltage V_dc = 65 V~76 V. Two Schmitt voltage comparators are used to detect the three input voltage ranges 18 V~65 V, 65 V~76 V and 76 V~288 V. If V_in is on a low voltage range (18 V~65 V), Q₂ is controlled by a duty cycle scheme to achieve a boost operation. The duty cycle of Q₂ is calculated in (12) and (13) under continuous conduction mode.

$$d_{Q2,min}=\frac{V_{dc,ref}-V_{in,high}}{V_{dc,ref}}=\frac{72-65}{72}\approx 0.1$$

(12)

$$d_{Q2,max}=\frac{V_{dc,ref}-V_{in,low}}{V_{DC,ref}}=\frac{72-18}{72}\approx 0.75$$

(13)

For a high input voltage range of 76 V~288 V, Q₁ is controlled by a duty cycle scheme to achieve a buck operation. The duty cycle of Q₁ is given in (14) and (15) under continuous conduction mode.

$$d_{Q1,min}=\frac{V_{dc,ref}}{V_{in,high}}=\frac{72}{288}\approx 0.25$$

(14)

$$d_{Q1,max}=\frac{V_{dc,ref}}{V_{in,low}}=\frac{72}{76}\approx 0.95$$

(15)

It is assumed that the ripple current Δi_Lf is 5% of the maximum input current at 18 V of input voltage. Therefore, inductance L_f is given in (16).

$$L_f=\frac{V_{in,min}{d}_{Q2,max}}{\mathsf{\Delta }{i}_{Lf}{f}_{sw}}=\frac{18\times 0.75}{0.04\times (500/18)\times 60\times {10}^3}\approx 203\mathsf{\mu }\mathrm{H}$$

(16)

The rms switch currents I_Q1,rms and the I_Q2,rms are expressed in (17) and (18).

$$I_{Q1,rms}=\{\begin{array}{l}\frac{I_{dc}}{1-d_{Q2,max}}=\frac{500/72}{1-0.75}\approx 28\mathrm{A}, 18\mathrm{V}<V_{in}<65\mathrm{V}\\ \sqrt{d_{Q1,max}}{I}_{dc}=\sqrt{0.95}\frac{500}{72}\approx 6.8\mathrm{A}, 76\mathrm{V}<V_{in}<288\mathrm{V}\end{array}$$

(17)

$$I_{Q2,rms}=\{\begin{array}{l}\frac{I_{dc}\sqrt{d_{Q2,max}}}{1-d_{Q2,max}}=\frac{\frac{500}{72}\sqrt{0.75}}{1-0.75}\approx 24,18\mathrm{V}<V_{in}<65\mathrm{V}\\ 0,\hspace{1em}76\mathrm{V}<V_{in}<288\mathrm{V}\end{array}$$

(18)

The voltage ratings of Q₁ and Q₂ are V_in,max = 288 V and V_dc,max = 76 V. Switch Q₁ used two MOSFETs STB35N60DM2 (STMicroelectronics, Geneva, Switzerland) with 600 V/28 A ratings, while switch Q₂ adopted MOSFET IRFB4110PbF (Infineon Technologies, Neubiberg, Germany) with 100 V/120 A ratings. The average diode currents of D₁ and D₂ are obtained in (19) and (20).

$$I_{D1}=\{\begin{array}{ll}0,& 18\mathrm{V}<V_{in}<65\mathrm{V}\\ (1-d_{Q1,min})I_{dc}\approx 5.2\mathrm{A},& 76\mathrm{V}<V_{in}<288\mathrm{V}\end{array}$$

(19)

$$I_{D2}=I_{dc}=500/72\approx 7\mathrm{A}$$

(20)

D₁ has a voltage stress of V_in,max = 288 V and D₂ has a voltage stress of V_dc,max = 76 V. SF1006G (TSMC, Hsinchu, Taiwan) and STPS20SM100S (STMicroelectronics, Geneva, Switzerland) with 400 V/10 A and 100 V/20 A ratings are used for diodes D₁ and D₂, respectively.

For the LLC resonant circuit design, the necessary resonant frequency and inductor ratio are selected as f_r = 60 kHz and L_B = 8. The minimum, nominal and maximum DC bus voltages are 65 V, 72 V and 76 V, respectively. The nominal voltage gain of G_nom at V_dc,nom = 72 V is designed at unity. Therefore, the turn-ratio n of the transformer is calculated as follows.

$$n=\frac{G_{LLC,nom}{V}_{dc,nom}}{2V_o}=\frac{1\times 72}{2\times 12}\approx 3$$

(21)

The TDK EER42 with n_s = 4 and n_p = 12 is used for the transformer T. Thus, the voltage gains G_LLC,max and G_LLC,min at V_dc = 65 V and 76 V are calculated in (22) and (23).

$$G_{LLC,max}=\frac{2n{V}_o}{V_{dc,min}}=\frac{2\times 3\times 12}{65}\approx 1.1$$

(22)

$$G_{LLC,min}=\frac{2n{V}_o}{V_{dc,max}}=\frac{2\times 3\times 12}{76}\approx 0.95$$

(23)

For full rated power, the fundamental primary-side resistance R_ac is obtained in (24).

$$R_{ac}=\frac{8n^2{R}_o}{{\pi }^2}=\frac{8\times 3^2\times ({12}^2/500)}{{\pi }^2}\approx 2.1\mathsf{\Omega }$$

(24)

The selected quality factor Q is 0.7. From the given Q, R_ac and f_r, the resonant inductance L_r is obtained as:

$$L_r=\frac{Q{R}_{ac}}{2\pi f_r}=\frac{0.7\times 2.1}{2\pi \times 60000}\approx 3.9\mathsf{\mu }\mathrm{H}$$

(25)

due to L_B = 8, L_m = L_B × L_r = 31.2 μH. C_r can be calculated as:

$$C_r=\frac{1}{4{\pi }^2{L}_r{f}_r^2}=\frac{1}{4{\pi }^2\times 3.9\times {10}^{-6}\times {(60000)}^2}\approx 1.8\mathsf{\mu }\mathrm{F}$$

(26)

The voltage ratings of S₁ and S₂ equal V_dc,max = 76 V and the voltage rating of diodes D_o1 and D_o2 equals 2V_o = 24 V. Power switches IPP111N15N3 (150 V/83 A) are adopted for active devices S₁ and S₂ and S60SC6M (60 V/60 A) (Shindengen Electric Manufacturing, Tokyo, Japan) switches are selected for D_o1 and D_o2. The selected C_dc = 680 μF and C_o = 1000 μF. UC3843 (Texas Instruments, Dallas, TX, USA) is selected to regulate the buck/boost circuit while the UCC25600 (Texas Instruments, Dallas, TX, USA) is adopted to regulate the LLC resonant circuit.

Figure 6 illustrates the experiments of the presented converter at V_in = 18 V and the rated power. Since V_in = 18 V < V_dc = 72 V, the buck/boost converter is operated at a boost operation. Therefore, Q₁ is on and Q₂ is controlled by the duty cycle modulation. Figure 6a shows the experimental waveforms of v_Q2,g, i_Lf, i_Q2 and i_D2. When Q₂ is on or off, the i_Lf equals i_Q2 or i_D2. Figure 6b provides the test results of the input voltage V_in, dc bus voltage V_dc, the gate voltage v_Q2,g and leg voltage v_ab. The duty cycle of Q₂ equals 0.75, V_dc > V_in (boost operation) and the leg voltage v_ab is a square voltage. Figure 6c gives the primary-side experimental waveforms of the LLC resonant circuit at full load. As the switching frequency is close to the resonant frequency, v_Cr and i_Lr are sinusoidal waveforms and v_ab is a square waveform. Since the half-bridge LLC is controlled in the second stage, the v_Cr contains a DC voltage value (v_Cr,dc = V_dc/2). Figure 6d provides the secondary side currents and load voltage at full load. The output voltage is regulated at 12 V and the load current I_o = 42 A. No serious reverse recovery current is observed on the rectifier diodes D_o1 and D_o2. In the same manner, Figure 7 illustrates the experiments at V_in = 65 V and the rated power conditions. Since V_in = 65 V < V_dc = 72 V, the duty cycle of Q₂ is calculated as 0.1. The measured waveforms v_Q2,g, i_Lf, i_Q2 and i_D2 are shown in Figure 7a. The experimental waveforms V_in, V_dc, v_Q2,g and v_ab are illustrated in Figure 7b. The experimental waveforms of the resonant converter are provided in Figure 7c,d. Since V_dc = 72 V by the buck/boost converter for both V_in = 18 V and 65 V, it can be seen that the measured waveforms of the resonant converter under V_in = 18 V (Figure 6c,d) and V_in = 65 V (Figure 7c,d) are identical. Figure 8 and Figure 9 show the experiments of the proposed circuit for V_in = 76 V and 288 V input on the high input voltage range and rated power. When the input voltage ranges between 76 V and 288 V, the buck/boost circuit is controlled at a buck operation and Q₂ is off. The duty cycle of Q₁ equals 0.95 (0.25) at V_in = 76 V (288 V). The measured waveforms of v_Q1,g, i_Lf, i_Q1 and i_D1 at V_in = 76 V and 288 V are illustrated in Figure 8a and Figure 9a. The buck/boost converter is operated at a buck operation and V_dc is controlled at 72 V for both V_in = 76 V and V_in = 288 V. The experiments of the resonant converter for a 76 V (288 V) input are shown in Figure 8c,d (Figure 9c,d). When 65 V < V_in < 76 V, Q₁ is on and Q₂ is off. No voltage step-up or step-down is realized on the buck/boost converter so that the DC bus voltage V_dc = V_in. Under this condition, only the resonant converter is worked to regulate the load voltage. Figure 10 and Figure 11 provide the measured waveforms of the resonant circuit at 67 V and 74 V input and the rated power. When V_dc = 67 V, the resonant converter needs more voltage gain compared to V_dc = 72 V and f_sw < f_r. Thus, i_Lr likes a quasi-sinusoidal signal in Figure 10a and D_o1 and D_o2 are turned off at zero current switching in Figure 10b. In the same manner, the switching frequency at V_dc = 74 V shown in Figure 11 is greater than the resonant frequency in order to achieve a lower voltage gain. Figure 12 illustrates the experiments of S₁ at V_in = 18 V, 67 V, 74 V and 288 V. Figure 12a,b shows the experimental waveforms of S₁ under 20% load and full load at V_in = 18 V condition. In the same manner, Figure 12c,d gives the measured results of S₁ at 67 V input. Figure 12e,f provides the test results of S₁ at 74 V input. Likewise, Figure 12g,h shows the experimental waveforms of S₁ at 288 V input (high input voltage range). From the test results in Figure 12, it can be seen that S₁ turns on at ZVS from a 20% load for all input voltage ranges and turns off at hard switching. Since switch S₂ possesses the same switching characteristics as S₁, it can be expected that S₂ also turns on under zero voltage from a 20% load and turns off at hard switching.

6. Conclusions

A wide input voltage (18 V~288 V) DC converter is discussed and examined for railway vehicles or for PV power conversion. To realize a 16:1 wide input voltage demand, a buck/boost circuit is used to accomplish the boost operation if V_in is on a low input voltage range and a buck operation if V_in is on a high input voltage range. Therefore, the DC bus voltage after the buck/boost converter is kept at a constant voltage. The resonant converter is employed on the rear-stage to achieve electric isolation and have a soft switching operation for active switches and power diodes. Since the LLC resonant converter is operated at a constant input voltage, the switching frequency variation is limited at a narrow frequency range. The performance of the studied circuit is investigated and examined through the test results.