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Article
Peer-Review Record

Machine-Learning-Based Compact Modeling for Sub-3-nm-Node Emerging Transistors

Electronics 2022, 11(17), 2761; https://doi.org/10.3390/electronics11172761
by SangMin Woo, HyunJoon Jeong, JinYoung Choi, HyungMin Cho, Jeong-Taek Kong * and SoYoung Kim *
Reviewer 1: Anonymous
Reviewer 2: Anonymous
Reviewer 3: Anonymous
Electronics 2022, 11(17), 2761; https://doi.org/10.3390/electronics11172761
Submission received: 27 July 2022 / Revised: 28 August 2022 / Accepted: 29 August 2022 / Published: 1 September 2022
(This article belongs to the Special Issue Advanced CMOS Devices and Applications)

Round 1

Reviewer 1 Report

In this work, authors discuss present an ANN based compact modeling for sub-3 nano meter node emerging transistors. The authors apply their model to evaluate the characteristics of NSFETs which are regarded as next generation nano devices. The authors claim that their proposed model predicts the I-V and C-V characteristics with high accuracy and speed. Authors further claim that their proposed ANN-based compact model gives better speed and accuracy as compared to existing BSIM-CMG reference compact model. The idea of the paper is very interesting and can be considered for the publication after revision. However, authors need to address following comments before the paper is considered for publication. The overall expression of the paper is clear. However, authors need to further work on it and correct the small grammatical mistakes in the paper. Moreover, the authors have used ANN in this work. The authors did not clearly explain their motivation for using ANN. How ANN are better/worse than other ML algorithms. There should be a detailed discussion on this matter in the revised version. For SPICE simulation, the authors use three simple components like XOR gate, ring oscillator, and SRAM. It would have been better, if authors had tried some more complex circuits.

 

Author Response

"Please see the attachment."

Author Response File: Author Response.pdf

Reviewer 2 Report

The paper has been written in a very good manner. However, it would be much better if the results presented could be compared with some experimental data or may be verified using some analytical model.

Author Response

"Please see the attachment."

Author Response File: Author Response.pdf

Reviewer 3 Report

This work reports on an ANN-based model to assess the characteristics of NSFET-transistor. The ANN-based model presented here is promising (speed and accuracy wise) for simulating device characteristics and circuit performances.

Do the authors consider any temperature effects in the simulation conditions?

Author Response

"Please see the attachment."

Author Response File: Author Response.pdf

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