Timing-Driven Simulated Annealing for FPGA Placement in Neural Network Realization

Round 1

Reviewer 1 Report

Optimizing component placement and connection routing in FPGAs is an important issue. The authors of this paper proposed their own algorithm, which they described and implemented and carried out simulation studies.
It is a pity that they only focused on the synthesis of FPGAs and did not address the capabilities and parameters that are achievable in ASICs of quantum computers.
You cannot agree with the statement in the first paragraph of the Introduction that ASICs achieve worse dynamic performance than FPGAs. Practice contradicts this, ASICs that are functionally equivalent to FPGAs and ASICs developed on the basis of FPGAs (e.g., the Hardcopy series): occupy a smaller area, consume less power supply, and operate at higher frequencies. Dedicated circuits always achieve higher frequencies than universal FPGAs, just compare the operating frequencies of computer processors and FPGAs. It would be worthwhile to elaborate on this point in the Introduction with specific examples that would support the thesis there.

Please include the concrete example of the implementation of your method, to build a neural network - the content of the article must relate to its title. I request to complete your article in this regard.

I ask to correct the conclusion, because as presented - it is an abbreviation of the content of the work. Only the last two sentences in the conclusion will assess the quality of the results obtained.
The focus in this section should be on comparing the results obtained with other methods - not just one, the advantages and disadvantages of the new method should also be evaluated.

On the merits, I do not have any major objections, and I believe that with a minor editorial correction this work can be published in the scope presented.

Please standardize the way you write people's names throughout your work. An example of inconsistency - page 2 paragraph 3: once is ... BETZ V and ROSE J proposed ..., elsewhere ... Mohamed A Elgammal[2] introduced ..., or ... In 2018, Yuan et al. [12] ... .

Literature citation in the text of the paper should be separated by the space from the adjacent word, example page 2 paragraph 3, is: "Elgammal[2]", should be "Elgammal [2]".

There are too many short paragraphs in the work - example description of pattern 1 on page 3:
... In the equation, slack(i, j) represents the slack time, .... - for what purpose the paragraph in this line is used and the sentence begins with a capital letter ? After all, it is the continuation of the same thought, that is, the description of the equation.

You should avoid beginning adjacent sentences in an identical way - example page 6 description of equation 8:
(paragraph) For high criticality ... ,
(paragraph) For low-delay ... .

In general, the text of the article is understandable.

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Reviewer 2 Report

 The paper describes a proposed method for optimizing the block placements in FPGA. I have some general questions or comments for the authors: Please comment.

- FPGA manufacturers certainly have many designers to optimize placement and routing tasks, so I wonder how researchers, regardless and despite their skills, can better accomplish the same task. Additionally, many parameters used by silicon foundries are not available to users, and this applies to both ASIC and FPGA foundries.

- In the paper the percentage of use of the FPGA seems not to be considered even if it is a parameter that significantly affects the implementations in the place and the route process. I guess this parameter can't be ruled out in the simulated annealing process.

- In the Introduction authors say "FPGAs utilize a predesigned routing structure and cannot achieve the high clock frequencies", which is questionable since the FPGAs use today much more efficient and deep submicron technologies that those available for the use of the ASICs. Please comment

Author Response

Please see the attachment.

Author Response File: Author Response.pdf