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Article

Reduced-Complexity Tracking Algorithms on Chip for Real-Time Location Estimation

Department of Electronic Engineering, Chung Yuan Christian University, No. 200 Chungpei Rd., Chungli District, Taoyuan City 320314, Taiwan
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Authors to whom correspondence should be addressed.
Electronics 2023, 12(3), 739; https://doi.org/10.3390/electronics12030739
Submission received: 29 November 2022 / Revised: 15 January 2023 / Accepted: 29 January 2023 / Published: 1 February 2023

Abstract

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This article puts forward a low-complexity filtering algorithm to achieve a low-complexity filtering chip design for real-time location tracking. In order to meet the need for low-complexity and real-time, the positioning tracking algorithm based on Kalman Filter (KF) is proposed. The KF itself has the functions of tracking, predicting, etc., which can correct the positioning into more accurate results. However, in the calculation of KF algorithms, each iteration often requires tedious and complex calculations of Kalman Gain (KG). Both software and hardware are very resource-intensive. Therefore, use the feature of KG in alpha-beta (α-β) filtering algorithm which can gradually balance in each iteration. Proposed a filtering algorithm that is based on low-complexity, low cost, and high efficiency. This algorithm uses DKF (Difference Kalman Filter) and PKF (Percentage Kalman Filter) depending on different environments. In other words, DKF and PKF are the algorithms which are generated based on different judging conditions. This algorithm can not only significantly reduce the time and the complexity of computing, but also greatly shorten the circuit area of the original algorithm. This algorithm has a large number of matrix operation. In the hardware calculation process, it solves matrix problems about hardware and then developed chip design. Coefficients are used by a multiple of 2 for operation. Use shifters instead of multipliers and dividers, significantly reducing complexity and circuit area. At the same time, deal with the problem of a floating-point number, achieve circuit function verification on the FPGA, and finally tape-out. The design uses the TSMC 0.18μm CMOS cell library provided by the TSRI, uses EDA to implement VLSI with the Design Vision of SYNOPSYS, the operating frequency of the circuit is 83.33 MHz, the value of gate counts is 22.84 K, the power consumption is 3.86 mW, and chip area is 582.63 μm × 580.23 μm.

1. Introduction

Given the rapid advance in wireless communication and mobile network technologies, the development of micro-electromechanical systems, the extensive use of satellite navigation technologies, the increased demand for intelligent nursing care systems, and the maturing technologies in cloud computing and Internet of Things (IoT), the database systems can collect the big data with mobile devices, and then they analyze, compute, and extract the useful information from the disorganized data in the database [1,2,3,4,5,6]. Afterward, they can supply useful information via location-based services (LBSs) for different purposes. Recently, people have paid more attention to rapid and friendly approaches. Namely, the expectations in terms of market opportunities are the continuously and rapidly increasing attention on mobile computing, IoT, smart agriculture, and smart city issues. In order to improve the positioning and tracking accuracy, fusion approaches between the absolute approach and relative approach can be considered an important technique for positioning and tracking systems [7,8,9,10,11,12,13]. Namely, to improve localization accuracy, most filters utilize Bayesian estimators such as the Kalman filter (KF), extended KF (EKF), or unscented KF (UKF) applied to linear and nonlinear systems. KF approaches are based on the state space equation of the linear system, and provide a recursive solution to the linear optimal filtering problem. The solution is on the basis of recursive, and it is suitable for stationary and non-stationary environments. In the light of KF-based approaches, each updated state is computed based on the previous estimate and new input data. Namely, KF-based approaches only need to store the previously estimated data, it does not need to store the entire past observation data [7,8,9,10,14]. KF-based approaches are suitable for dealing with the estimation of the state vector in the linear model of the dynamic system. If the nonlinear model is generated by the linearization program, the filter is on the basis of the EKF algorithm generally [7,10,14,15,16]. EKF-based algorithms are on the basis of KF algorithms with excellent accuracy. EKF-based algorithms are used as techniques to perform recursive nonlinear estimation, and these approaches are described in terms of difference equations in the case of discrete-time systems. Therefore, EKF-based approaches are one of the state estimation algorithms suitable for many embedded systems. For nonlinear systems, an EKF-based algorithm only provides an optimal approximation for performing recursive nonlinear estimation. Nevertheless, the UKF-based algorithm can perform better than the EKF-based algorithm. The differences between EKF and UKF approaches are represented for propagating through system dynamics based on Gaussian random variables (GRV) [7,14,17]. For EKF-based approaches, the state distribution is approximated by GRV and then propagated analytically through the first-order linearization of the nonlinear system. Namely, EKF-based approaches may introduce large errors in the true posterior mean and covariance of the transformed GRV, and it leads to reduce the performance of the systems. The UKF algorithm is based on a deterministic sampling approach. The state distribution is approximated by a GRV. For propagating through the true nonlinear system, the sample points completely capture the true mean and covariance of the GRV [14]. Namely, for the nonlinear system, UKF-based approaches capture the posterior mean and covariance to second-order series expansion. UKF-based approaches do not require an explicit Jacobian calculation, and the computational complexity of UKF algorithms is the same as that of EKF algorithms [14]. The fusion approach based on the traditional KF tracking algorithm requires inverse operations which are high computational complexity, and direct implementation of the KF algorithm may be too complex to be applied to the practical systems. Furthermore, the model of mobile devices (MDs) is a nonlinear function of the position and velocity parameters [10]. Nonlinear models in state equation assumption may lead to non-optimal solutions for linearized schemes. In terms of these services and applications, the techniques of positioning and tracking approaches have become particularly important and increased dramatically under these developments.
Most of today’s positioning and tracking systems are developed and implemented with software. However, software implementations often result in speed delay and cannot provide in-time positioning information for LBS applications [17,18,19,20]. In order to improve the computational speed of positioning systems and accuracy, there already are lots of improved algorithms in literature [21,22,23,24,25,26,27,28,29,30,31,32,33,34]. The calculations of the KF approach are involved in the number of matrix computations, which include addition, multiplication, and inverse operations. The approach is difficult to implement hardware in traditional devices with some practical systems, such as high performances in real-time, flexible and convenient implementation [10,17,18,19,20,30,31,32]. In addition, the processors of Digital Signal Processing (DSP) adopt sequential program execution. Therefore, it cannot correspond to the require of high-speed and real-time requirements. On the contrary, an FPGA has precision accuracy and high portability, it can decrease the disadvantages of software for specific integrated circuit approaches. Actually, one possible way to increase performance is through the use of hardware acceleration using field-programmable gate arrays (FPGAs). Implementing functions as hardware have the potential to allow the use of more complex algorithms such as KF, and the approach also allows the implementation of multiple functions-as-a-chip systems on a single FPGA [16,17,18,19,20]. Each logical unit of the FPGA is determined at the time of programming, and no instructions are required. As a result, there is a significant advantage in the speed of processing operations with high accuracy and freely programmable characteristic. Namely, it can be easy to develop. Because of these advantages, FPGA is very suitable to be a verification method before tape-out. A chip has the advantage of low cost and fast processing time. Therefore, tape-out is chosen as the result.
This article implements localization algorithms using high-speed hardware devices. To implement the localization algorithms, the filtering formulas are derived and simplified from the filtering models and matrix operations, and then the hardware-based approaches using FPGAs are implemented. The FPGA-based implementation of the localization algorithm can improve the traditional matrix operation approach and can be applied to practical systems. The hardware implementation has advances of high portability, low cost, high accuracy, and wide extension in scope. In addition, under a stationary environment, the coefficients of the α-β filter are extracted from the KF algorithm, which is a degenerate form of the KF algorithm [15,31,32]. The proposed training and tracking scheme replaces the decision mode of the KF algorithm with an alpha-beta (α-β) algorithm to avoid repeatedly calculating the Kalman gain (KG). In this article, an adaptive low-complexity location-estimation approach combining α-β filtering algorithm with the KF algorithm is proposed and implemented. The proposed tracking approach is based on the α-β filtering algorithm extracting the coefficients of the KG from the KF algorithm according to different judgments. In addition, this article proposed the hardware implementation for the proposed filtering algorithm. The concept is performed by a chip, which has the features of real-time processing and pipeline structure. Under a stationary environment, as compared with software implementation for location tracking, the proposed chip training, decision, and tracking approach can not only implement location accuracy which is similar to the KF tracking approach, but it possesses computational complexity and provides better performance than that of non-tracking approaches. An approach with low complexity and high performance is proposed. Compared to the software implementation and the previous research, because of its low complexity and faster processing speed, the proposed approach on a chip has more benefits for LBS services or IoT applications.

2. Kalman Filtering Algorithm

Wireless communication technology makes KF usability greatly improved. Localization technologies have received high attention for LBS and IoT applications recently [21,22,23,24,25,26,27,28,29]. KF is also known as the optimal linear filter and is called the linear combination of the output value. In order to implement the simple and pure filter of the time domain, the covariance matrix will be used in the implementation process. The basic dynamic system of the KF approach can be represented by the Markov chain. Linear transformation of the Markov chain is simultaneously disturbed by the Gaussian distributed noise. The states develop timely based on a probability model and adopt Markov structure, Equation (1) is the location. The conditional probability of the observation only depends on the current physical location of MDs, Equation (2) is the observation. The joint probability density of state and observation is based on the probability chain rule, as shown in (3) [10,30].
p x k + 1 | x 0 ,   x 1 , , x k   = f x k + 1 | x k
z k + 1 | x 0 ,   x 1 , , x k , x k + 1 , z 0 ,   z 1 , , z k = h z k + 1 | x k + 1
p ( x 0 : k , z 0 : k )   = p ( x 0 , , x k , z 0 , , z k ) = f ( x 0 ) z 0 | x 0 i = 1 k f x i | x i 1 h z i | x i
At the moment k, Equation (4) means the prediction step, and it uses z 0 : k as measuring location to be the predictive distribution. Equation (5) means the update step, and it uses z 0 : k + 1 as known as the measuring location to be the corrective distribution. In terms of the recursive Bayesian estimation, with regard to prediction and update steps, two formulas are described as the following [10,30].
p x k + 1 | z 0 : k = p x k , x k + 1 | z 0 : k d x k = p ( x k | z 0 : k ) p ( x k + 1 | x k , z 0 : k ) d x k = p x k | z 0 : k ) f ( x k + 1 | x k d x k
p x k + 1 | z 0 : k + 1 = p z k + 1 | x k + 1 , z 0 : k p x k + 1 | z 0 : k p z k + 1 | z 0 : k   = h z k + 1 | x k + 1 p x k + 1 | z 0 : k p z k + 1 | z 0 : k
To enhance the location accuracy, the technology of the KF approach is used to track the location of an MD. The location state of an MD can be presented by its position and speed. In this article, the measurement formula of the observed location and the motion of mobile equation with a two-dimensional model describing are taken as follows [10,30].
x k + 1 = Φ k x k + u k ,   u k ~ N   ( 0 , Q k   )
z k = H k x k + v k ,   v k ~ N   ( 0 ,   R k   ) ,
where x k is the state vector, Φ k is the state transition matrix, u k is the MD model noise also called process noise, Q k is the MD model noise covariance matrix, z k is the actual measurement equation, H k is the measurement matrix, v k is the measurement noise, and R k is the measurement noise covariance matrix. A two-dimensional (2D) model describing the motion of the mobile equations is taken as follows:
x 1 , k + 1 x 2 , k + 1 x ˙ 1 , k + 1 x ˙ 2 , k + 1 = x 1 , k + 1 x 2 , k + 1 s 1 , k + 1 s 1 , k + 1 = 1 0 Δ k 0 0 1 0 Δ k 0 0 1 0 0 0 0 1 x 1 , k   x 2 , k   x ˙ 1 , k x ˙ 2 , k + u 1 , k u 2 , k u 3 , k u 4 , k
  z 1 , k   z 2 , k = 1   0   0   1   0     0   0 0 x 1 , k   x 2 , k   x ˙ 1 , k x ˙ 2 , k + v 1 , k   v 2 , k  
where x 1 , k and x 2 , k   are the location of x-axis and y-axis, respectively; s 1 , k and s 2 , k are speed of x-axis and y-axis, respectively. As illustrated in Figure 1, time update can predict current state estimates in advance; measurement updates can correct the just predicted estimate by actual measurement at that time.
As shown in (10), in update state, the value of KG is calculated by using the error variance value in prediction state and the error variance value in the measurement. The KG is the weight of the measurement and the weight of the previous estimate. The covariance matrix of the noise of measured value is represented by R (the covariance matrix of v, v: measurement noise). x ^ k   is the state estimate matrix, and Kk is the weight update procedures. As illustrated in (11), when the tracking approach forms a new estimate, it illustrates how much the measurement changes the estimate for the current system state estimate. The last step is to update the value of covariance for the next iteration, as shown in (12) [10,30].
K k = P ~ k H k T ( H k P ~ k H k T + R k ) 1
x ^ k =   x ˜ k + K k ( z k H k x ˜ k )
P ^ k = I K k H k P ~ k ,
where x ^ k is the state estimate matrix, x ˜ k is the state prediction matrix, P ^ k is the estimate error covariance matrix, P ˜ k is prediction error covariance matrix, K k is KG at that time, and I is identity matrix. KF time update (prediction), this system uses the previous state to predict the state of next system. The covariance matrix P is used to represent the uncertainty of the estimated state at this moment, which means noise. The state transition matrix Φ can be used to pass the uncertainty to the next moment. In addition to pass the uncertainty of the previous moment, there will also be in the prediction model. Therefore, its uncertainty at each moment in the transitive relationship needs to be modified, as shown in (13). Process model of system predicts the next state. Assuming the current system state is k, according to the process model of the system, based on the current state of the system, the next state can be estimated, as shown in (14) [10,30].
P ˜ k + 1 = Φ k P ^ k Φ k T + Q k
x ˜ k + 1 = Φ k x ^ k

3. Alpha-Beta (α-β) Filtering Algorithm

In [31,32], α-β filtering algorithm is built on the steady state of KF, and uses α-β filtering for position tracking. It does not require previous experience of state and measuring noise covariance. A two-dimensional model, using x as a position and s as a speed, the α-β tracking filter can be organized as follows:
(1)
Prediction step (Time update phase):
x ˜ k + 1 = x ^ k + Δ T v ^ k ,
s ˜ k + 1 = s ^ k
(2)
Estimation step (Measurement update phase):
x ^ k = x ˜ k α ( z k x ˜ k )
s ^ k = s ^ k 1 + ( β Δ T ) ( z k x ˜ k ) ,
where x ^ k , s ^ k , x ˜ k , and z k are the position estimate matrix, speed estimate matrix, position prediction matrix, and the actual measurement equation, respectively. These equations are reduced from those KF algorithm as follows.
H = 1 0 0 0 0 1 0 0  
K = α 0 0 α β / Δ T 0 0 β / Δ T ,
where α and β are between 0 and 1 for smoothing the estimated positions and speeds. If α = β = 0, the measurement has no influence on the approach. If α = β = 1, the history has no influence on the approach. As shown in Figure 2, first, position information enters training mode to iterate. KG will stabilize after repeated iterations, and then extract α and β from KG to become α-β filtering algorithm, by transporting the known training positioning information with a previous experience of measurement noise covariance and the state. It is mentioned in the literature that the training length of the KG coefficient can be based on iterations of the norm( P ^ ). After the training, the process takes regular intervals in time Δ T, the coefficients of the α-β tracker can be obtained from the matrix of KG, and then track the actual positioning information [32]. Decision mode is used in Figure 2 to replace the known of training mode. Finally, tracked by α and β coefficients of the tracking method continuously [31]. Furthermore, on the basis of the result in Figure 3, the convergence rate of the KG of can be based on the number of iterations. In terms of convergence rate, the larger values the variances are, the more iterations the tracking approaches have. In this article, the training lengths are 17, 21, and 23 for the variances of 5, 10, and 15, respectively.

4. The Proposed Filtering Algorithm Based on Chip

Referring to several references [17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35], the proposed filtering algorithm is designed. KF has very complex matrix inversion and matrix calculation, and this algorithm can greatly reduce the complexity of the calculation. A proposed tracking approach is based on the KF approach with steady state. According to the KF algorithm, the positioning algorithm often requires a large number of iterations, as shown in Equation (6). In each iteration, the calculation of KG is very large and complicated, no matter in software operations or hardware cost is a big consumption. Therefore, as shown in Figure 4, it is found that KG will stabilize after several iterations, and then replace KG in Equation (6) with α and β, K is the coefficient gain matrix with α and β and chooses DKF or PKF to become DKF and PKF filtering algorithm. From now on, iterations began to use decision mode. This algorithm can significantly reduce computing resources and processing time for chips.

4.1. DKF and PKF Filtering Algorithm

DKF and PKF are an algorithm designed by α-β filtering algorithm. According to different environments use different judgment conditions. Table 1 shows that the final-stable value of KG will affect the value of covariance R and Q according to a different environment, change judgment conditions. PKF uses the percentage of current KG with average of past eight KGs to make judgments. DKF uses the difference between current KG with average of past eight KGs to make judgments. On the basis of the results in Figure 3, the training lengths are 18, 21, and 23 for the variances of 5, 10, and 15, respectively. According to the simulation results, there is a tradeoff between accuracy and hardware cost, and the window size was eight for the proposed approaches. Namely, after convergence, the sequence values of 8 KGs are averaged in this article. For example, in terms for the variances of 5, the first average value is based on the sampling KG value of iteration number from 18 to 25 for the present state 25, and the second average value is based on the sampling KG value of iteration number from 19 to 26 for the present state 26. Users can choose to use PKF or DKF according to the current environment, and every one hundred points will be re-judged. It is not lead to inaccurate tracking due to environmental alteration. Under the environment with larger KG, use PKF, as shown in Equation (21). Conversely, if you encounter environment with smaller KG, use DKF, as shown in Equation (22). Selecting the appropriate judgment equation according to different environments can greatly reduce the tracking error and thus obtain more accurate position results.
{ K k / [ ( K k 1 + K k 2 + K k 3 + K k 4 + K k 5 + K k 6 + K k 7 + K k 8 ) / 8 ] } 1.005
{ K k / [ ( K k 1 + K k 2 + K k 3 + K k 4 + K k 5 + K k 6 + K k 7 + K k 8 ) / 8 ] }   16

4.2. Revise Covariance R and Q in Different Environments

Due to the original algorithm, if the environment is different, the covariance R k and Q k cannot be corrected as the environment changes. The value of R k and Q k will be accessed by using the registers. Every one hundred points will be restored. In this way, real-time corrections can be made for different environmental variables, which not only reduces the computational complexity, but also increases the accuracy of tracking. The basic ideas of derivation processes for the KF algorithm are based on three distinctive features of the innovation approach which are linear, unbiased, and minimum-variance [30]. In terms of the prediction and correction steps, for the state space model with linear and Gaussian, a KF algorithm can be derived and applied to the recursive Bayesian estimation. As a result, the accuracy of KF-based approach depends on the variance of the model noise and the variance of measurement noise. In terms of the same model noise and measurement noise, for KF-based approach, the larger the sampling time is, the smoother the trajectory will be. Namely, the larger sampling time of a KF-based approach is not suitable for dramatic time variances in the corners of hallways. As illustrated in Equations (10), (11) and (20), the weight of the innovation is the KG. For forming a new estimate, the KG is the weight of the measurement and the weight of the previous estimate. For the state space model with same model noise and with a different variance of measurement noise, the closer the actual variance value is, the more accurate the localization approach is. When the measurement uncertainty is high, the KG is low. As illustrated in Figure 3, the convergence of the estimate uncertainty would be slow. In terms of the result in Ref. [32], the KG is close to zero when the measurement uncertainty is high and the estimate uncertainty is low. Namely, if the measurement uncertainty equals the estimate uncertainty, the KG equals to 0.5 [36].
For applying to the simulation environment of linear systems in large KG, the measurement noise of the PKF-based approach is more closer to the actual variance value of the simulations. Namely, a low measurement uncertainty which is relative to the estimate uncertainty results in a high KG. The new estimate is close to the measurement. On the other hand, a high measurement uncertainty which is relative to the estimate uncertainty results in a low KG. The new estimate would be close to the previous estimate. The KG is the weight of the measurement and the weight of the previous estimate [36]. On the basis of Figure 5, the results illustrate the environment with the same large KG. In terms of PFK-based and DKF-based approaches, the results illustrate that a good choice at the right time can obtain a better result. Therefore, the appropriate judgment conditions should be chosen in different environmental factors. As illustrated in Figure 5, the PKF-based approach is suitable for a low measurement noise environments, and the DKF-based approach is suitable for a high measurement noise environments.

4.3. Judgment-Standard for Conditional Equation

In this article, all of KG amplifies 214 to compare. Two methods are designed by conditional–equation judgment, one is to use the percentage to judge, the other is to use the difference. Now, this article will introduce two methods. First, as shown in Equation (23), use the current KG to divide the average of the past eight times, and also use shifter to resolve the problem of floating-point numbers, and implement on FPGA and chip. Second, as shown in Equation (24), using 16.0 as the condition for judgment, KG in Table 2 is a value that has been enlarged to eliminate floating-point numbers. Because of the limitations of the shifter, a multiple of 2 must be used. Table 2 shows that if it uses 16.0, it can achieve conditions with fewer iterations than values below 8.0 and 4.0, if it use 32.0, although the number of iterations will be less than 16.0, but the value used to replace α after the conditional equation is judged will be more different from the original KG, which will result in the error of the final result, thus 16.0 is the most excellent value in this conditional equation. The timing of the above two methods, according to the variance that influences the value of KG, the percentage method is suitable for the small value of KG, relative, the difference method is suitable for the large value of KG.
{ K k / [ ( K k 1 + K k 2 + K k 3 + K k 4 + K k 5 + K k 6 + K k 7 + K k 8 ) / 8 ] }   1.005 = { K k 13 / [ ( K k 1 + K k 2 + K k 3 + K k 4 + K k 5 + K k 6 + K k 7 + K k 8 ) 3 ] }   1.005 13                         = { K k 13 / [ ( K k 1 + K k 2 + K k 3 + K k 4 + K k 5 + K k 6 + K k 7 + K k 8 ) 3 ] }   8200
{ K k / [ ( K k 1 + K k 2 + K k 3 + K k 4 + K k 5 + K k 6 + K k 7 + K k 8 ) / 8 ] }   16 = { K k 3 [ ( K k 1 + K k 2 + K k 3 + K k 4 + K k 5 + K k 6 + K k 7 + K k 8 ) ] }   16 3 = { K k 3 [ ( K k 1 + k k 2 + K k 3 + K k 4 + K k 5 + K k 6 + K k 7 + K k 8 ) ] }   128

5. The Proposed VLSI Architecture and Implementation

According to the training-tracking method, the coefficients of the α-β tracking approach were extracted from the KF tracking algorithm, which is a simplified form of the KF tracking approach. Namely, use the original fixed-coefficient feature. In decision mode, the proposed approach can prevent repeatedly calculating with the KG. In this part, PDK or DKF will be used according to the different environments. KG in the iteration will be stored in the registers. In terms of the threshold, as shown in Equations (23) and (24), according to the different conditions, the average of the past eight KGs ( K k 1 ~ K k 8 ) is compared with the current KG (Kk). The other method is that the current KG (Kk) is divided by the average of eight KGs ( K k 1 ~ K k 8 ) . If the checked values are smaller than that of the threshold, the information of the KG will be recorded in the register. After the KG satisfied the threshold conditions, coefficients of α and β are extracted from KF tracking approach to form the proposed approach, and then the inherent coefficients are implemented by the VLSI approach. Namely, after the training session, if the location tracking algorithm can make correct and reliable decisions, the position information can replace the training mode with their own decision mode of the tracking approach. In terms of the proposed filtering algorithm based on VLSI approach. In addition, the choice of the window size in the proposed approach is a key step. A too small filtering window may not provide a satisfactory result. As shown in Equations (23) and (24), the window size 8 of moving average filter was used. Then, effectively cycled with the position information between the prediction state and the correction state.

5.1. The Algorithm Implementation and Pipeline Architecture

The results of VLSI implementation based on KF and proposed filtering algorithms are evaluated in terms of hardware approach. The experimental path of the two-dimensional model environment is the research environment of this article. In research, f = 1 Δ k   = 1 is the sampling frequency. By adding random components with σ k u = 0 . 045 and σ k v = 4 . 5 to the MD, model describing analytic stabilizing motion of the MD with noise is based on Equation (3). The model describing observation location of the MD is taken in Equation (5). The VLSI architecture is shown in Figure 5. The improved project illustrates the proposed approach which use plenty of shifters to replace multipliers and dividers. Pipeline architecture is used to design the circuit to increase efficiency. Moreover, KF has matrix so much, like K k , P ^ k , P ˜ k . For example, as shown in Equations (6), (7) and (10), in the case where the x-axis is independent of the y-axis, this matrix just has some items with values. As shown in Equations (25) and (26). Therefore, these registers can be omitted with a value of zero in the proposed VLSI design to decrease the circuit area. As a result, the approaches in this article can decrease the circuit complexity, and the architecture of design also can process the problems of floating-point-number computation by using shifters. The circuit is designed by using four-stage structure which can decrease processing time, where stage1, stage2, stage3, and stage4 are control input, use PKD-based and DKF-based approaches to judge steady, compute KG, x ^ k , P ^ k , x ˜ k and P ˜ k , respectively.
P ˜ = P ˜ 11 0 P ˜ 13 0 0 P ˜ 22 0 P ˜ 24 P ˜ 31 0 P ˜ 33 0 0 P ˜ 42 0 P ˜ 44
P ^ = P ^ 11 0 P ^ 13 0 0 P ^ 22 0 P ^ 24 P ^ 31 0 P ^ 33 0 0 P ^ 42 0 P ^ 44

5.2. Computation of Kalman Gain and α-β Module

As shown in Figure 6, this module is used to calculate the weight value, which is calculated from the state noise distribution ( P ˜ k ) and measurement noise (covariance R). This module involves the inverse matrix, which represents a high degree of complexity in hardware. Therefore, the inverse matrix encounters huge difficulties in this step from software to hardware, and it also has to overcome this cumbersome calculation. After the calculation of KG, the threshold will be judged by DKF or PKF. If it meets the raft value, and the α-β filtering algorithm will be started.

5.3. Update State Module

As shown in Figure 7, using the current estimated state and the current measurement state with a weight value, to complete the update of the current state. Use the current estimated state. Among them, the location information with noise will enter this module through X-Table and Y-Table. If it has entered the decision mode, KG will be replaced by α and β as input. Finally, obtaining x ^ k and P ^ k in the update state module.

5.4. Predicted State Module

As shown in Figure 8, this module is the VLSI architecture of the prediction state module. Using the current state and the amount of change to estimate the state at the next moment. At the same time, the noise of the current state is used in conjunction with the noise of the update state in the current state. Estimate the noise of the state at the next moment.

5.5. Input Table Module

As shown in Figure 9, this module is the VLSI architecture of the input table module. This module is a simulation measurement values of x, y locations and x, y speeds at the time k. Use counter to count, output each value in sequence, and enter to other modules for calculation.

6. The Implementation of Chip Results and Measurement

6.1. Data Comparison with FPGA Approach

FPGA is used as a circuit function verification before tape-out. This design was implemented in the function in FPGA Cyclone IV. In addition, comparing FPGA of Xilinx and Altera in different literature respectively. Table 3 expresses the comparison results with register, LUT (Look-Up Table), and IOB (Input/Output Block) resources. Between the two previous approaches and the proposed approach, Table 3 presented the comparison results on the hardware resource utilization of the FPGA resources applied. According to the results in Table 3, compared with [20], the proposed approach has significantly decreased in register utilization. Compared with [37], though the proposed approach is little more in register utilization, the timing of hardware still has a huge advantage. Table 3 and Table 4 present the logic element using by number of LUT inputs, total registers, total I/O pins, and embedded multiplier 9-bit elements, as compared with [18,19], not only has lower resource usage, but also has a huge advantage in processing time. Furthermore. Compared with the processing time in Table 3 and Table 5, the results present that the proposed approach gets apparently advantage over the software implementation. In other words, based on obtains explanations, the coefficients were obtained of the α-β tracker which rely on the state and measurement noise covariance of the KF tracking approach. Namely, for the proposed approach, it is obvious that the data bit width is decreased, and the resource utilization is significantly decreased. Table 6, the results show that the proposed approach has an obvious advantage over the software implementation for location tracking.

6.2. Simulation on FPGA DE2-115

In this part, the software, Matlab is used to simulate my proposed algorithm, and then the algorithm is converted to Verilog for hardware. Before implementing on the hardware platform of Altera DE2-115, the proposed design was verified in Modelsim and implemented on FPGA. The simulation is a critical step for designing FPGAs, and it allows us to stimulate the proposed approach. Therefore, Modelsim is a program applied to simulate VHDL and Verilog designs. The simulation in Modelsim illustrates that the filter satisfies real-time of the system. In addition, Figure 10 shows the simulation path in this article. The path is performed for 15 turns, 120 points per turn, and a total of 1800 points are simulated. In addition, random noise adds to the true trajectory, which is the observed trajectory, and then restored through the proposed approach. The results show that the proposed filtering approach can track the trajectory and speed of MD effectively, and there are different coefficient parameters for α and β to make CDF (cumulative distribution function) plots for the comparison. Furthermore, Figure 11 reveals the comparison of the proposed approaches between the KF and the proposed tracking algorithms. Table 7 illustrates the results of the proposed localization approaches. The location accuracy corresponds to the different fixed values of α and β coefficients, where the different fixed coefficients of α and β are tuning constants between number 0 and number 1. On the basis of the results, the location accuracy of the proposed α-β training–tracking method based on the coefficients of the KG is almost the same as the location accuracy of the KF tracking approach. Therefore, to use the coefficients of the KG obtained from the proposed approaches has a considered effect on the performance of the α-β training–tracking algorithm. Namely, in terms of the results, the location accuracy of the proposed tracking approach is nearly the same as the KF tracking approach. Figure 12 shows the simulation of the nonlinear path with software, implemented on the FPGA, and then the restored position is a substitute to the software for verification. Therefore, using the coefficients of the KG from training mode done in FPGA implementation has a considered effect on the performance of the proposed approach. Furthermore, for the proposed approach, the fewer resources in terms of parallelism are used to improve the execution time. This study wrote x ^ k to the SRAM of DE2-115 with its control panel. SRAM_ADDR represents the number of times of seven-segment display. x ^ k stored in SRAM_DQ [15:0], and then put SRAM_DQ into HEX0[6:0], HEX1[6:0], HEX2[6:0] and HEX3[6:0] with hexadecimal values and displays them on the seven-segment display. For example, in this article, the seven-segment display shows 16 bits twice, 0000 and 14db, respectively, which is a single value, and the number of composition is 000014db with hexadecimal. Therefore, eight times is one cycle, which is the X, Y, Vx, and Vy of the coordinate of an algorithm-restored point.

6.3. Implementation of Chip

As shown in Figure 13, after the previous steps are completed, using IC compiler (ICC) to run APR (Auto place and route) to make relevant settings to synthesize the circuit layout, and observe whether the report results violate the settings. If there is no violation, the relevant files (routed netlist files, sdf file, GDS file) are be used in the subsequent steps, after the layout is completed, run LVS, DRC verification, LVS verification, after the verification result is correct, then Qentry DRC verification, if the DRC verification result is wrong, check the CIC provides the allowable error table comparison report whether the error on the above is an allowable error, if not, debug it. After verification, using the netlist file and sdf file generated by IC compiler to run post-layout simulation, and observe whether the waveform is the same as the result of pre-layout simulation. If they are the same, the function is correct, and the diagram of APR is completed. Table 8 shows the specification of my chip with final result.
Figure 14a shows the layout plan with IC compiler. Figure 14b shows the wire bonding photo. The packing type is 32S/B. The pins are numbered counterclockwise, and Pin 1 (start counting) is indicated in Figure 14b. These are the results of using the EDA tool of TSRI on tape-out. Figure 15a,b shows the resulting display of a chip after tape-out in TSRI.

6.4. Measurement of Chip

The system architecture of FPGA evaluation board DE2-115. The red frame in the Figure 15b is the system peripheral functions which will be used during chip measurement. As shown in Figure 16, the architecture of the measurement environment after the chip comes back. First, connect each pad of the chip to the corresponding GPIO pin on FPGA, as shown in Table 9. The memory controller circuit programmed by Quartus to read the SRAM control signal, is transmitted to the chip for processing. The output signal of the chip processed by the SRAM, then passed into the seven-segment display to verify whether the position of the final outputs match. The signal is also pulled to the digital logic analyzer for analysis and viewed of the wave. If the function verification is correct, forward to CIC and use the V93000, measuring machine, to measure the chip operating frequency and voltage. The chip’s pads are connected with jumper wire to the load-board of V93000. Then, set the definition of each digital pin, and connect the chip’s pads to tester channel of V93000. Set timing file and vector file for pattern. Finally, the wave is shown in Figure 17a,b.

7. Conclusions

This article has proposed an adaptive low-complexity filtering algorithm based on the chip design for location tracking. The coefficients of α and β are extracted from KF tracking approach to form a proposed approach. The KG of the simulated environment is relatively small. Therefore, DKF was selected from the two algorithms, DKF and PKF, to use. The inherent coefficients are implemented by the chip design. To optimize and improve the implementation of the chip design, this algorithm used a lot of shifters instead of multipliers and dividers to overcome the problem of chip design which cannot calculate the floating-point number. Compared with software, the processing time has been greatly reduced. The results show that proposed approaches are better than KF tracking approaches in software. Moreover, the implementation of chip design significantly reduces lots of processing time and costs. The processing time of proposed filtering algorithm is 0.003007 ns with one clock on FPGA and the error distance of CDF also has high accuracy performance. The chip design which is 0.18 μm CMOS Mixed Signal RF General Purpose Standard Process FSG AI 1P6M1.8&3.3 V consumes power 3.24 mW, gate count is 22.84 k, works in the frequency of 83.33 MHz, and chip area is 582.63 μm × 580.23 μm.

Author Contributions

Conceptualization, Y.-S.C.; data curation, W.-T.C.; formal analysis, Y.-S.C. and W.-T.C.; funding acquisition, Y.-S.C. and S.-L.C.; investigation, Y.-S.C. and S.-L.C.; methodology, Y.-S.C., W.-T.C. and S.-L.C.; project administration, Y.-S.C.; resources, Y.-S.C. and S.-L.C.; software, Y.-S.C. and W.-T.C.; supervision, S.-L.C.; writing—original draft, Y.-S.C., W.-T.C. and S.-L.C.; writing—review and editing, Y.-S.C., W.-T.C. and S.-L.C. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by the Ministry of Science and Technology, Taiwan (R.O.C.), under Grant numbers of MOST-107-2221-E-033-017, MOST 110-2823-8-033-002, MOST 110-2121-M-033-001, and MOST 111-2121-M-033-001.

Acknowledgments

The authors gratefully thank the financial support from the Ministry of Science and Technology, Taiwan (MOST-107-2221-E-033-017, MOST 110-2823-8-033-002, MOST 110-2121-M-033-001, MOST 111-2823-8-033-001, and MOST 111-2121-M-033-001).

Conflicts of Interest

The authors declare no conflict of interest.

References

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Figure 1. The prediction and correction phase of tracking systems.
Figure 1. The prediction and correction phase of tracking systems.
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Figure 2. Flow diagram of α-β filtering algorithm.
Figure 2. Flow diagram of α-β filtering algorithm.
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Figure 3. The learning curves of the Kalman gain of the stable convergence in the light of the norm of the estimation error covariance with the iteration parameter.
Figure 3. The learning curves of the Kalman gain of the stable convergence in the light of the norm of the estimation error covariance with the iteration parameter.
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Figure 4. Flow diagram of the proposed approach.
Figure 4. Flow diagram of the proposed approach.
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Figure 5. Under the same large variance environment, use DKF and PKF individually.
Figure 5. Under the same large variance environment, use DKF and PKF individually.
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Figure 6. VLSI architecture of the Kalman gain and α,β module.
Figure 6. VLSI architecture of the Kalman gain and α,β module.
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Figure 7. VLSI architecture of the update state module.
Figure 7. VLSI architecture of the update state module.
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Figure 8. VLSI architecture of the predicted state module.
Figure 8. VLSI architecture of the predicted state module.
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Figure 9. VLSI architecture of the input table module.
Figure 9. VLSI architecture of the input table module.
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Figure 10. Software simulation results for the tracking location and speed of an MD based on α-β tracking approach as the MD moves the clockwise direction of the path in a plane of indoor environments (a,b) original trajectory and speed; (c,d) observed trajectory and speed (positioning approach); (e,f) estimated trajectory and speed.
Figure 10. Software simulation results for the tracking location and speed of an MD based on α-β tracking approach as the MD moves the clockwise direction of the path in a plane of indoor environments (a,b) original trajectory and speed; (c,d) observed trajectory and speed (positioning approach); (e,f) estimated trajectory and speed.
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Figure 11. Cumulative distribution function of the error distances, KF software-based, α-β software-based, KF VLSI-based, and proposed approach with α-β chip-based tracking approaches.
Figure 11. Cumulative distribution function of the error distances, KF software-based, α-β software-based, KF VLSI-based, and proposed approach with α-β chip-based tracking approaches.
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Figure 12. Software simulation and implement on hardware for the tracking location and speed of an MD based on α-β tracking approach as the MD moves the counterclockwise direction of the non-linear path in a plane of indoor environments (a,b) original trajectory and speed; (c,d) observed trajectory and speed (positioning approach); (e,f) estimated trajectory and speed; (g,h) FPGA-based estimated trajectory and speed.
Figure 12. Software simulation and implement on hardware for the tracking location and speed of an MD based on α-β tracking approach as the MD moves the counterclockwise direction of the non-linear path in a plane of indoor environments (a,b) original trajectory and speed; (c,d) observed trajectory and speed (positioning approach); (e,f) estimated trajectory and speed; (g,h) FPGA-based estimated trajectory and speed.
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Figure 13. Circuit design and the diagram of tape-out.
Figure 13. Circuit design and the diagram of tape-out.
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Figure 14. (a) Layout plan with IC Compiler. (b) Wire bonding photo.
Figure 14. (a) Layout plan with IC Compiler. (b) Wire bonding photo.
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Figure 15. (a) IC photography. (b) IC outward appearance.
Figure 15. (a) IC photography. (b) IC outward appearance.
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Figure 16. Architecture of measurement environment on FPGA.
Figure 16. Architecture of measurement environment on FPGA.
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Figure 17. (a) Actual wave of V93000 measuring machine. (b) Ideal wave of V93000 measuring machine.
Figure 17. (a) Actual wave of V93000 measuring machine. (b) Ideal wave of V93000 measuring machine.
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Table 1. The difference between DKF and PKF.
Table 1. The difference between DKF and PKF.
DKF (Difference Kalman Filter)PKF (Percentage Kalman Filter)
Method of judgmentUsing differences to make judgmentUsing percentages to make judgment
Using situationSmaller KG in the environmentLarger KG in the environment
Table 2. Best Standard Value of Conditional Equation.
Table 2. Best Standard Value of Conditional Equation.
Variance VSteady KG of KFKG of 4.0/
Iteration Times
KG of 8.0/
Iteration Times
KG of 16.0/
Iteration Times
KG of 32.0/
Iteration Times
558305830/265830/255830/225826/21
1050535053/295053/285053/235013/20
1546384638/324638/304638/244584/19
Table 3. Comparison of Hardware Resource Utilization of Xilinx (Proposed Tracking Approach).
Table 3. Comparison of Hardware Resource Utilization of Xilinx (Proposed Tracking Approach).
Number of Slice RegistersNumber of Slice LUTsNumber of IOBsProcessing Time
(One Clock)
Bai’s Approach [20]36,689/149,760 (24%)28,367/149,760 (18%)391/680 (57%)0.00468 ns
Rawal’s Approach [37]2696/393,600 (1%)17,335/196,800 (8%)166/600 (27%)-
The Proposed Approach8739/114,480 (8%)9365/117,053 (8%)102/529 (19%)0.003007 ns
Table 4. Comparison of Hardware Resource Utilization of Altera (Proposed Tracking Approach).
Table 4. Comparison of Hardware Resource Utilization of Altera (Proposed Tracking Approach).
Logic Element Usage by Number of LUT InputsTotal RegistersTotal I/O PinsEmbedded Multiplier 9-Bit Elements
Chen’s Approach [18]18,650/114,480 (16%)2178120/529 (23%)192/532 (36%)
Zhang’s Approach [18,19]22,176/114,480 (20%)1687102/529 (19%)144/532 (27%)
The Proposed Approach8739/114,480 (8 %)929102/529 (19%)60/532 (11%)
Table 5. Processing Time of Software-based Approaches and FPGA-based Proposed Approach.
Table 5. Processing Time of Software-based Approaches and FPGA-based Proposed Approach.
Processing Time
(One Clock)
StagePointsCyclesTotal Processing Time
(One Cycle)
Chen’s Approach [18]0.002772 ns6180010,80029.9376 ns
Zhang’s Approach [18,19]0.002800 ns6180010,80030.2400 ns
The Proposed Approach0.003007 ns4180018045.4246 ns
Table 6. Comparison of Hardware Processing Time of Altera (Proposed Tracking Approach).
Table 6. Comparison of Hardware Processing Time of Altera (Proposed Tracking Approach).
Traditional Software Program
(CPU i3/Ram 8 GB)
Traditional Software Program
(CPU i7/Ram 16 GB)
The Proposed Approach
(Hardware Design and FPGA)
AlgorithmKFα-βKFα-βKFα-β
Executing Time0.8235 ns0.07358 ns0.05115 ns0.009521 ns0.03407 ns0.003007 ns
Table 7. The Cumulative distribution function of the error distances, KF software-based, α-β software-based, KF VLSI-based, and proposed approach with α-β chip-based tracking approaches.
Table 7. The Cumulative distribution function of the error distances, KF software-based, α-β software-based, KF VLSI-based, and proposed approach with α-β chip-based tracking approaches.
MethodKF Approachα-β Approach Based on KF Coeff.α-β Approach
α= 1
β = 1
α-β Approach
α= 0.75
β = 0.75
α-β Approach
α= 0.5
β = 0.5
α-β Approach
α= 0.25
β = 0.25
CDF
90%3.65 m3.66 m6.82 m6.02 m5.42 m5.21 m
50%2.00 m2.01 m3.71 m3.19 m2.92 m2.81 m
Table 8. Specification of Chip.
Table 8. Specification of Chip.
SpecificationSpec.
TechnologyTSMC 0.18 um CMOS Mixed Signal RF General Purpose Standard Process FSG AI 1P6M1.8&3.3 V
Process (μm)0.18
Gate Counts22.84 k
Frequency (Hz)83.33 M
Chip Size (μm2)582.63 × 580.23
Power Supply (Volts)1.8
Operation Temperature (°C)0~125
Power Consumption (W)3.86 m
Packing Type32 S/B
Table 9. Corresponding Table of Chip Pads and GPIO Pins.
Table 9. Corresponding Table of Chip Pads and GPIO Pins.
Chip PadsGPIO
Clk[0]
Reset[4]
Delta_k[8]
X_Hat[12:0][11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35]
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Chiou, Y.-S.; Chen, S.-L.; Chen, W.-T. Reduced-Complexity Tracking Algorithms on Chip for Real-Time Location Estimation. Electronics 2023, 12, 739. https://doi.org/10.3390/electronics12030739

AMA Style

Chiou Y-S, Chen S-L, Chen W-T. Reduced-Complexity Tracking Algorithms on Chip for Real-Time Location Estimation. Electronics. 2023; 12(3):739. https://doi.org/10.3390/electronics12030739

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Chiou, Yih-Shyh, Shih-Lun Chen, and Wei-Ting Chen. 2023. "Reduced-Complexity Tracking Algorithms on Chip for Real-Time Location Estimation" Electronics 12, no. 3: 739. https://doi.org/10.3390/electronics12030739

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