Next Article in Journal
A Unified Model of a Virtual Synchronous Generator for Transient Stability Analysis
Previous Article in Journal
Half-Wave Phase Shift Modulation for Hybrid Modular Multilevel Converter with Wide-Range Operation
Previous Article in Special Issue
A Method for Power Flow Calculation in AC/DC Hybrid Distribution Networks Considering the Electric Energy Routers Based on an Alternating Iterative Approach
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
This is an early access version, the complete PDF, HTML, and XML versions will be available soon.
Article

Harmonic State Estimation in Power Systems Using the Jaya Algorithm

by
Walace do Nascimento Sepulchro
* and
Lucas Frizera Encarnação
*
Department of Electrical Engineering, Federal University of Espírito Santo (UFES), Av. Fernando Ferrari, 514, Vitória 29075-910, Brazil
*
Authors to whom correspondence should be addressed.
Electronics 2024, 13(17), 3559; https://doi.org/10.3390/electronics13173559 (registering DOI)
Submission received: 16 August 2024 / Revised: 2 September 2024 / Accepted: 5 September 2024 / Published: 7 September 2024
(This article belongs to the Special Issue Compatibility, Power Electronics and Power Engineering)

Abstract

The increasing use of nonlinear loads in power systems introduces voltage and current components at non-fundamental frequencies, leading to harmonic distortion, which negatively impacts electrical and electronic devices. A common mitigation strategy involves identifying harmonic sources and installing filters nearby. However, due to the high cost of power quality (PQ) meters, comprehensive harmonic level monitoring across the entire power system is impractical. To address this, various methodologies for Harmonic State Estimation (HSE) have been developed, which estimate distortion levels on unmonitored system buses using data from a minimal set of monitored ones. Many HSE techniques rely on optimization algorithms with numerous tuning parameters, complicating their application. This paper proposes a novel methodology for fundamental frequency power flow and harmonic state estimation using the Jaya algorithm, which is characterized by fewer tuning parameters for easier adjustment. It also introduces a strategy to determine the minimal number of buses that need monitoring to achieve system observability. The methodology is validated on the IEEE-14 and IEEE-30 bus systems, demonstrating its effectiveness. The results of the proposed methodology are compared with those obtained using Evolutionary Strategies (ESs), highlighting its enhanced accuracy and computational efficiency.
Keywords: power systems; power quality; harmonic state estimation; power flow; optimization algorithms; Jaya algorithm power systems; power quality; harmonic state estimation; power flow; optimization algorithms; Jaya algorithm

Share and Cite

MDPI and ACS Style

Sepulchro, W.d.N.; Encarnação, L.F. Harmonic State Estimation in Power Systems Using the Jaya Algorithm. Electronics 2024, 13, 3559. https://doi.org/10.3390/electronics13173559

AMA Style

Sepulchro WdN, Encarnação LF. Harmonic State Estimation in Power Systems Using the Jaya Algorithm. Electronics. 2024; 13(17):3559. https://doi.org/10.3390/electronics13173559

Chicago/Turabian Style

Sepulchro, Walace do Nascimento, and Lucas Frizera Encarnação. 2024. "Harmonic State Estimation in Power Systems Using the Jaya Algorithm" Electronics 13, no. 17: 3559. https://doi.org/10.3390/electronics13173559

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Article metric data becomes available approximately 24 hours after publication online.
Back to TopTop