Ultrathin Antenna-in-Package Based on TMV-Embedded FOWLP for 5G mm-Wave Applications

Abstract

In this paper, a novel through mold via (TMV)-embedded fan-out wafer-level package (FOWLP) technology was demonstrated to manufacture the well-designed Antenna in Package (AiP) with ultrathin thickness (0.04 λ₀). Double-sided redistribution layers (RDLs) were employed to build the patch antenna, while a TMV interposer was used to connect the front and back RDLs. By optimizing the AiP’s parameters, the patch antenna can achieve a wide impedance bandwidth of 17.8% from 24.2 to 28.5 GHz, which can cover the 5G frequency bands. Compared with previous works, the proposed AiP has significant benefits in terms of its ultralow profile, easy processing, and high gain. Hence, the TMV-embedded FOWLP should be a promising technology for fifth generation (5G) millimeter wave (mm-Wave) applications.

1. Introduction

Wireless communication has witnessed an explosive expansion over the past decade. The remarkable advancement in diverse emerging fields such as virtual reality (VR), artificial intelligence (AI), and the Internet of Things (IoT) has generated an immense surge in data traffic [1]. Therefore, the current demand called for systems capable of delivering high data rates, wide bandwidth, and low latency. Meanwhile, there was an increasing demand for portable equipment that was easy to carry and did not occupy much space in those emerging applications. In addition, cost-effectiveness was also crucial to ensure that these devices were affordable and accessible for purchase and used by a wide range of users. As a result, the handheld devices connected to these systems should be compact and cost-effective.

Due to the strong demand for high-quality communication and high-integration devices, there has been considerable attention drawn to the fifth-generation communication (5G) in the millimeter-Wave (mm-Wave) bands. Mm-Wave communications offer several advantages over existing wireless technologies, including an extensive bandwidth, compact component sizes, and narrow beams, which can break the limitations of frequency spectrum availability in the sub-6 GHz bands. Hence, mm-Wave systems are spreading widely into mainstream communication terminal devices in wireless communication [2]. Moreover, with the increase in the density of 5G, it can support the increasing demand for smart city infrastructure. Fifth-generation networks were engineered to provide enhanced reliability, lower latency, and improved network efficiency, making them ideal for critical applications such as autonomous vehicles, telemedicine, and industrial automation. As a result, these unique characteristics of 5G have garnered considerable attention and stimulated innovation in various industries, driving the global adoption and deployment of 5G technologies worldwide.

The third-generation partnership project (3GPP) states that the mm-Wave bands adopted for 5G communication cover the following frequency ranges: 24.25–27.50 GHz (n258), 26.5–29.5 GHz (n257), 27.50–28.35 GHz (n261), 37.0–40.0 GHz (n260), 39.5–43.5 GHz (n259), and 47.2–48.2 GHz (n262) [3]. Therefore, designing wideband antennas that cover multiple mm-Wave 5G frequency bands was a significant challenge in meeting different standards worldwide. Meanwhile, it was recommended to adopt miniaturization and low-profile technology for 5G antennas in terminal devices due to the limited internal space. In addition, the use of 5G mm-Wave presented a constant challenge due to high path and transmission losses at high frequencies, which result in a requirement in high gain and high efficiency of the antenna [4].

To meet the above requirements, the design and fabrication of 5G mm-wave antennas played a significant role. Mm-wave antennas can be fabricated in either integrated or non-integrated structures depending on the specific application and requirements. The non-integrated antennas were structured that were separate from the electronic circuitry and come in various forms. Integrated antennas were designed to be integrated directly into a circuit board or within a larger electronic system, including antenna-on-chip (AoC) and antenna-in-package (AiP) systems. These integrated designs offered compact solutions that enable antennas to be integrated into electronic devices, enhancing their performance and functionality. However, achieving high efficiency in AoC designs was challenging due to the low resistivity and high permittivity of the silicon substrate [5]. The use of silicon substrates for integrated circuit fabrication imposed inherent limitations on the antenna’s performance. The low resistivity of the silicon led to increased conduction losses, which can reduce the overall efficiency of the antenna. Losses can be caused by the substrate absorbing and dissipating a significant portion of the radiated energy. Additionally, the high dielectric constant of silicon can cause an impedance mismatch and distort the radiation pattern of the antenna.

Hence, AiP was considered excellent candidates in industry and academia for integrating the antenna with the chip to reduce interconnect length. Furthermore, integrating the antenna within the package allowed for tighter coupling and better impedance matching between the antenna and the RF chip, resulting in improved transmission efficiency, reduced power consumption, and an enhanced overall system performance [6].

State-of-the-art mm-Wave package technologies to achieve AiP included a low-cost printed circuit board (PCB) [7,8,9], low temperature co-fired ceramic (LTCC) [10,11], high-density interconnection (HDI) [12,13], and fan-out wafer-level package (FOWLP) [14,15,16], respectively. LTCC technology has gained significant traction in the fabrication of AiP structures for 5G applications due to its ability to provide substrates with low loss, minimal moisture absorption, excellent thermal conductivity, and a high degree of passive component integration [17]. LTCC devices were manufactured using ceramic tapes and metal pastes. This technology facilitated manufacturing services to promote mass production. However, the main challenges faced by LTCC technology were the limitations of manufacturing process accuracy and the associated high costs [18]. HDI technologies allowed for the simultaneous use of a variety of dielectric materials, with single layer thicknesses ranging from 10 to 100 μm, providing unparalleled design flexibility. Additionally, HDI technologies enabled the use of blind and buried vias by developing an accumulation layer on a rigid core substrate, which can facilitate complex signal routing [19]. However, this approach typically involved complex structures and multilayers.

Compared to LTCC or HDI technologies, FOWLP utilized a wafer reconstruction process. This involved selecting functional dies from the original device wafer, placing them onto a carrier, and encapsulating them with epoxy molding compound (EMC) to form an artificial wafer. This innovative approach eliminated the need for a laminate substrate and instead utilized Cu redistribution layers (RDLs) [20].

Among these aforementioned technologies, FOWLP emerged as an impressive candidate in AiP due to its low structure profile, compact size, and high I/O density [21]. FOWLP eliminated the need for traditional wire bonding or flip chip interconnects, enabling more direct and compact integration of the antenna and RF chip. This consequence resulted in a reduced package size and overall profile, which is particularly beneficial for applications with tight space constraints. Additionally, the technology enabled the redistribution of the I/Os across the entire surface of the package, resulting in a higher number of connections and denser integration of antennas and RF chips. Furthermore, FOWLP offered an exceptional thermal and electrical performance. The RDL in FOWLP provided a short interconnect length and low parasitic effects, resulting in improved signal integrity, reduced losses, and the enhanced performance of the integrated antenna and RF chip.

Recently, several reports have been illustrated to AiP element designs and research for 5G applications, using FOWLP technology. In [16,22,23], new configurations of AiPs based on FOWLP technology were introduced in response to emerging wireless communications. In [22], a patch antenna with a gain of approximately 5 dBi and bandwidth of around 5.7 GHz at 28 GHz was implemented in the FOWLP package for 5G mm-Wave applications. In [23], a dual-band slotted patch antenna was designed for 28 GHz/38 GHz 5G small cell base stations with a gain of about 6.2 dBi. These configurations offered several advantages. FOWLP technology minimized the thickness of the package, reduced the length of the signal path between the antenna and the chip, enabled integration of the antenna on top of the chip, allowed for package size reduction, and enabled easy scalability, with larger arrays and multiple chips. However, these designs cannot satisfy all the needs, including a low profile, fewer layers, and high gain, simultaneously.

TMV-embedded FOWLP has been illustrated as an outstanding approach for achieving highly integrated packages due to its ability to reduce interconnection loss, improve signal isolation, and achieve fine pitch line and spaces. Figure 1 shows an example of a TMV-embedded FOWLP. The chip-to-package interconnected in the TMV-embedded FOWLP was developed through the TMV interposer that lands directly onto the chip from the RDL. Large-scale antennas integrated with various RF chips in the same package have been identified as an exceptional approach for mm-Wave communication modules. Therefore, TMV-embedded FOWLP has become one of the most promising candidates for mm-Wave communications due to its support for embedded chips and low-loss interconnects.

In this work, a novel FOWLP technology with double-sided RDLs, particularly TMV interposers as a vertical interconnect, was illustrated. For the patch element design, the parasitic patches were employed to further widen bandwidth. The low-cost FOWLP process, which included picked and placed, molding, seed layer deposition, photoresist patterning, electroplating, and grinding, was selected for the fabrication. The AiP, based on FOWLP technology with a low profile and fewer layers, was designed and fabricated for 5G mm-Wave applications. The simulation and measurement results stated that the antenna achieved a wide impedance bandwidth, high gains, and a good radiation performance, covering the 5G communication frequency bands of n258, n257, and n261.

2. Process of TMV-Embedded FOWLP

The fabrication process for the TMV-embedded FOWLP is illustrated in Figure 2. Firstly, a release layer was coated onto the carrier (Figure 2a), and then the chip and TMV interposer were picked and placed on to the release layer (Figure 2b). After that, the whole reconstituted wafer was molded with liquid epoxy material, using the thermal compression approach. The post-mold curing process was conducted after molding (Figure 2c). Next, the carrier was de-bonded from the reconstructed wafer, and the chip and TMV interposers were embedded in the molding compound. The proposed module was equipped with RDLs on both sides of the package.

The fabrication of the front-side RDL began with the application of a dielectric layer on the reconstructed wafer, followed by the formation of RDL layers, using a semi-additive process, which involved depositing a seed layer, patterning with photoresist, electroplating, stripping the photoresist, and etching the seed layer (Figure 2d). Thin wafer handling was critical to achieving the required thickness of the reconfigured wafer; a thick carrier was used as the support wafer (Figure 2e) and then bonded to the front side to protect the RDLs and reduce the warpage of the thin wafer. After completing the back side dielectric layer and RDL (Figure 2f), the carrier wafer was deboned, and the solder balls were attached (Figure 2g). Finally, the reconstituted wafer was diced into individual packages (Figure 2h).

The vertical interconnection structure played an irreplaceable role in allowing the signal/control needs to access from the top RDL to the bottom RDL, and this was due to its advantages of improving integration and fast transmission rates. The interconnect structure allowed signals to pass through multiple layers vertically, facilitating efficient use of the available package area. This enabled a higher integration density and the accommodation of complex routing requirements, even in compact form factors. Connecting the top and bottom RDLs directly shortened the signal paths, resulting in reduced propagation delays and improved signal transmission rates. This was particularly important for high-speed communication and high-frequency applications, where minimizing signal delays was critical for maintaining signal integrity and achieving optimal performance.

At present, various types of vertical interconnections have been developed successfully, including through silicon via (TSV), through glass via (TGV), and through mold via (TMV). TSV structures have significant advantages in semiconductors, and CMOSs in image sensors [24]. However, TSV suffers from low material compatibility and high process costs. On the other hand, TGV structures offered greater advantages in terms of radio frequency and microwave transmission, but their material processing capabilities were limited [25]. Therefore, TMVs have gained significant attention due to their simple fabrication process, low cost, and excellent applicability.

In this project, TMV interposers were implemented to realize the vertical interconnection. Currently, there are several methods available to prepare TMV for integrated circuit packaging, such as laser etching [26], Cu pillar [27], wire bonding [28], and the imprint method [29]. In [26], the TMV was created by laser etching through the embedding molding compound and then metalized via Cu plating. This technique enabled 3D interconnections in multi-chip system in package (SiP) module stacks. The SiP module comprised a stack of multiple sensors, including a pressure sensor and an acceleration sensor, as well as an application-specific integrated circuit (ASIC) package with TMVs. It was specifically designed for a multi-sensor device for indoor navigation. In [27], The TMV was produced using the Cu pillar technique, which involved depositing copper metallization in the developed area of the photoresist. The unique feature of the tall Cu pillar allowed for the design of AiP to satisfy the wide bandwidth characteristic, making it ideal for highly integrated 5G mm-Wave scenarios. In [21], TMV was created using wire bonding, which was evaluated for an ultra-thin package-on-package (PoP) application. The use of vertical Cu wire bonding was cost-effective, as it eliminates many process steps, such as a thick PR coating and Cu plating. In [28], A proposed process called Imprint-Through Mold Via (i-TMV) involved imprinting with a silicon master and filling with conductive paste. The i-TMV has shown its Electromagnetic Interference (EMI) shielding effect through electric field simulation, making it a promising option for compartmental level EMI shielding of radio frequency modules.

In contrast to the abovementioned methods and other works in the literature [29,30], the TMV interposers were fabricated using a mechanical drilling and electroplating process, which has significant benefits in terms of fewer steps and lower cost. Vias were manufactured using mechanical drilling on a glass fiber board with a thickness of 400 μm. The diameter of the vias was 120 μm, with a spacing of 250 μm. The vias were filled using the electroplating process, resulting in a 12-inch core board. To ensure the stability and usability of the core board during the packaging process, resin materials were applied to protect both sides of the core board, attaining a TMV interposer.

As shown in Figure 3a, the 1 × 1 TMV interposer array was selected, with a copper column with a diameter of 120 μm and without surface anomalies. It was important to note that the TMV interposer can be produced in different sizes and arrays by adjusting the diameter and spacing of vias to satisfy various requirements. The Cu RDL was implemented on the TMV interposer side of the reconstructed wafer. The passivation layer was accomplished using photoresist materials, and Cu redistribution traces were created through a seed layer deposition and electroplating process. The processes were optimized for fine-pitch RDL, resulting in good coverage, without damaging the RDL (Figure 3b).

In order to protect the front-side RDLs and minimize the warpage of the thin wafer, a thick carrier was employed as a support wafer before thinning. The reconfigured wafer was thinned to 450 μm, exposing Cu pillar of the TMV interposer on the back side, as shown in Figure 3c. The diameter of the exhibited Cu pillar was 120 ± 3 μm, consistent with the result of the front-side Cu pillar. The results indicated that the Cu pillars in the TMV interposer were uniform. After debonding from the carrier wafer, solder balls were attached. The reconstituted wafer was then diced into individual packages. A cross-section analysis demonstrated that the copper trace was electroplated over the dielectric via an opening on the Cu TMV. The integrity of the TMV interposer with the top and bottom RDL was also confirmed, as shown in Figure 3d.

3. Antenna-in-Package Design

To design the AiP solution effectively, it was crucial to have a comprehensive understanding of the electrical properties of the EMC used in the mm-Wave band. The performance of AiP was significantly influenced by the relative permittivity and loss tangent of the applied material. Consequently, a CPW structure was devised to derive these properties. Figure 4 presents a top view of the CPW structure, featuring five parameters: the width (w) of the metal electrodes on both sides, the spacing (g) between the electrode and the middle signal line, the width (s) of the signal line, the thickness (t) of the metal electrode, and the thickness (h) of the substrate., The design parameters were optimized to be w = 1 mm, g = 0.03 mm, s = 0.26 mm, t = 0.005 mm, and h = 0.7 mm based on actual process parameters and simulation results. The structure of CPW was measured using ground–signal–ground (GSG) probes. The material parameters (ε_r, tanδ) of the EMC were attained by measuring the S-parameters and applying a calculation formula. To ensure greater accuracy, transmission lines of different length were manufactured for testing, resulting in the following average values: ε_r = 3.93 ± 0.1 and tanδ = 0.006 ± 0.002 at 28 GHz. These data will support subsequent electrical simulations.

FOWLP technology has been extensively validated as an effective solution for mm-Wave applications. Figure 5 illustrates the architecture of designed AiP, which was composed of a TMV interposer, EMC, and double-sided RDLs sandwiching the mold compound. The proposed patch antenna was fabricated on the EMC substrate with a thickness of 0.04 λ₀. The dielectric and RDL layers were established on dual sides of the EMC. The top RDL was designed for the active antenna patch and parasitic patch antenna, while the bottom RDL served as the ground plane (GND). The TMV interposer was employed to route the interconnections between the patch and GND.

In particular, Figure 5c described the geometry of the proposed antenna. It consisted of three components: a main radiating patch, six metallic parasitic patches symmetrically placed along with the main radiating patch on the top layer, and a ground plane on the bottom layer. The size of the main radiating patch was L1 × W1. The size of all parasitic square patches was equivalent with a. The gap between parasitic square patches was b, the range between parasitic patches and main radiating patch was c, and the diameter of Cu via was d.

Patch antennas were extensively utilized in various fields, including satellite communication and environmental detection, due to their compact size, thin profile, simple manufacturing process, low cost, ease of integration, and ability to support dual-band and multi-band operations. However, the development of the patch antenna was hindered by its relatively narrow impedance bandwidth. A wide range of research works have been conducted to broaden the bandwidth of patch antennas. These studies investigated different techniques, including increasing the thickness of dielectric substrates, incorporating parasitic patches, and employing coupling feeding [31].

In this study, six metallic parasitic patches were developed to expand the bandwidth. By loading these parasitic patches in the particular manners, a new resonant frequency of the patch antenna was excited, resulting in a wider operational bandwidth [32]. In order to verify the above research conclusion, a single patch antenna with the same size and feeding way is given for a comparison. The simulated |S11| of the patch antenna with and without the symmetrical parasitic patches is plotted in Figure 6. The introduction of these parasitic patches results in a wider impedance bandwidth, ranging from 24.2 to 28.5 GHz.

In order to analyze the main factors of fabrication in TMV-embedded FOWLP technologies and evaluate the electrical performance of antenna, the effects of various geometrical parameters, such as the TMV height and TMV size, were investigated. The parameters for the patch antenna design in Figure 7 are presented in

Table 1. The optimized parameters of the antenna element.

Parameter	Value (mm)	Parameter	Value (mm)
L1	2.841	c	0.272
W1	2.519	h	0.45
L2	1.255	d	0.1
a	2.333	W	9.018
b	0.185	L	13.128

. Figure 7a shows the return loss characteristics under different values of TMV height. It can be observed that when the TMV height increased, the first and second resonant frequencies of each antenna were shifted down simultaneously. In addition, when the height increased to 300 μm, the two resonances became further separated, but the resulting input matching worsens. Figure 7b revealed the effect of the TMV size on the return loss. With the antenna height increased, the first resonant frequencies were rarely changed, while the second resonant frequencies shifted toward a lower frequency region, leading to a narrower bandwidth. During the fabrication procedure, it was likely necessary to take the misalignment effect and restriction into account. Thus, the TMV height and TMV size chosen were set at 300 μm and 0.6 × 0.6 mm², separately.

The impact of the constitutive parameters of the parasitic patch structure on the bandwidth was investigated. Figure 8 demonstrated the variation trend of |S11|, which was substantially impacted by the parameters of the parasitic patch structure. As demonstrated in Figure 8, with the increase in a, the lower resonant frequencies were different, while the significant decrease in higher resonant frequencies resulted in a narrower operating bandwidth, but the impedance matching was improved. With the increase in c, the dramatically increased lower resonant frequency, together with the slightly decreased higher resonant frequency, led to a wider operating bandwidth.

4. Antenna Performance

The parameters of the designed patch antenna were optimized using Ansys HFSS 2020R1 software and are listed in Table 1. The EMC used in the substrate has a relative permittivity of 3.93 and a loss tangent of 0.006. The dielectric polymer has a dielectric constant of 3.3 and a loss tangent of 0.008, and the coaxial feeding method was employed. The fabricated sample of the patch antenna element is shown in Figure 9.

A GSG probe was employed to establish contact with the feeding CPW line. The S-parameters of the fabricated samples were measured by utilizing a vector network analyzer. Additionally, the gains and radiation patterns of the samples were evaluated within an anechoic chamber, which provided accurate measurements of the antenna’s performance without interference from external reflections. The simulated and measured return losses and realized gains are shown in Figure 10. The measured results indicated that the −10 dB impedance bandwidth of the proposed patch antenna is 17% from 24.2 to 28.5 GHz, and the center frequency is 26.3 GHz. It was demonstrated that the patch antenna constructed via TMV-embedded FOWLP satisfied the frequency band used for 5G communications of n258 (24.25–27.5 GHz) and n261 (27.50–28.35 GHz). Moreover, as shown in Figure 10b, the measured gain was more than 7.5 dBi from 24.2 to 29.4 GHz. The gain at 26 GHz reached 9.1 dBi. Therefore, this patch antenna was capable of meeting the high gain and broadband requirements of 5G communications. The evaluated gains and radiation patterns, along with the expanded bandwidth achieved through the optimization techniques, make it well-suited for 5G communication applications, for which high performance and broad coverage are crucial.

The simulation and measurement results for the E- and H-plane radiation patterns of the proposed patch antenna are illustrated in Figure 11. The radiation patterns in the E-and H-planes presented good consistency at testing frequencies, and stable broadside radiation patterns for the patch antenna were realized. The measured results were slightly different from the simulated ones, which may be caused by process tolerance and a constant value of loss tangent in simulation at different frequencies.

In addition, comparisons with the previous related works are summarized in

Table 2. Comparison with the previous related works.

Work	Technique	Frequency (GHz)	Number of Layer	Thickness (λ0)	FWB (%)	Gain (dBi)	Antenna Type
[33]	HDI	27.5–29.5	8	0.072	7.01%	4.0	Patch
[34]	PCB	23.5–28	3	0.044	17.4%	6.0	Patch
[27]	FOWLP	25–43	2	0.119	64.3%	5.0	ME dipole
[35]	LTCC	26.3–29.8	10	0.090	12.4%	3.1	Patch
[36]	PCB	27.5–29.5	10	0.076	9.3%	5.7	Yagi-Uda
[37]	FOWLP	26.5–29.7	2	0.042	12.1%	5.3	Patch
This work	TMV-embedded FOWLP	24.2–28.5	1	0.040	17.8%	7.5	Patch

. All parameters were dependent on a single antenna element. Numerous works with PCB, LTCC, HDI, and FOWLP technologies operating at 5G frequency bands were embodied for comparison. The performance indicated that the proposed antenna possessed the advantages of a low profile, easy processing, and high gain.

5. Results

The designed patch antenna with a low profile and wide bandwidth was illustrated based on novel TMV-embedded FOWLP technology. The TMV-embedded package provided the possibility to realize low-loss interconnects. The element gain was higher than 7.5 dBi, and the return loss (|S11| ≤ 10 dB) ranged from 24.2 to 28.5 GHz, which covered the requirements of 5G systems. Therefore, the outstanding results of the designed patch antenna in this work demonstrated that the TMV-embedded FOWLP process is ideally suited for AiP for 5G mm-Wave application.