Series/Parallel Boost/Buck DC/DC Converter as a Visible Light Communication HB-LED Driver Based on Split Power ^†

Abstract

This paper presents a high-brightness LED (HB-LED) driver for visible light communication (VLC) based on two converters. The first is a high-frequency buck DC/DC converter and the second is a low-frequency boost DC/DC converter, connected in series with respect to the LED load and connected in parallel at the input, forming a series/parallel boost/buck DC/DC converter. It is well known that a VLC system needs to perform two different tasks: biasing the HB-LED load and transmitting the communication signal. These typically have different power requirements; the bias power is 75%, while the communication power is 25% of the total power. The requirements of each converter are also different; the communication signal requires a fast output response and, therefore, a high switching frequency, while the biasing control does not require a converter with a high output voltage response. The proposed architecture in this paper takes advantage of the differences between the two tasks and achieves high efficiency and high communication performance by means of splitting power between the two DC/DC converters. The high-frequency buck DC/DC converter tracks the communication signal, while the low-frequency boost DC/DC converter is responsible for lighting tasks. This technique enables high efficiency because most of the power is processed by the low-frequency converter, while a minor part of the power is processed by the high-frequency converter, achieving high communication performance. To provide experimental results, the proposed VLC HB-LED driver was built and validated by reproducing a 64-QAM with a bit rate up to 1.5 Mbps, reaching 91.5% overall efficiency.

1. Introduction

Wireless communication systems are essential for the present and future development of society. Furthermore, the speed required by each communication service is continuously growing due to the high transmission per second (i.e., bit rate) required by mainstream services. As a result, the radio frequency (RF) spectrum is already extremely congested, so enabling the data traffic predicted in the next few years requires further research into new wireless communication technologies [1].

Visible light communication (VLC) [2] is one of the most promising solutions for alleviating the saturation of the RF spectrum. VLC uses the wide, unlicensed, visible light spectrum (430–750 THz range) to transmit information. The strength and potential of this approach become apparent when the communication task is merged with the lighting functionality of high-brightness LED (HB-LED) lamps [3,4].

Figure 1 shows the behavior of an HB-LED load and the intrinsic behavior in a VLC system. A VLC system needs to accomplish two tasks: ensure the desired lighting level by controlling the average current through the HB-LEDs, and reproduce the communication signal by applying a high-frequency communication waveform to the HB-LEDs. As Figure 1 shows, for a specific average current nI_avg, a light flux nϕ_avg is emitted and a voltage is obtained. This voltage nV_avg(T) depends on the temperature T of the HB-LEDs. If a temperature shift. (T₂ > T₁) takes place, then the HB-LEDs go from a lower temperature T₁ to a higher temperature T₂. Here, the necessary nV_avg(T) decreases for the same current nI_avg. This undesired effect means a control system is needed for the HB-LEDs [5]. If this effect is not corrected, the quality and performance of the communication could be affected [6]. Therefore, the driver has to control the average current so that it is always working in the middle of the HB-LED’s linear region. This point (i.e., the middle of the HB-LED’s linear region) always maximizes the range for the communication signal, nV_Ω. Therefore, we define the nV_Ω as a region between the threshold voltage nV_th(T) and the maximum voltage nV_max(T). In other words, it represents the linear part of the voltage–current relationship.

Turning our attention to nV_Ω, the communication controller must generate the communication signal within the linear part of the voltage–current relationship (i.e., nV_th(T)). If the temperature changes, the slope of the curve and the maximum HB-LED current do not change (Figure 1). This is particularly important because the working range (i.e., nV_th(T)) is also unchanged. Provided that the communication is always lower than the nV_Ω, and provided the bias task corrects the current properly (i.e., nI_avg), distortion of the emitted light is minimized [6].

The most popular approach for reproducing passband modulation schemes involves the use of a bias-T architecture. In this approach, a high-efficiency DC/DC converter provides a positive DC voltage to bias the HB-LEDs, while the signal to be transmitted is reproduced using a linear power amplifier (LPA) [7,8,9]. Both voltage components are then combined and injected into the HB-LED set with a bias-T circuit made up of a coupling capacitor and a choke inductor. Class A and Class A/B LPAs are typically used due to their high linearity in reproducing high-bandwidth signals. Nevertheless, their reported power efficiencies are very poor (10–40%), thus degrading the overall efficiency of the system and limiting the transmitted power, which in turn limits the communication range. This drawback is particularly significant in the design of VLC drivers for high-power HB-LED loads (office lighting, car headlights, outdoor lighting, etc.) where the extra power losses require the use of additional heatsinks and cooling systems [10].

Another way to implement a VLC transmitter is to modify the traditional HB-LED driving stage by integrating the communication task, producing a VLC HB-LED driver. To overcome the efficiency issue, the use of fast-response DC/DC converters has been proposed as an alternative for delivering both the bias voltage and the communication signal. Nevertheless, the high switching frequency required by the DC/DC converter to accurately reproduce the communication signal and the need to process all the bias power (much higher than the communication power) at that frequency leads to high switching losses and/or extremely complex designs from a hardware perspective (multilevel and multiphase topologies, 6th- to 12th-order filters, etc.) [11,12,13]. Therefore, one way to further improve efficiency is by splitting the power between two DC/DC converters: one fast-output current DC/DC converter in charge of communication and another, slow-output current DC/DC converter in charge of bias tasks (responsible for delivering the bias power and then maintaining illumination at the desired level in response to temperature changes) [14,15,16]. In [14], two buck DC/DC converters were placed with the output in series with respect to the HB-LED load: one low-frequency converter for the lighting tasks at low frequency and a high-frequency converter for the communication signal. This architecture achieved high efficiency and communication capability. However, the main drawback of this approach is the need for two different input voltages that are isolated from each other. In [15], the need for two different input voltages (not isolated from each other) was addressed by using two buck DC/DC converters in a two-input buck (TIBuck) configuration. The main drawback of this topology is the reduction in resolution for tracking the voltage across the HB-LED load versus temperature changes. In [16], a Class A/B LPA handles the communication tasks and a buck DC/DC converter controls the lighting. Because Class A/B processes very little power, the efficiency penalty is reduced. However, the signal to be transmitted does not take advantage of the full linear region of the HB-LED load.

This paper presents a VLC HB-LED driver based on a low-frequency boost DC/DC converter and a high-frequency buck DC/DC converter. It is called a series/parallel boost/buck DC/DC converter. The two DC/DC converters have a connection in parallel at its output and are connected in series with the HB-LED load. The proposed topology uses the technique of splitting the power to achieve the best performance. The low-frequency boost DC/DC converter is responsible for controlling the HB-LED lighting task, while the high-frequency buck DC/DC converter handles communication performance. This technique allows for most of the bias power to be processed by the low-frequency converter (achieving high efficiency). Meanwhile, the high-frequency converter delivers the communication power, taking advantage of the entire linear region of the HB-LED load (achieving high communication performance). This configuration follows the same principles as other split-power proposals for VLC but without the need for two input voltages (isolated from each other) [14] and without being unable to take advantage of the buck DC/DC converter useful duty cycle range, which always provides the maximum resolution to track the output voltage (taking advantage of the entire linear region of the HB-LED) [15].

This paper is organized as follows. Section 2 reviews the analysis of the series/parallel boost/buck DC/DC converter. Section 3 describes the power flow between the two converters and an efficiency analysis. The experimental results are given in Section 4. Section 5 discusses the main characteristics of the converter and compares its performance with the state of the art [14,15,16], and finally, the conclusions are described in Section 6.

2. Analysis of the Series/Parallel Boost/Buck DC/DC Converter as a VLC HB-LED Driver

2.1. Principle of Operation

A block diagram of the proposed topology is shown in Figure 2a, and an example of the waveforms is shown in Figure 2b. Both converters are connected to the same input voltage V₁, and their outputs are connected in series with respect to the HB-LED string load. The HB-LED string load comprises HB-LEDs. The boost DC/DC converter is responsible for generating a DC voltage V_bias, while the buck DC/DC converter generates the communication signal v_sig(t), as shown in the block diagram in Figure 2a.

In order to make the n HB-LED string work within the linear region (Figure 1), the HB-LED voltage v_o(t) has to be between the threshold voltage nV_th(T) and the maximum voltage nV_max(T), where Vth(T) and V_max(T) are the threshold and maximum voltages of a single HB-LED, and nV_avg(T) is the voltage in the middle of the linear region of the HB-LED string. For the sake of simplicity, the HB-LED string’s working range is defined according to the middle point of the linear region nV_avg(T). It is important to highlight that the dependency on temperature is noted as (T).

The useful voltage range of the HB-LED load for communication (i.e., the peak-to-peak maximum amplitude allowing for the communication signal due to its linearity) is nV_Ω, defined as follows:

$${nV}_{\mathsf{\Omega }}=n{V}_{\mathrm{m}\mathrm{a}\mathrm{x}}\left(T\right)-n{V}_{\mathrm{t}\mathrm{h}}\left(T\right),$$

(1)

where nV_Ω has no dependency on temperature. For the sake of simplicity, the limits of the useful voltage range of the HB-LED can be obtained from the middle point of the linear region, nV_avg(T).

$${nV}_{max}=n{V}_{avg}\left(T\right)+{\displaystyle \frac{n{V}_{\mathsf{\Omega }}\left(T\right)}{2}},$$

(2)

$${nV}_{th}=n{V}_{avg}\left(T\right)-{\displaystyle \frac{n{V}_{\mathsf{\Omega }}\left(T\right)}{2}}.$$

(3)

Considering (2) and (3), we can conclude that controlling nV_avg(T) when the temperature varies always allows the HB-LED string to work at the middle point of the linear region, which defines the useful voltage range of the HB-LED load for communication, nV_Ω. According to Figure 2a, the expression of the voltage across the HB-LED string is

$$v_{\mathrm{o}}\left(t\right)=V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}-v_{\mathrm{s}\mathrm{i}\mathrm{g}}\left(t\right).$$

(4)

V_bias (the voltage of the boost DC/DC converter) only has a DC component (neglecting its ripple), while v_sig(t) (the voltage of the buck DC/DC converter) can be represented by its average value (V_sig) plus the amplitude of the signal (Δv_sig(t)):

$$v_{\mathrm{s}\mathrm{i}\mathrm{g}}\left(t\right)=V_{\mathrm{s}\mathrm{i}\mathrm{g}}-{∆V}_{\mathrm{s}\mathrm{i}\mathrm{g}}\left(t\right).$$

(5)

2.2. Resolution of the Buck DC/DC for Tracking the Output Voltage

The target is to keep the average voltage of the string of HB-LEDs, V_o = avg(v_o(t)), equal to nV_avg(T) at any temperature. Moreover, it is important to note that V_o only depends on the average value of the output voltage of both converters, which is

$$V_{\mathrm{o}}={nV}_{\mathrm{a}\mathrm{v}\mathrm{g}}\left(T\right)=V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}-V_{\mathrm{s}\mathrm{i}\mathrm{g}}.$$

(6)

Equation (6) shows that the biasing point can either be controlled by the average value of the boost or the buck DC/DC converters. If control of the temperature drift is implemented via the action of the boost DC/DC converter, we can conclude that it is only the boost DC/DC converter output voltage, V_bias, that compensates for temperature changes, making the average value of the buck DC/DC converter independent of the temperature. This is very important because the buck DC/DC converter always has the maximum resolution in its duty cycle (i.e., d_bu(t)) for tracking v_o(t).

If d_bu(t) is the duty cycle of the buck DC/DC converter, then v_sig(t) can be expressed as a function of d_bu(t) and V₁:

$$v_{\mathrm{s}\mathrm{i}\mathrm{g}}\left(t\right)={V_{1}d}_{\mathrm{b}\mathrm{u}}\left(t\right).$$

(7)

Substituting (7) into (4), the value of v_o(t) becomes

$$v_0\left(t\right)=V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}-{V_{1}d}_{\mathrm{b}\mathrm{u}}\left(t\right),$$

(8)

where [0, 1] is the range of d_bu(t); the highest output voltage occurs for d_bu(t) = 0, and the lowest output voltage occurs for d_bu(t) = 1. Considering previous definitions, the range of the output voltage is [V_bias − V₁, V_bias]. At this point, two design rules can be defined if we want the entire useful voltage range of the HB-LED load (i.e., nV_Ω) to be used for communication.

$$n{V}_{\mathrm{m}\mathrm{a}\mathrm{x}}\left(T\right)=V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}},$$

(9)

$${nV}_{th}\left(T\right)=V_{bias}-V_1.$$

(10)

Figure 3a shows that the full range of d_bu(t) defines useful voltages in the linear region of the HB-LED load, maximizing the resolution of the buck DC/DC converter for tracking the output voltage for communication tasks.

Considering (1), (9), and (10), the following expression is obtained:

$$V_1={nV}_{\mathsf{\Omega }}.$$

(11)

Therefore, V₁ determines the value of the voltage that maximizes the trackable output voltage range of the buck DC/DC, which only depends on nV_Ω. As previously mentioned, nV_Ω does not depend on temperature. This is extremely important because maximization of the output voltage range of the buck DC/DC for tracking the communication signal v_sig(t) is independent of the temperature. Figure 3 shows the representation of the output voltage range of the buck DC/DC converter (by means of the d_bu(t) useful range) versus the useful voltage range of the HB-LED load and their impact on the resolution when the temperature changes from T₂ to T₁, with T₁ > T₂. If (9) and (10) are fulfilled by the boost DC/DC converter, two conclusions can be drawn. First, the boost DC/DC converter is responsible for temperature changes. Second, the boost DC/DC converter provides the maximum resolution to the buck DC/DC converter for tracking its output voltage (i.e., v_sig(t)), and therefore, the output voltage across the HB-LED load (i.e., v_o(t)) versus temperature changes. Thus, the series/parallel boost/buck DC/DC converter improves on the performance reported in [14,16] because it uses only a single-input voltage source (unlike [14], which uses two). Moreover, the proposed converter is better than that in [15] in terms of resolution versus temperature changes. However, both converters process all power, and the main switches are rated for the input voltage. This is the price for using only a single voltage source and the improvement in terms of resolution with temperature changes.

2.3. Controlling the Average Value of the Voltage Across the HB-LED Load

As previously mentioned, the boost converter is responsible for controlling the average value of v_o(t). With D_bias being the duty cycle of the boost DC/DC converter, V_bias can be expressed as

$$V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}={\displaystyle \frac{V_1}{1-V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}}}.$$

(12)

By substituting (12) into (6), and assuming that the duty cycle of the buck converter is 0.5 to maximize the useful d_bu(t) range, the average value of output voltage can be rewritten as

$$V_{\mathrm{o}}={nV}_{\mathrm{a}\mathrm{v}\mathrm{g}}\left(T\right)={\displaystyle \frac{V_1}{1-V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}}}-{\displaystyle \frac{V_1}{2}}.$$

(13)

It is important to note that all previous equations define the behavior and the design of both the buck DC/DC and boost DC/DC converters, ensuring maximum resolution at the output of the buck converter when the temperature shifts in the HB-LED load.

3. Power Flow and Efficiency Analysis

An important consideration to study is the power flow between the two converters to achieve power balance and efficiency of the series/parallel boost/buck DC/DC converter. Note that the boost DC/DC converter injects power into the HB_LED load, but the buck DC/DC converter drains power from the HB_LED load.

3.1. Power Flow Analisys

As Figure 2a shows, I_bo is required by the boost DC/DC converter from the voltage source V₁. In contrast, the buck DC/DC converter injects I_bu into V₁. Therefore, I_in can be written as

$$I_{\mathrm{i}\mathrm{n}}=I_{\mathrm{b}\mathrm{o}}-I_{\mathrm{b}\mathrm{u}}.$$

(14)

The boost converter injects an average power to the HB-LED load, generating the voltage V_bias and the I_o current. In this case, the power of the boost DC/DC converter is

$$P_{\mathrm{bo-out}}=I_{\mathrm{o}}·V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}.$$

(15)

One part of the power is processed by the HB-LED load, P_LED. By using (4), P_LED can be expressed as

$$P_{\mathrm{L}\mathrm{E}\mathrm{D}}=I_{\mathrm{o}}·V_{\mathrm{o}}=I_{\mathrm{o}}·{(V}_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}-V_{\mathrm{s}\mathrm{i}\mathrm{g}}),$$

(16)

where V_o is the average value of v_o(t) and V_sig is the average value of v_sig(t). The other part of the power is processed by the buck DC/DC and drained from the HB-LED load by injecting I_bu to V₁. Thus, the buck DC_/DC converter drains P_bu-in, which can be written as

$$P_{\mathrm{bu-in}}=I_{\mathrm{o}}·V_{\mathrm{s}\mathrm{i}\mathrm{g}}.$$

(17)

3.2. Simplification of Series/Parallel Boost/Buck DC/DC

This converter’s way of processing power allows it to be simplified. A buck DC/DC converter that drains rather than supplies current can be analyzed as a boost DC/DC converter. Due to this, one possible series/parallel boost/buck DC/DC Converter implementation is that shown in Figure 4.

If the switching of both converters is asynchronous, it is possible to connect both MOSFETs to the ground, making implementation easier because an isolator is not needed to control the floating MOSFET in the buck DC/DC converter.

3.3. Efficiency Analysis

Efficiency analysis was carried out by examining the efficiency of each converter in the series/parallel boost/buck DC/DC converter. Figure 2a defines the efficiency of the boost DC/DC converter as η_bo-lf, and the efficiency of the buck DC/DC converter as η_bu-hf. Moreover, Figure 2a defines the input power as

$$P_{\mathrm{i}\mathrm{n}}=I_{\mathrm{i}\mathrm{n}}·V_1=V_1·{(I}_{\mathrm{b}\mathrm{o}}-I_{\mathrm{b}\mathrm{u}}).$$

(18)

The output power is defined in (16). Therefore, the efficiency of the series/parallel boost/buck DC/DC converter (i.e., η_t) can be easily defined by the output power divided by the input power:

$${\eta }_{\mathrm{t}}={\displaystyle \frac{P_{\mathrm{L}\mathrm{E}\mathrm{D}}}{P_{\mathrm{i}\mathrm{n}}}}={\displaystyle \frac{I_{\mathrm{o}}·{(V}_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}-V_{\mathrm{s}\mathrm{i}\mathrm{g}})}{V_1·{(I}_{\mathrm{b}\mathrm{o}}-I_{\mathrm{b}\mathrm{u}})}}={\displaystyle \frac{I_{\mathrm{o}}·V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}-I_{\mathrm{o}}·V_{\mathrm{s}\mathrm{i}\mathrm{g}}}{V_1·I_{\mathrm{b}\mathrm{o}}-V_1·I_{\mathrm{b}\mathrm{u}}}}.$$

(19)

The input power of the boost DC/DC converter can be expressed as a function of the input voltage and the input current:

$$P_{\mathrm{bo-in}}=I_{\mathrm{b}\mathrm{o}}·V_1.$$

(20)

The output power of the buck DC/DC converter can be expressed as a function of the input voltage and its output current:

$$P_{\mathrm{bu-out}}=I_{\mathrm{b}\mathrm{u}}·V_1.$$

(21)

By substituting (15), (17), (20), and (21) into (19), the efficiency η_t can be rewritten as

$${\eta }_{\mathrm{t}}={\displaystyle \frac{P_{\mathrm{bo-out}}-P_{\mathrm{bu-in}}}{P_{\mathrm{bo-in}}-P_{\mathrm{bu-out}}}}.$$

(22)

The input power of the boost DC/DC converter (i.e., P_bo-in) can be rewritten as a function of its output power and its efficiency (i.e., η_bo-lf):

$$P_{\mathrm{bo-in}}={\displaystyle \frac{P_{\mathrm{bo-out}}}{{\eta }_{\mathrm{bo-lf}}}}.$$

(23)

Following the same procedure, the output power of the buck DC/DC converter can be expressed as a function of its input power (i.e., P_bu-in) and its efficiency (i.e., η_bu-hf):

$$P_{\mathrm{bu-out}}=P_{\mathrm{bu-in}}·{\eta }_{\mathrm{bu-hf}}.$$

(24)

Taking into account (23) and (24), (22) can be rewritten as

$${\eta }_{\mathrm{t}}={\eta }_{\mathrm{bo-lf}}·{\displaystyle \frac{1-\frac{P_{\mathrm{bu-in}}}{P_{\mathrm{bo-out}}}}{1-{\eta }_{\mathrm{bo-lf}}·{\eta }_{\mathrm{bu-hf}}·\frac{P_{\mathrm{bu-in}}}{P_{\mathrm{bo-out}}}}}.$$

(25)

In order to simplify the analysis of (25), a new parameter will be defined. This parameter is α, defined as

$$\alpha ={\displaystyle \frac{P_{\mathrm{bu-in}}}{P_{\mathrm{bo-out}}}}={\displaystyle \frac{V_{\mathrm{s}\mathrm{i}\mathrm{g}}·I_{\mathrm{o}}}{V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}·I_{\mathrm{o}}}}={\displaystyle \frac{V_{\mathrm{s}\mathrm{i}\mathrm{g}}}{V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}}},$$

(26)

where α depends on the amplitude of the communication signal (i.e., V_sig) and the output voltage of the boost DC/DC converter that defines the bias of the HB-LED load (i.e., V_bias).

Now, putting (26) into (25), the overall efficiency of the series/parallel boost/buck DC/DC converter is

$${\eta }_{\mathrm{t}}={\eta }_{\mathrm{bo-lf}}·{\displaystyle \frac{1-\alpha }{1-{\eta }_{\mathrm{bo-lf}}·{\eta }_{\mathrm{bu-hf}}·\alpha }}.$$

(27)

Equation (27) shows the dependency of η_t on the efficiency of each converter in the series/parallel boost/buck DC/DC converter architecture. For example, in an edge case, when there is no signal, V_sig equals zero and, therefore, the overall efficiency is the efficiency of the boost DC/DC converter.

It is important to note that the series/parallel boost/buck DC/DC converter supplies an HB-LED load for communication. As explained in Section 2.2, the idea is to take advantage of all useful voltages in the linear region of the HB-LED load. This means that the value of V_sig must be 0.5 V_Ω. By using (7), (9), (11), and (26), the α parameter can be expressed as a function of the HB-LED characteristics:

$$\alpha ={\displaystyle \frac{V_{\mathsf{\Omega }}}{2V_{\mathrm{m}\mathrm{a}\mathrm{x}}}}.$$

(28)

Taking typical values of commercial HB-LEDs [17], V_Ω = 1 and V_max = 4, these values define an α parameter of 0.125. Taking advantage of this calculation, it is very interesting to evaluate how each converter’s efficiency (i.e., buck DC/DC converter and boost DC/DC converter) influences the overall efficiency of the series/parallel boost/buck DC/DC converter. Figure 5 presents this analysis, evaluating the η_t in two cases. In the first case, the efficiency of the boost converter is kept constant at 0.95 (i.e., η_bo-lf = 0.5) and the efficiency of the buck DC/DC converter varies between 0.8 and 1 (solid line in Figure 5). In the second case, the efficiency of the buck DC/DC converter is kept constant at 0.95 and the efficiency of the boost DC/DC converter varies between 0.8 and 1 (dotted line in Figure 5). As Figure 5 shows, the range of variation in the η_t is lower when the efficiency of the buck DC/DC converter varies and the efficiency of the boost DC/DC converter is kept constant. It is clear that the efficiency of the proposed series/parallel boost/buck DC/DC converter depends more on the efficiency of the boost DC/DC converter (i.e., η_bo-lf). This is because the boost DC/DC converter processes higher power levels, making its efficiency much more important. This is a notable benefit because the boost DC/DC converter operates at a lower switching frequency, and it is easier to achieve higher efficiency here than in the buck DC/DC converter, which operates at a higher frequency.

4. Experimental Results

The design and experimental results of a VLC driver prototype based on the parallel/series buck/boost converter proposed above are presented below. Figure 6a shows the prototype, and Figure 6b shows a schematic and block diagram of the control used.

As explained above, both converters share the same input voltage and are connected to the same set of HB-LEDs as a load. These HB-LEDs are differentially connected between the outputs of the boost DC/DC converter and the buck DC/DC converter. Control of both converters was implemented using a Nexys A7 FPGA [17]. The FPGA inputs were the bits to be transmitted, the lighting control, and the current flowing through the set of HB-LEDs. The FPGA implemented an average current control through the HB-LEDs and thus controlled the gate signals of the boost DC/DC converter. In this way, control of the average current flowing through the HB-LED load was implemented by controlling the value of the average output voltage. Moreover, the FPGA also controlled the buck DC/DC converter, which operated in an open loop, reproducing the communication signals generated by the modulator block.

The load used consisted of 8 XLamp MX-3 PC-LEDs [18] in series, which was the initial design parameter of the parallel/series buck/boost converter. The amplitude of the linear zone of each LED was VΩ = 1 V. By applying (11), the input voltage was calculated, obtaining 8 V. As explained above, this voltage value is what allowed the maximum resolution to be obtained in the output voltage of the buck DC/DC converter. The average current through the set of HB-LEDs remained at 0.25 A, at the midpoint of the linear zone. The different parts of the specific design of the VLC driver architecture are outlined below.

4.1. Design of the Boost DC/DC Converter

The boost DC/DC converter is designed to operate as a traditional HB-LED driver with a switching frequency of 100 kHz, working in a closed loop. This converter controls the average voltage across the HB-LED load to control the average current flowing through them. Taking advantage of the slow dynamics of the temperature change in the HB-LEDs, neither a high switching frequency nor a fast response time in the converter is required. A trade-off regarding the choice of switching frequency must be highlighted: increasing the switching frequency allows the converter to be smaller (especially the reactive elements), increasing the switching losses and putting the converter’s switching harmonic content closer in frequency to the signal bandwidth. The design of the converter elements does not differ from the traditional design of a boost DC/DC converter used as a traditional HB-LED driver, except for the considerations related to attenuating the switching noise. This noise is produced by the output voltage ripple of the boost DC/DC converter. The output capacitor must be suitable for decreasing the impact on the communication signal:

$$C_{bo}={\displaystyle \frac{∆Q}{∆2V_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}}}={\displaystyle \frac{I_{\mathrm{O}}{D}_{bo}{T}_{bo}}{∆2v_{\mathrm{b}\mathrm{i}\mathrm{a}\mathrm{s}}}}.$$

(29)

where ΔQ is the total charge of the capacitor, D_bo and T_bo are the duty cycle and period of the boost DC/DC converter, respectively, and Δv_bias is its output voltage ripple.

The value of the output capacitor C_bo was calculated by applying (29) and limiting the ripple ∆v_bias to 2%. No additional analysis was required for the input choke calculation, and traditional design rules were followed. The values of both reactive elements can be found in

Table 1. List of main components of the boost DC/DC converter.

Qbo-1 and Qbo-2	Boost Driver	Lbo	Cbo
CSD88539	ISL6700	71 µH	9 µF

. Regarding component selection, the boost DC/DC converter was implemented in synchronous mode using the CSD88539 MOSFET integrated circuit, with Q_bo−1 and Q_bo−2 on the same chip. The driver circuitry was implemented with an ISL6700 half-bridge gate driver. A list of the main converter components is given in Table 1.

4.2. Communication Scheme

A 64-QAM single-carrier modulation scheme was chosen. The carrier frequency was f_sig = 1 MHz and the symbol period was six signal periods. With these parameters, the modulation scheme had a theorical maximum bit rate of 1.5 Mbps because the error was not calculated. This modulation was chosen in order to test the ability of the series/parallel boost/buck DC/DC to reproduce and advance scheme modulation.

4.3. Design of the Buck DC/DC Converter

The buck DC/DC converter must be able to reproduce a 1 MHz modulated signal with low distortion and high efficiency. The switching frequency f_bu, cutoff frequency f_c, and filter order were designed based on the chosen modulation scheme [14]. In addition, a trade-off must be found between performance, resolution, and filter order. The higher the frequency, the higher the switching losses and the lower the duty cycle resolution. However, the filter design is simplified, allowing the required filter order to be reduced. On the other hand, reducing the frequency allows for reduced switching losses and increased duty-cycle resolution, but it complicates the filter design. The filter must be able to correctly pass the communication spectrum and sufficiently attenuate the switching frequency components and harmonics. This imposes some restrictions on how closely the converter switching frequency and the maximum communication frequency can be approximated depending on the filter order [14]. The switching frequency chosen was 10 MHz, a decade above the f_sig carrier frequency. The filter used is a 6th-order low-pass filter with a cut-off frequency of 2.5 MHz. The reactive values are shown in

Table 2. Circuit components of the VLC HB-LED driver.

Lbu1	Cbu1	Lbu2	Cbu2	Lbu3	Cbu3
1.7 µH	9.9 nF	2.2 µH	9.9 nF	1.9 µH	5.72 nF

.

The remaining components were the PD84010S-E RF MOSFET as Q_bu and the UPS115UE3 diode as S_bu. Due to the high-switching frequency, the EL7155CSZ gate driver was used. A list of the converter components is given in

Table 3. List of main components of the buck DC/DC converter.

Sbu	Buck Drivers	HB-LEDs
UPS115UE3	EL7155CSZ	XLamp MX-3

.

4.4. Experimental Waveforms

The designed prototype was experimentally evaluated by reproducing a communication signal (i.e., 64-QAM modulation scheme). During operation, the converter’s performance was measured, and the most representative waveforms were obtained.

The input power was measured with two high-precision multimeters, measuring the average value of the input voltage and current. The output power, due to the high-frequency components of the signal, was calculated by extracting the signals using an oscilloscope and calculating the power through them. The architecture’s performance was measured by transmitting a randomly generated 64-QAM sequence at a 0.5 m distance, achieving an efficiency of 91.5% with 7 W of output power.

The most representative waveforms of the prototype are shown in Figure 7. The voltages v_gs-bo(t) and v_gs-bu(t) are the gate signals that control the boost DC/DC and buck DC/DC converters, respectively. There was a significant difference in their operation frequency, with v_gs-bo(t) being a 100 kHz signal and v_gs-bu(t) being 10 MHz. The voltages V_bias(T) and v_sig(t) are the output voltages of the boost DC/DC and buck DC/DC converters, respectively. As can be seen, the voltage V_bias(T) was constant and had negligible ripple. The variations in this voltage were produced by the temperature changes in the HB-LED load. However, the output current feedback loop kept the average current at I_o = 0.25 A. Without taking into account any temperature effects and according to the HB-LED manufacturer’s datasheet, at a room temperature of 25 °C, the maximum voltage across the HB-LED for a current of 0.5 A should be V_bias = 32 V. In the operating example shown in Figure 7, after a few minutes of operation, during which the temperature was stable, the maximum voltage dropped to V_bias = 25 V, 21% lower, keeping the overall linear zone of the HB-LED load available to track the signal.

In addition, the buck DC/DC converter generated the communication signal v_o(t) at its output, producing the variations in the HB-LED load necessary for VLC transmission. Figure 8 shows that the gate voltage v_gs-bu(t) varied its duty cycle in order to generate the variations in the output voltage v_o(t). The maximum amplitude of v_o(t) voltage was 7.5 V, maintaining the usability of the linear zone of the HB-LED load. Voltage v_sig(t) showed correct reproduction of the signal. This shows the correct design of the output filter and the correct attenuation of high-frequency noise, which comes from switching.

In order to analyze the prototype’s communication capability and correct transformation of the VLC signal into light, a longer transmission was analyzed in more detail, as shown in Figure 8, with 12 different symbols emitted. In this case, v_o(t) and the light signal received from the HB-LED load v_rx(t) were obtained and compared. The light signal (i.e., v_rx(t)) was obtained using a high-bandwidth Thorlabs PDA10A-EC optical receiver [19]. The receiver was placed in front of the HB-LED load at 0.5 m and provided a voltage output signal proportional to the light variations it received. It can be seen that v_o(t) and v_rx(t) were proportional, without apparent distortion. Incorrect voltage level design or incorrect polarization control could cause distortion in the emitted light signal, causing the HB-LED load to operate outside the linear range. Neither of these effects is observed in Figure 8.

It is important to note that some tests could be used to calculate the error, such as the bit error rate (BER), error–vector magnitude (EVM_rms), or the error according to the reception distance, but performing these tests depends on the demodulator as well as the optical receiver, which must be designed for this specific application. The design of the demodulator and the optical receiver are outside the scope of this paper. The main contribution of the present paper is the presentation of the series/parallel boost/buck DC/DC as a VLC transmitter for splitting power.

5. Comparison and Discussion with Other Approaches

Table 4. Comparison of power-efficient VLC drivers based on switching converters, which use the power splitting technique.

Ref.	Topology	Input Voltage Sources	Modulation Scheme	PO (W)	iomax/2Io	fS (MHz)	H (%)	Distance (cm)	Bit Rate (Mbps)	EVMrms (%)
[14]	Two-phase buck DC/DC converter with high order filer + synchronous buck DC/DC converter	2 1*	OFDM	10	0.8	10 2*	93.6	20	7.5	15
[15]	Fly-buck DC/DC converter + Class B power amplifier	1	OFDM	20	0.42	0.1 3*	94	50	6	5
[16]	TIBuck DC/DC converter	1	64-QAM	7	1	10 2*	94	40	1.5	12
This work	Series/parallel boost/buck DC/DC Converter	1	64-QAM	7	1	10 2*	91.5	50	1.5 4*	-

¹* One is isolated. ²* This is the switching frequency of the DC/DC converter in charge of reproducing the communication signal. ³* This is the switching frequency of the DC/DC in charge of both biasing and supplying Class B power amplifier. ⁴* This is the theorical maximum bit rate because the error was not calculated.

shows a comparison to the state of the art of power-efficient VLC drivers based on switching converters able to reproduce advanced modulation schemes—all using the power splitting technique.

The proposed series/parallel boost/buck DC/DC converter outperformed traditional buck DC/DC converter solutions in terms of efficiency, bit rate, and moderate EVM_rms, even operating at a higher switching frequency. Moreover, the hardware complexity of the proposed solution is similar to the buck DC/DC converter solutions presented for designing high-bandwidth VLC drivers (i.e., two-phase structures with high-order filters).

The proposed series/parallel boost/buck DC/DC converter’s natural way of splitting power simplifies previous approaches using this technique because it does not need two input voltage sources (one of which is isolated) nor one isolated DC/DC converter. In addition to simplicity, strong communication capabilities and high efficiency are maintained with good boost DC/DC converter design.

Moreover, the numbers for the series/parallel boost/buck DC/DC converter are very similar to those of the TIBuck DC/DC converter. However, the new architecture overcomes the main drawback of the TIBuck solution, which is the reduced resolution for tracking the voltage across the HB-LED load. The series/parallel boost/buck DC/DC always works in the full linear region of the HB_LED load. The price is reduced efficiency (91.5% vs. 94%)

Table 4 highlights the ratio between the maximum amplitude and the average value of the output current through the HB-LED load (i.e., i_omax/2I_o), which provides an approach for assessing the ratio between the communication power and lighting power. The series/parallel boost/buck DC/DC converter maximizes the communication power compared to other approaches, which minimize the amplitude of communication to achieve high efficiency (e.g., [19]).

6. Conclusions

The proposed series/parallel boost/buck DC/DC converter can achieve high efficiency and high communication performance by means of splitting the power between two different DC/DC converters. The design is based on two DC/DC converters connected to the same input voltage, with their outputs connected in series in relation to the HB-LED load. A low-switching-frequency boost DC/DC converter works with an output current feedback loop, which is responsible for delivering most of the power and controlling the lighting (i.e., bias) of the HB-LEDs. In contrast, an open loop, fast-response buck DC/DC converter generates the communication signal. Advantages of this approach include high efficiency, high communication performance, input voltage flexibility, and improved duty cycle resolution for tracking the output voltage. The overall power efficiency is improved by splitting the power between these two converters. Most power is processed by the boost DC/DC converter (with very high efficiency), and only a small part is processed by the buck DC/DC converter (with the efficiency compromised by the high switching frequency). Another advantage is the flexibility in terms of input voltage. In contrast to other topologies based only on buck converters, the input voltage can be lower than the threshold voltage of the LED string. An additional effect of lower input voltages is increased resolution of the duty cycle for tracking the output voltage in the high-frequency buck DC/DC converter versus temperature changes. The experimental results demonstrate an efficiency of 91.5% in reproducing a 64-QAM digital modulation, with a bit rate of 1.5 Mbps.