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Electronics
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Advanced Non-Volatile Memory Devices and Systems
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Advanced Non-Volatile Memory Devices and Systems

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Microelectronics".

Deadline for manuscript submissions: 15 April 2025 | Viewed by 2927

Special Issue Editors

Dr. Jérémy Postel-Pellerin

E-Mail Website
Guest Editor
Institut Matériaux Microélectronique et Nanosciences de Provence (IM2NP), CNRS, Aix-Marseille University, 13453 Marseille, France
Interests: non-volatile memories; MRAM; TCAD simulation; reliability; security
Special Issues, Collections and Topics in MDPI journals
Dr. Vincenzo Della Marca

E-Mail Website
Guest Editor
Institut Matériaux Microélectronique et Nanosciences de Provence (IM2NP), CNRS, Aix-Marseille University, 13453 Marseille, France
Interests: non-volatile memories; PCM; OxRAM; electrical characterization; reliability; modeling

Special Issue Information

Dear Colleagues,

Advanced non-volatile memory devices and systems have had a profound impact on the field of data storage and computing, revolutionizing the way we store, access, and manage information. These technologies have significantly improved data transfer speeds, energy efficiency, and overall performance in various electronic devices.

One major impact of advanced non-volatile memory devices is their role in modern storage solutions. Traditional hard disk drives (HDDs) have been gradually replaced by solid-state drives (SSDs) based on technologies like NAND Flash and 3D XPoint, offering much faster read and write speeds, reduced power consumption, and enhanced reliability.

Furthermore, non-volatile memory has become an essential component in mobile devices, such as smartphones and tablets. These devices require fast and reliable memory to store and access data promptly, enabling seamless user experiences. Non-volatile memory also contributes to the longevity of data in case of power interruptions, safeguarding critical information.

In the realm of data centers and cloud computing, advanced non-volatile memory technologies have played a crucial role in enhancing data storage and retrieval efficiency. The rapid adoption of solid-state drives in data centers has led to reduced latency and improved data access times, resulting in better performance for cloud-based services and applications.

Another significant impact is in the Internet of Things (IoT) domain. Non-volatile memory provides low-power and durable storage solutions for the vast amounts of data generated by IoT devices, enabling edge computing capabilities and real-time data analysis without relying heavily on cloud services.

Furthermore, advanced non-volatile memory devices have enabled the development of novel computing architectures, such as neuromorphic computing and in-memory computing. These architectures leverage the unique properties of non-volatile memory to perform specific tasks efficiently, such as pattern recognition and associative memory tasks.

In conclusion, this Special Issue is dedicated to advanced non-volatile memory devices and systems.

Dr. Jérémy Postel-Pellerin
Dr. Vincenzo Della Marca
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • non-volatile memories
  • OxRAM
  • MRAM
  • FeRAM
  • PCM
  • Flash
  • reliability
  • architecture
  • circuit design

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Published Papers (3 papers)

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Research

11 pages, 2685 KiB  
Article
Complementary Polarizer SOT-MRAM for Low-Power and Robust On-Chip Memory Applications
by Hyerim Kim, Kon-Woo Kwon and Yeongkyo Seo
Electronics 2024, 13(17), 3498; https://doi.org/10.3390/electronics13173498 - 3 Sep 2024
Viewed by 572
Abstract
Complementary polarized spin-transfer torque magnetic random-access memory (CPSTT-MRAM) has been proposed to address the sensing reliability issues caused by the single-ended sensing of STT-MRAM. However, it results in a three-fold increase in the free layer (FL) area compared to STT-MRAM, leading to a [...] Read more.
Complementary polarized spin-transfer torque magnetic random-access memory (CPSTT-MRAM) has been proposed to address the sensing reliability issues caused by the single-ended sensing of STT-MRAM. However, it results in a three-fold increase in the free layer (FL) area compared to STT-MRAM, leading to a higher write current. Moreover, the read and write current paths in this memory are the same, thus preventing the optimization of each operation. To address these, in this study, we proposed a complementary polarized spin-orbit torque MRAM (CPSOT-MRAM), which tackles these issues through the SOT mechanism. This CPSOT-MRAM retains the advantages of CPSTT-MRAM while significantly alleviating the high write current requirement issue. Furthermore, the separation of the read and write current paths enables the optimization of each operation. Compared to CPSTT-MRAM, the proposed CPSOT-MRAM achieves a 4.0× and 2.8× improvement in write and read power, respectively, and a 20% reduction in layout area. Full article
(This article belongs to the Special Issue Advanced Non-Volatile Memory Devices and Systems)
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11 pages, 2732 KiB  
Article
Innovative Programming Approaches to Address Z-Interference in High-Density 3D NAND Flash Memory
by Yu Jin Choi, Seul Ki Hong and Jong Kyung Park
Electronics 2024, 13(16), 3123; https://doi.org/10.3390/electronics13163123 - 7 Aug 2024
Viewed by 1174
Abstract
Increasing the bit density in 3D NAND flash memory involves reducing the pitch of ON (Oxide-Nitride) molds in the Z-direction. However, this reduction drastically increases Z-interference, adversely affecting cell distribution and accelerating degradation of reliability limits. Previous studies have shown that programming from [...] Read more.
Increasing the bit density in 3D NAND flash memory involves reducing the pitch of ON (Oxide-Nitride) molds in the Z-direction. However, this reduction drastically increases Z-interference, adversely affecting cell distribution and accelerating degradation of reliability limits. Previous studies have shown that programming from the top word line (WL) to the bottom WL, instead of the traditional bottom-to-top approach, alleviates Z-interference. Nevertheless, detailed analysis of how Z-interference varies at each WL depending on the programming sequence remains insufficient. This paper investigates the causes of Z-interference variations at Top, Middle, and Bottom WLs through TCAD analysis. It was found that as more electrons are programmed into WLs within the string, Z-interference variations increase due to increased resistance in the poly-Si channel. These variations are exacerbated by tapered vertical channel profiles resulting from high aspect ratio etching. To address these issues, a method is proposed to adjust bitline biases during verification operations of each WL. This method has been validated to enhance the performance and reliability of 3D NAND flash memory. Full article
(This article belongs to the Special Issue Advanced Non-Volatile Memory Devices and Systems)
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16 pages, 4294 KiB  
Article
Evaluation of a Simplified Modeling Approach for SEE Cross-Section Prediction: A Case Study of SEU on 6T SRAM Cells
by Cleiton M. Marques, Frédéric Wrobel, Ygor Q. Aguiar, Alain Michez, Frédéric Saigné, Jérôme Boch, Luigi Dilillo and Rubén García Alía
Electronics 2024, 13(10), 1954; https://doi.org/10.3390/electronics13101954 - 16 May 2024
Cited by 2 | Viewed by 741
Abstract
Electrical models play a crucial role in assessing the radiation sensitivity of devices. However, since they are usually not provided for end users, it is essential to have alternative modeling approaches to optimize circuit design before irradiation tests, and to support the understanding [...] Read more.
Electrical models play a crucial role in assessing the radiation sensitivity of devices. However, since they are usually not provided for end users, it is essential to have alternative modeling approaches to optimize circuit design before irradiation tests, and to support the understanding of post-irradiation data. This work proposes a novel simplified methodology to evaluate the single-event effects (SEEs) cross-section. To validate the proposed approach, we consider the 6T SRAM cell a case study in four technological nodes. The modeling considers layout features and the doping profile, presenting ways to estimate unknown parameters. The accuracy and limitations are determined by comparing our simulations with actual experimental data. The results demonstrated a strong correlation with irradiation data, without requiring any fitting of the simulation results or access to process design kit (PDK) data. This proves that our approach is a reliable method for calculating the single-event upset (SEU) cross-section for heavy-ion irradiation. Full article
(This article belongs to the Special Issue Advanced Non-Volatile Memory Devices and Systems)
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