Monolithic 3D Chips

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "A:Physics".

Deadline for manuscript submissions: closed (31 December 2020) | Viewed by 12206

Special Issue Editor


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Guest Editor
Korea Advanced Institute of Science and Technology (KAIST), Daehak-ro 291, Yuseong-gu, Daejeon 34141, Korea
Interests: optoelectronics; next-generation computing/communication devices; monolithic 3D integration; microLED; thin-film imager; MID-IR photonics

Special Issue Information

Dear Colleagues,

The recent development of through-Si-via (TSV)-based three-dimensional (3D) integration has been a breakthrough in semiconductor packaging. It allows higher density, higher bandwidth, and smaller power consumption by 3D stacking, which have created new generations of memory chips such as hybrid memory cube, high bandwidth memory, etc. Furthermore, it has accelerated optoelectronic integration such as in image senor application, with additional benefits such as a smaller form factor, economical use of different technology nodes at each layer, etc. However, vertical alignment accuracy in TSV technology is still limited in the micrometer scale, despite showing continuous improvement. Therefore, to achieve the full potential of the 3D chip stacking/3D integration, monolithic 3D (M3D) integration has to be developed in various aspects, such as process technology, design strategy, and the discovery of new applications with increased functionality. Accordingly, this Special Issue seeks new, original contributions on “Monolithic 3D Chips” in this research society.

Prof. Dr. Sanghyeon Kim
Guest Editor

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Keywords

  • Monolithic 3D
  • Sequential 3D
  • Heterogeneous integration
  • Wafer bonding
  • Low-temperature semiconductor processing
  • 3D integrated opto-electronic devices

Published Papers (2 papers)

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12 pages, 5457 KiB  
Article
Single-Grain Gate-All-Around Si Nanowire FET Using Low-Thermal-Budget Processes for Monolithic Three-Dimensional Integrated Circuits
by Tung-Ying Hsieh, Ping-Yi Hsieh, Chih-Chao Yang, Chang-Hong Shen, Jia-Min Shieh, Wen-Kuan Yeh and Meng-Chyi Wu
Micromachines 2020, 11(8), 741; https://doi.org/10.3390/mi11080741 - 30 Jul 2020
Cited by 4 | Viewed by 4379
Abstract
We introduce a single-grain gate-all-around (GAA) Si nanowire (NW) FET using the location-controlled-grain technique and several innovative low-thermal budget processes, including green nanosecond laser crystallization, far-infrared laser annealing, and hybrid laser-assisted salicidation, that keep the substrate temperature (Tsub) lower than 400 [...] Read more.
We introduce a single-grain gate-all-around (GAA) Si nanowire (NW) FET using the location-controlled-grain technique and several innovative low-thermal budget processes, including green nanosecond laser crystallization, far-infrared laser annealing, and hybrid laser-assisted salicidation, that keep the substrate temperature (Tsub) lower than 400 °C for monolithic three-dimensional integrated circuits (3D-ICs). The detailed process verification of a low-defect GAA nanowire and electrical characteristics were investigated in this article. The GAA Si NW FETs, which were intentionally fabricated within the controlled Si grain, exhibit a steeper subthreshold swing (S.S.) of about 65 mV/dec., higher driving currents of 327 µA/µm (n-type) and 297 µA/µm (p-type) @ Vth ± 0.8 V, and higher Ion/Ioff (>105 @|Vd| = 1 V) and have a narrower electrical property distribution. In addition, the proposed Si NW FETs with a GAA structure were found to be less sensitive to Vth roll-off and S.S. degradation compared to the omega(Ω)-gate Si FETs. It enables ultrahigh-density sequentially stackable integrated circuits with superior performance and low power consumption for future mobile and neuromorphic applications. Full article
(This article belongs to the Special Issue Monolithic 3D Chips)
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Review

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19 pages, 3564 KiB  
Review
Heterogeneously-Integrated Optical Phase Shifters for Next-Generation Modulators and Switches on a Silicon Photonics Platform: A Review
by Younghyun Kim, Jae-Hoon Han, Daehwan Ahn and Sanghyeon Kim
Micromachines 2021, 12(6), 625; https://doi.org/10.3390/mi12060625 - 28 May 2021
Cited by 19 | Viewed by 7182
Abstract
The realization of a silicon optical phase shifter marked a cornerstone for the development of silicon photonics, and it is expected that optical interconnects based on the technology relax the explosive datacom growth in data centers. High-performance silicon optical modulators and switches, integrated [...] Read more.
The realization of a silicon optical phase shifter marked a cornerstone for the development of silicon photonics, and it is expected that optical interconnects based on the technology relax the explosive datacom growth in data centers. High-performance silicon optical modulators and switches, integrated into a chip, play a very important role in optical transceivers, encoding electrical signals onto the light at high speed and routing the optical signals, respectively. The development of the devices is continuously required to meet the ever-increasing data traffic at higher performance and lower cost. Therefore, heterogeneous integration is one of the highly promising approaches, expected to enable high modulation efficiency, low loss, low power consumption, small device footprint, etc. Therefore, we review heterogeneously integrated optical modulators and switches for the next-generation silicon photonic platform. Full article
(This article belongs to the Special Issue Monolithic 3D Chips)
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