Search Results (191)

Traditional crosslinked-polyethylene (XLPE) insulation suffers from high recycling costs and low efficiency due to its thermosetting properties. In contrast, thermoplastic polypropylene (PP), with advantages of melt recyclability, low energy consumption, and excellent comprehensive performance, has emerged as an ideal alternative to XLPE. This study conducts a comparative analysis of low-voltage cables insulated with PP, silane-crosslinked XLPE (XLPE-S), and UV-crosslinked XLPE (XLPE-U), focusing on production processes, mechanical properties, thermal stability, and electrical performance. Tensile test results show that PP exhibits the highest elongation at break (>600%) before aging, and its tensile strength (>20 MPa) after aging outperforms that of XLPE, indicating superior flexibility and anti-aging capability. PP exhibits a lower thermal elongation (<50%) at 140 °C compared to XLPE, and its high-crystallinity molecular structure endows better heat-resistant deformation performance. The volume resistivity of PP reaches 9.2 × 10¹⁵ Ω·m, comparable to that of XLPE-U (3.9 × 10¹⁵ Ω·m) and significantly higher than XLPE-S (3.0 × 10¹⁴ Ω·m). All three materials pass the 4-h voltage withstand test, confirming their satisfied insulation reliability. PP-insulated low-voltage cables demonstrate balanced performance in production efficiency, energy consumption cost, mechanical toughness, and electrical insulation. Notably, their recyclability significantly surpasses traditional XLPE, showing potential to promote green upgrading of the cable industry and providing a sustainable insulation solution for low-voltage power distribution systems. Full article

High-resistance faults on the DC lines of multi-terminal VSC-HVDC grids lead to insufficient protection reliability, and the introduction of current-limiting strategies alters the system’s intrinsic fault characteristics, degrading protection performance. To address these issues, we propose a DC-line protection scheme that is immune to converter control strategies and highly tolerant to fault resistance. First, based on the grid topology, post-fault current paths are analyzed, and the fault characteristics produced solely by the fault-induced voltage source are identified. A sequential overlapping derivative transformation is then employed to magnify the discrepancy between internal and external faults, forming the core of the fault-identification criterion; the zero-mode component is used for pole selection. Finally, a four-terminal VSC-HVDC model is built in PSCAD/EMTDC version 4.6.2 for validation. Simulation results show that, after applying the current-limiting strategy, the characteristic quantity changes only marginally, and the proposed protection can reliably withstand fault resistances of up to 700 Ω. Full article

FeAl intermetallic compounds exhibit high application potential in high-voltage transmission lines to withstand external forces such as powerlines’ own gravity and wind force. The ordered crystal structure in FeAl intermetallic compounds endows materials with high strength, but the remarkable brittleness at room temperature restricts engineering applications. This contradiction is essentially closely related to the deformation mechanism at the nanoscale. Here, we performed molecular dynamics simulations to reveal anomalous grain size effects and deformation mechanisms in nanocrystalline FeAl intermetallic material. Models with grain sizes ranging from 6.2 to 17.4 nm were systematically investigated under uniaxial tensile stress. The study uncovers a distinctive inverse Hall-Petch relationship governing flow stress within the nanoscale regime. This behavior stems from high-density grain boundaries promoting dislocation annihilation over pile-up. Crucially, the material exhibits anomalous ductility at ultra-high strain rates due to stress-induced phase transformation dominating the plastic deformation. The nascent FCC phase accommodates strain through enhanced slip systems and inherent low stacking fault energy with the increasing phase fraction paralleling the stress plateau. Nanoconfinement suppresses the propagation of macroscopic defects while simultaneously suppressing room-temperature brittle fracture and inhibiting the rapid phase transformation pathways at extreme strain rates. These findings provide new theoretical foundations for designing high-strength and high-toughness intermetallic nanocompounds. Full article

Aiming at the problems of low withstand voltage and poor RF performance of traditional HEMT devices, a new AlGaN/GaN high electron mobility transistor device with a π-gate (NπGS HEMT) is designed in this paper. The new structure incorporates a π-gate design along with a PN-junction field plate and an AlGaN back-barrier layer. The device is modeled and simulated in Silvaco TCAD 2015 software and compared with traditional t-gate HEMT devices. The results show that the NπGS HEMT has a significant improvement in various characteristics. The new structure has a higher peak transconductance of 336 mS·mm⁻¹, which is 13% higher than that of the traditional HEMT structure. In terms of output characteristics, the new structure has a higher saturation drain current of 0.188 A/mm. The new structure improves the RF performance of the device with a higher maximum cutoff frequency of about 839 GHz. The device also has a better performance in terms of voltage withstand, exhibiting a higher breakdown voltage of 1817 V. These results show that the proposed new structure could be useful for future research on high voltage withstand and high RF HEMT devices. Full article

Gallium nitride (GaN) enhancement-mode high-electron-mobility transistors ( E-HEMTs) deliver superior performance compared to traditional silicon (Si) and silicon carbide (SiC) counterparts. Their faster switching speeds, lower on-state resistances, and higher operating frequencies enable more efficient and compact power converters. However, their integration into high-power applications is limited by critical reliability concerns, particularly regarding their short-circuit (SC) withstand capability and overvoltage (OV) resilience. GaN devices typically exhibit SC withstand times of only a few hundred nanoseconds, needing ultrafast protection circuits, which conventional desaturation (DESAT) methods cannot adequately provide. Furthermore, their high switching transients increase the risk of false activation events. The lack of avalanche capability and the dynamic nature of GaN breakdown voltage exacerbate issues related to OV stress during fault conditions. Although SC-related behaviour in GaN devices has been previously studied, a focused and comprehensive review of protection strategies tailored to GaN technology remains lacking. This paper fills that gap by providing an in-depth analysis of SC and OV failure phenomena, coupled with a critical evaluation of current and next-generation protection schemes suitable for GaN-based high-power converters. Full article

To address the challenges of prolonged current isolation times and high dependency on varistors in traditional flexible short-circuit fault isolation schemes for DC systems, this paper proposes a rapid fault isolation circuit design based on an adaptive solid-state circuit breaker (SSCB). By introducing an adaptive current-limiting branch topology, the proposed solution reduces the risk of system oscillations induced by current-limiting inductors during normal operation and minimizes steady-state losses in the breaker. Upon fault occurrence, the current-limiting inductor is automatically activated to effectively suppress the transient current rise rate. An energy dissipation circuit (EDC) featuring a resistor as the primary energy absorber and an auxiliary varistor (MOV) for voltage clamping, alongside a snubber circuit, provides an independent path for inductor energy release after faults. This design significantly alleviates the impact of MOV capacity constraints on the fault isolation process compared to traditional schemes where the MOV is the primary energy sink. The proposed topology employs a symmetrical bridge structure compatible with both pole-to-pole and pole-to-ground fault scenarios. Parameter optimization ensures the IGBT voltage withstand capability and energy dissipation efficiency. Simulation and experimental results demonstrate that this scheme achieves fault isolation within 0.1 ms, reduces the maximum fault current-to-rated current ratio to 5.8, and exhibits significantly shorter isolation times compared to conventional approaches. This provides an effective solution for segment switches and tie switches in millisecond-level self-healing systems for both low-voltage (LVDC, e.g., 750 V/1500 V DC) and medium-voltage (MVDC, e.g., 10–35 kV DC) smart DC distribution grids, particularly in applications demanding ultra-fast fault isolation such as data centers, electric vehicle (EV) fast-charging parks, and shipboard power systems. Full article

This paper investigates the short-circuit characteristics of 1.2 kV symmetrical and asymmetrical trench-gate SiC MOSFETs. Based on the self-designed short-circuit test platform, single and repetitive short-circuit tests were carried out to characterize the short-circuit capability of the devices under different electrical stresses through the short-circuit withstanding time (SCWT). Notably, the asymmetric trench structure exhibited a superior short-circuit capability under identical test conditions, achieving a longer SCWT compared to its symmetrical counterpart. Moreover, TCAD was used to model the two devices and fit the short-circuit current waveforms to study the difference in short-circuit characteristics under different conditions. For the degradation of the devices after repetitive short-circuit stresses, repetitive short-circuit pulse experiments were conducted for the two groove structures separately. The asymmetric trench devices show a positive Vth drift, increasing on-resistance, increasing C_gs and C_ds, and decreasing C_gd, while the symmetric trench devices show a negative Vth drift, decreasing on-resistance, and inverse variation in capacitance parameters. Both blocking voltages are degraded, but the gate-source leakage current remains low, indicating that the gate oxide has not yet been damaged. Full article

Epoxy resin paper-impregnated bushings, as critical insulating components in power transformers, are subjected to complex electric fields, thermal fields, and mechanical stresses over extended periods. Their performance stability is directly linked to the safe operation of transformers. Given the significant costs associated with their production, reliability verification is a crucial aspect of their design and manufacturing process. This study employs the finite element simulation technology to systematically investigate the electric field distribution characteristics, thermal field distribution characteristics, and seismic performance reliability verification methods of epoxy resin paper-impregnated bushings. The simulation and calculation results indicate that for bushings with rated voltages of 40.5 kV, 72.5 kV, and 126 kV, the maximum radial electric field strengths are 1.38 kV/mm, 2.74 kV/mm, and 3.0 kV/mm, respectively, with axial electric field strengths all below allowable values. The insulation margin meets the 1.5 standard requirements. Under short-circuit conditions, the thermal stability analysis of the bushings reveals that the final conductor temperatures are all below 180 °C, indicating sufficient safety margins. All three types of bushings comply with the design requirements for an 8-degree earthquake intensity and are capable of effectively withstanding seismic loads. This research provides a theoretical foundation for the development and application of epoxy resin paper-impregnated bushings, offering a significant engineering application value in enhancing the safety and stability of transformers and power systems. Full article

AC power cables play an important role in power systems, in the transmission and distribution of electrical energy. For this reason, to ensure high operational reliability, voltage withstand tests and diagnostic tests are performed at every stage of their technical life to determine the condition of cable insulation. Due to the large electrical capacitances of cable systems, modern testing methods use very low frequency (VLF) and damped oscillating (DAC) voltages. The research presented in the article analyzed the effect of the test voltage waveform parameters on the partial discharge (PD) inception conditions in spherical gaseous voids present in the XLPE insulation of AC cable model. Using COMSOL 6.1 and MATLAB R2021b, a coupled electro-thermal model of a 110 kV AC cable was implemented, for which the critical gaseous void dimensions were estimated and phase-resolved PD patterns were generated for the rated voltage and the VLF and DAC test voltages specified in the relevant standards. In the analyses for the rated voltage, the influence of internal temperature distribution, which causes modification of XLPE permittivity, was taken into account in the numerical cable model. Full article

In this research work, two distinct types of three-dimensional (3D) capacitors were successfully fabricated, each with its own unique features and advantages. The first type of capacitor is centered around a 3D nanoporous structure. This structure is formed on a nickel substrate through anodic oxidation. After undergoing high-temperature thermal oxidation, a monolithic Ni-NiO-Pt metal–insulator–metal (MIM) capacitor with a nanoporous dielectric architecture is achieved. Structurally, this innovative design brings about several remarkable benefits. Due to the nanoporous structure, it has a significantly increased surface area, which can effectively store more charges. As a result, it exhibits an equivalent capacitance density of 69.95 nF/cm², which is approximately 18 times higher than that of its planar, non-porous counterpart. This high capacitance density enables it to store more electrical energy in a given volume, making it highly suitable for applications where miniaturization and high energy storage in a small space is crucial. The second type of capacitor makes use of Through-Glass Via (TGV) technology. This technology is employed to create an interdigitated blind-via array within a glass substrate, attaining an impressively high aspect ratio of 22.5:1 (with a via diameter of 20 μm and a depth of 450 μm). By integrating atomic layer deposition (ALD), a conformal interdigital electrode structure is realized. Glass, as a key material in this capacitor, has outstanding insulating properties. This characteristic endows the capacitor with a high breakdown field strength exceeding 8.2 MV/cm, corresponding to a withstand voltage of 5000 V. High breakdown field strength and withstand voltage mean that the capacitor can handle high-voltage applications without breaking down easily, which is essential for power-intensive systems like high-voltage power supplies and some high-power pulse-generating equipment. Moreover, due to the low-loss property of glass, the capacitor can achieve an energy conversion efficiency of up to 95%. Such a high energy conversion efficiency ensures that less energy is wasted during the charge–discharge process, which is highly beneficial for energy-saving applications and systems that require high-efficiency energy utilization. Full article

We propose a coordinated control strategy for off-grid 10 kV wind–solar–hydrogen energy storage DC microgrid systems based on hybrid energy storage and controllable loads to improve their stability and accommodation level. First, mathematical models of each unit are established based on the operating characteristics of wind turbines, photovoltaic (PV) units, alkaline electrolyzers, fuel cells, and lithium batteries. Second, on the side of the electro-hydrogen hybrid energy storage DC/DC converter, the traditional dual-loop control is improved by proposing a control scheme combining an extended state observer with adaptive backstepping control (ESO-adaptive backstepping). On the load demand side, an electric spring incorporating adaptive fuzzy control (AFC) is introduced to adjust and compensate for the voltage. Finally, an actual case analysis is conducted using data from the Ningbo Cixi hydrogen–electric coupling DC microgrid demonstration project. The results demonstrate that the control method proposed in this study significantly outperforms the traditional double closed-loop control method. Specifically, the proposed method reduces the bus voltage fluctuation range in the presence of load disturbances by 24.07% and decreases the stabilization time by 56.92%. Additionally, the efficiency of the hydrogen fuel cell is enhanced by 31.88%. This control method can be applied to 10 kV DC microgrid systems with distributed energy resources. It aims to reduce the fluctuation amplitude of the DC bus voltage and enhance the system’s ability to withstand transient impact events. Full article

This study proposes a power switch combining a vacuum field emission transistor (VFET) as a controlled transistor with a power bipolar Darlington transistor (DT) as an output transistor, termed the VFET–DT structure. Compared to the MOS–bipolar Darlington power switch, the VFET–DT structure achieves an extremely low off-state leakage current and high-voltage withstanding capability due to the field emission mechanism of the VFET. It can also avoid the Miller effect that results from incorporating the load resistance into the feedback loop. The high gain and high-power capacity can be achieved due to the cascade of DT. The device’s typical electrical characteristics were theoretically investigated by simulation. The VFET–DT structure exhibited a high-power capacity of 20 A and 400 V with a minimum conduction voltage drop of 1.316 V and a switching frequency of 100 kHz. The results demonstrated that the combination of a vacuum transistor and a solid-state transistor combines the advantages of both and benefits the performance of the power switch. Full article

Voltage withstand tests on stator bars can cause destructive phenomena such as thermal breakdown and flashover discharge on the surface of the anti-corona layer. This study optimizes the anti-corona structure at a stator bar’s end to prevent such failures using a 120 MW water-cooled turbogenerator with a rated voltage of 15.75 kV. For a well-designed anti-corona system, the maximum potential gradient of the stator bar should be lower than the discharge intensity of air corona. In our design, the electric field intensity is maintained below 3.1 kV/cm, and the maximum surface loss in the anti-corona layer is limited to less than 0.6 W/cm². Additionally, the terminal voltage is kept lower than that of flashover voltage at rated conditions. Furthermore, the length of the anti-corona layer should be minimized. The optimization process involves determining the rotation angle of the stator bar, calculating the total length of the anti-corona layer, and analyzing the electric field and loss in the layer at different lengths. The results demonstrate that the optimized anti-corona design effectively reduces the risk of flashover and thermal failure, ensuring stable operation under rated conditions. This manuscript belongs to purely computational experiments. At present, the electrical machinery with 120 MW rated power grade is put into operation steadily. There is a growing requirement for anti-corona. In this manuscript, computing method is used to assist the anti-corona structure design. The electrical machinery insulation is improved by better anti-corona materials. Therefore, the service life of electrical machinery can be prolonged, which is significant in engineering. Full article

This paper presents a highly stable and integrated silicon-based carrier with broad application prospects. Traditional 800 G optical modules employ architectures based on aluminum nitride (AlN) carriers with externally mounted capacitors. However, such AlN-based architectures suffer from issues including high process complexity, elevated costs, poor environmental temperature adaptability, and difficulties in systematic crosstalk optimization. To address these challenges, this study conducted research on coplanar waveguide (CPW) transmission line structure design and optimization, high-density capacitor design and process implementation, and multi-channel crosstalk suppression. Based on these investigations, a silicon-based integrated carrier was designed and fabricated, incorporating resistors, capacitors, high-speed signal lines, and preformed AuSn structures. Test results demonstrate that the CPW transmission line structures fabricated on the silicon carrier exhibit excellent radio frequency performance with transmission losses below 1 dB within 67 GHz. The developed high-density capacitor structure achieves a remarkable capacitance density of 26.83 nF/mm² and withstands voltages exceeding 24 V at 1 μA current, reaching state-of-the-art levels. This paper also proposes crosstalk reduction solutions including increased channel spacing, the addition of wave-absorbing materials, and the implementation of metal barriers. Experimental results confirm that the developed integrated carrier demonstrates outstanding performance and reliability in high-frequency communications and optoelectronic devices. Full article

This study examined the dependability of Transient Voltage Suppression (TVS) diodes under direct current (DC) switching surge stress from several manufacturers with identical electrical requirements. To prevent thermal damage, we applied a standard 3 ms DC switching surge and increased the surge voltage in increments of 0.1 V with intervals between surges. The breakdown voltage (V_BR) was measured after each DC switching surge to verify functionality. To find the maximum surge current and power level that each device could withstand before failing to clamp surge voltage at a defined V_BR level, three separate manufacturers’ TVS diode (V_BR = 6.8 V) samples were examined. There were significant variations in the computed maximum average surge current and power level between manufacturers’ samples determined by statistical analysis. Prior to failure, the average surge power was 202 W, 321 W, and 357 W, while the maximum average surge current was 29.0 A, 46.9 A, and 51.8 A, respectively. Computed 95% confidence interval ranges between manufacturers of TVS diodes revealed significant population reliability differences under DC switching surge stress. Therefore, an efficient TVS diode reliability metric for DC switching surge stress is the maximum average surge current and power immediately before device failure. Full article