Next Article in Journal
Model-Based Latency Compensation for Network Controlled Modular Multilevel Converters
Next Article in Special Issue
A 2.5-GHz 1-V High Efficiency CMOS Power Amplifier IC with a Dual-Switching Transistor and Third Harmonic Tuning Technique
Previous Article in Journal
A Deep Feature Extraction Method for HEp-2 Cell Image Classification
Previous Article in Special Issue
Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors
 
 
Article

Article Versions Notes

Electronics 2019, 8(1), 21; https://doi.org/10.3390/electronics8010021
Action Date Notes Link
article xml file uploaded 24 December 2018 11:01 CET Original file -
article xml uploaded. 24 December 2018 11:01 CET Update https://www.mdpi.com/2079-9292/8/1/21/xml
article pdf uploaded. 24 December 2018 11:01 CET Version of Record https://www.mdpi.com/2079-9292/8/1/21/pdf
article html file updated 24 December 2018 11:03 CET Original file -
article html file updated 29 January 2019 02:59 CET Update -
article html file updated 2 April 2019 18:11 CEST Update -
article html file updated 13 April 2019 10:59 CEST Update -
article html file updated 27 April 2019 15:08 CEST Update -
article html file updated 11 February 2020 05:04 CET Update -
article html file updated 17 July 2022 18:29 CEST Update https://www.mdpi.com/2079-9292/8/1/21/html
Back to TopTop