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15 pages, 5662 KiB

Open AccessArticle

Compact 3 × 1 Matrix Converter Module Based on the SiC Devices with Easy Expandability

by Patrik Resutík and Slavomír Kaščák

Appl. Sci. 2021, 11(20), 9366; https://doi.org/10.3390/app11209366 - 09 Oct 2021

Cited by 5 | Viewed by 1839

This paper discusses a new approach for building a compact all-in-one matrix converter module based on SiC semiconductors arranged in a common source connection. The used transistors are in the D2PAK package. The design of the module is divided into two parts, namely [...] Read more.

This paper discusses a new approach for building a compact all-in-one matrix converter module based on SiC semiconductors arranged in a common source connection. The used transistors are in the D2PAK package. The design of the module is divided into two parts, namely a power module designed at one-layer aluminum substrate printed circuit board (PCB) to ensure good thermal performance and voltage isolation between the module and heatsink. The second board is responsible for the SiC driving and is mounted at the top of the power PCB and consists of metal-oxide semiconductor field effect transistor (MOSFET) drivers, isolated power supplies, a current direction detection circuit, and current value sensors. In the paper, the proper function of the SiC MOSFET drivers, current direction detection, and current measurement sensors were evaluated. Finally, 3D design together with the final prototype is presented. The modules contain three bidirectional cells for interconnection three input voltage sources and one output phase. The uniqueness and novelty of the presented module are the compactness and easy expandability of the module to achieve higher power outputs and multiphase applications such as five phase machines. Full article

(This article belongs to the Special Issue Power Converters: Modeling, Control, and Applications)

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16 pages, 3515 KiB

Open AccessFeature PaperArticle

SPICE-Aided Compact Electrothermal Model of Impulse Transformers

by Krzysztof Górecki and Krzysztof Górski

Appl. Sci. 2021, 11(19), 8894; https://doi.org/10.3390/app11198894 - 24 Sep 2021

Cited by 3 | Viewed by 1237

Abstract

This article proposes a new form of compact electrothermal model of impulse transformers. The proposed model is dedicated for use with SPICE and it is formulated in the network form. It simultaneously takes into account electrical, thermal, and magnetic phenomena occurring in the [...] Read more.

This article proposes a new form of compact electrothermal model of impulse transformers. The proposed model is dedicated for use with SPICE and it is formulated in the network form. It simultaneously takes into account electrical, thermal, and magnetic phenomena occurring in the considered device. Nonlinearity of the core magnetization characteristics and nonlinearity of the heat transfer efficiency are taken into account in this model. The form of the proposed model is shown. Equations of the presented model are given. Experimental verification of the proposed model is performed for selected impulse transformers. Selected results of the performed investigations are presented. Full article

(This article belongs to the Special Issue Power Converters: Modeling, Control, and Applications)

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16 pages, 2779 KiB

Open AccessFeature PaperArticle

Online Efficiency Optimization and Speed Sensorless Control of Single-Phase Induction Motors

by Mohammad S. Golsorkhi, Hadi Binandeh and Mehdi Savaghebi

Appl. Sci. 2021, 11(19), 8863; https://doi.org/10.3390/app11198863 - 23 Sep 2021

Cited by 4 | Viewed by 1731

Abstract

Single phase induction motors (SPIM) are widely used in residential and commercial applications. Enhancement of efficiency of SPIMs can lead to huge energy savings. This paper presents a novel mechanical sensorless control method for SPIM drives. In this method, a machine learning algorithm [...] Read more.

Single phase induction motors (SPIM) are widely used in residential and commercial applications. Enhancement of efficiency of SPIMs can lead to huge energy savings. This paper presents a novel mechanical sensorless control method for SPIM drives. In this method, a machine learning algorithm is used to estimate the slip based on the ratio of main and auxiliary winding currents. To enhance the efficiency, the terminal voltage is reduced under light load conditions. The optimal operating voltage is implicitly obtained by equating the ratio of main and auxiliary winding currents to its optimum value. This optimal operating point is first calculated based on the frequency from a lookup table and then updated by using gradient descent algorithm. This way, the optimal operating point is realized despite motor parameter variations. The proposed scheme is suitable for low-power applications where working at different speeds and load torques is demanded, such as ventilation systems and various household appliances. Simulation results are presented to verify the efficacy of the proposed method. Full article

(This article belongs to the Special Issue Power Converters: Modeling, Control, and Applications)

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17 pages, 1196 KiB

Open AccessArticle

Sensorless Control for DC–DC Boost Converter via Generalized Parameter Estimation-Based Observer

by Xiaoyu Zhang, Mizraim Martinez-Lopez, Wei He, Yukai Shang, Chen Jiang and Javier Moreno-Valenzuela

Appl. Sci. 2021, 11(16), 7761; https://doi.org/10.3390/app11167761 - 23 Aug 2021

Cited by 16 | Viewed by 3384

Abstract

The full-information state feedback controller is usually used for regulating the output voltage of converters. Sufficient sensors should be adopted to measure all of the states. However, the extensive use of current sensors not only increases the cost of the overall system, but [...] Read more.

The full-information state feedback controller is usually used for regulating the output voltage of converters. Sufficient sensors should be adopted to measure all of the states. However, the extensive use of current sensors not only increases the cost of the overall system, but also affects the reliability. In this paper, the sensorless control problem of DC–DC boost converters is addressed to avoid the need for the current sensor. First, a PI passivity-based control (PI-PBC) is proposed to stabilize this converter. The main feature of this design is that the exponential convergence of the system is guaranteed. Afterward, a generalized parameter estimation-based observer (GPEBO) is presented to estimate the inductor current with the finite-time convergence (FTC). By adding this estimate in the above PI-PBC, a sensorless controller is developed. Thanks to this FTC, the exponential convergence of an overall closed-loop system is ensured. Finally, the simulation and experimental results are given to assess the performance of the proposed controller. Full article

(This article belongs to the Special Issue Power Converters: Modeling, Control, and Applications)

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19 pages, 653 KiB

Open AccessFeature PaperArticle

Modeling of Deadtime Events in Power Converters with Half-Bridge Modules for a Highly Accurate Hardware-in-the-Loop Fixed Point Implementation in FPGA

by Roberto Saralegui, Alberto Sanchez and Angel de Castro

Appl. Sci. 2021, 11(14), 6490; https://doi.org/10.3390/app11146490 - 14 Jul 2021

Cited by 5 | Viewed by 2132

Abstract

Hardware-in-the-loop (HIL) simulations of power converters must achieve a truthful representation in real time with simulation steps on the order of microseconds or tens of nanoseconds. The numerical solution for the differential equations that model the state of the converter can be calculated [...] Read more.

Hardware-in-the-loop (HIL) simulations of power converters must achieve a truthful representation in real time with simulation steps on the order of microseconds or tens of nanoseconds. The numerical solution for the differential equations that model the state of the converter can be calculated using the fourth-order Runge–Kutta method, which is notably more accurate than Euler methods. However, when the mathematical error due to the solver is drastically reduced, other sources of error arise. In the case of converters that use deadtimes to control the switches, such as any power converter including half-bridge modules, the inductor current reaching zero during deadtimes generates a model error large enough to offset the advantages of the Runge–Kutta method. A specific model is needed for such events. In this paper, an approximation is proposed, where the time step is divided into two semi-steps. This serves to recover the accuracy of the calculations at the expense of needing a division operation. A fixed-point implementation in VHDL is proposed, reusing a block along several calculation cycles to compute the needed parameters for the Runge–Kutta method. The implementation in a low-cost field-programmable gate arrays (FPGA) (Xilinx Artix-7) achieves an integration time of

1 μ

s. The calculation errors are six orders of magnitude smaller for both capacitor voltage and inductor current for the worst case, the one where the current reaches zero during the deadtimes in 78% of the simulated cycles. The accuracy achieved with the proposed fixed point implementation is very close to that of 64-bit floating point and can operate in real time with a resolution of

1 μ

s. Therefore, the results show that this approach is suitable for modeling converters based on half-bridge modules by using FPGAs. This solution is intended for easy integration into any HIL system, including commercial HIL systems, showing that its application even with relatively high integration steps (

1 μ

s) surpasses the results of techniques with even faster integration steps that do not take these events into account. Full article

(This article belongs to the Special Issue Power Converters: Modeling, Control, and Applications)

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11 pages, 3658 KiB

Open AccessArticle

MPPT Circuit Using Time Exponential Rate Perturbation and Observation for Enhanced Tracking Efficiency for a Wide Resistance Range of Thermoelectric Generator

by Jie Miao, Houpeng Chen, Yu Lei, Yi Lv, Weili Liu and Zhitang Song

Appl. Sci. 2021, 11(10), 4650; https://doi.org/10.3390/app11104650 - 19 May 2021

Cited by 5 | Viewed by 1807

Abstract

The thermoelectric generator (TEG) stands out among many energy harvesters due to its simple structure, small size, rich thermal energy, and the absence of pollution and noise. However, previous studies have rarely probed into the influence of TEG internal resistances on extracting maximum [...] Read more.

The thermoelectric generator (TEG) stands out among many energy harvesters due to its simple structure, small size, rich thermal energy, and the absence of pollution and noise. However, previous studies have rarely probed into the influence of TEG internal resistances on extracting maximum power from TEGs, and the tracking of efficiency is limited. By analyzing the relationship between the tracking efficiency and the TEG internal resistances, a time exponential rate perturbation and observation (P&O) technology is proposed to achieve maximum power point tracking (MPPT) for a wide resistance range of the TEG. Using the time exponential rate P&O, the MPPT circuit observed the power change by comparing the positive-channel metal-oxide semiconductor (PMOS) on-time and perturbs the power by adjusting the negative-channel metal-oxide semiconductor (NMOS) on-time exponentially. The MPPT circuit was implemented in a 110 nm complementary metal-oxide semiconductor (CMOS) process. The tracking efficiency maintained a high level from 98.9 to 99.5%. The applicable range of the TEG resistance was from 1 to 12 Ω, which reflects an enhancement of at least 2.2 times. Full article

(This article belongs to the Special Issue Power Converters: Modeling, Control, and Applications)

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27 pages, 15754 KiB

Open AccessArticle

Topology and Control Strategy of PV MVDC Grid-Connected Converter with LVRT Capability

by Huan Wang, Yu Zhou, Xinke Huang, Yibo Wang and Honghua Xu

Appl. Sci. 2021, 11(6), 2739; https://doi.org/10.3390/app11062739 - 18 Mar 2021

Cited by 6 | Viewed by 1774

Abstract

This paper proposes an isolated buck-boost topology and control strategy for the photovoltaic (PV) medium-voltage DC (MVDC) converter with low-voltage ride through (LVRT) capability. The proposed isolated buck-boost topology operates on either boost or buck mode by only controlling the active semiconductors on [...] Read more.

This paper proposes an isolated buck-boost topology and control strategy for the photovoltaic (PV) medium-voltage DC (MVDC) converter with low-voltage ride through (LVRT) capability. The proposed isolated buck-boost topology operates on either boost or buck mode by only controlling the active semiconductors on the low-voltage side. Based on this topology, medium-voltage (MV) dc–dc module is able to be developed to reduce the number of modules and increase the power density in the converter, which corresponds to the first contribution. As another contribution, a LVRT method based on an LC filter for MVDC converter is proposed without additional circuit and a feedback capacitor current control method for the isolated buck-boost converter is proposed to solve the instability problem caused by the resonance spike of the LC filter. Five kV/50 kW SiC-based dc–dc modules and ±10 kV/200 kW PV MVDC converters were developed. Experiments of the converter for MVDC system in the normal and LVRT conditions are presented. The experimental results verify the effectiveness of the proposed topology and control strategy. Full article

(This article belongs to the Special Issue Power Converters: Modeling, Control, and Applications)

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17 pages, 10287 KiB

Open AccessFeature PaperArticle

Differential Mode Noise Estimation and Filter Design for Interleaved Boost Power Factor Correction Converters

by Naser Nourani Esfetanaj, Huai Wang, Frede Blaabjerg and Pooya Davari

Appl. Sci. 2021, 11(6), 2716; https://doi.org/10.3390/app11062716 - 18 Mar 2021

Cited by 5 | Viewed by 2806

Abstract

Interleaved power factor correction (PFC) is widely used circuit topology due to good efficiency and power density for single-switch boost PFC. As the differential mode (DM) electromagnetic interference (EMI) noise magnitude depends upon the input current ripple, this research details a comprehensive study [...] Read more.

Interleaved power factor correction (PFC) is widely used circuit topology due to good efficiency and power density for single-switch boost PFC. As the differential mode (DM) electromagnetic interference (EMI) noise magnitude depends upon the input current ripple, this research details a comprehensive study of DM EMI filter design for interleaved boost PFC with the aim of minimizing the component size. It is also demonstrated that the different numbers of interleaved stages and switching frequency influence the filter attenuation requirement and, thus, the EMI filter size. First, an analytical model is derived on the basis of the Norton equivalent circuit model for the differential mode noises of interleaved boost PFC within the frequency range of 9–500 kHz. The derived model can help identify the proper phase shifting among the interleaved boost converters in order to minimize the considered differential mode noises at the filter design frequency. So, a novel phase-shift method is developed to get a minimized attenuation required by a filter in Band B. Further, a volume optimization of the required DM filter was introduced based on the calculated filter attenuation and volumetric component parameters. Based on the obtained results, unconventional and conventional phase shifts have demonstrated a good performance in decreasing the EMI filter volume in Band B and Band A, respectively. A 2-kW interleaved PFC case study is presented to verify the theoretical analyses and the impact of phase-shifting on EMI filter size. Full article

(This article belongs to the Special Issue Power Converters: Modeling, Control, and Applications)

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16 pages, 4916 KiB

Open AccessArticle

Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET

by Bartosz Lasek, Przemysław Trochimiuk, Rafał Kopacz and Jacek Rąbkowski

Appl. Sci. 2021, 11(5), 2210; https://doi.org/10.3390/app11052210 - 03 Mar 2021

Cited by 4 | Viewed by 2463

Abstract

This article discusses an active gate driver for a 1.7 kV/325 A SiC MOSFET module. The main purpose of the driver is to adjust the gate voltage in specified moments to speed up the turn-on cycle and reduce the amount of dissipated energy. [...] Read more.

This article discusses an active gate driver for a 1.7 kV/325 A SiC MOSFET module. The main purpose of the driver is to adjust the gate voltage in specified moments to speed up the turn-on cycle and reduce the amount of dissipated energy. Moreover, an adequate manipulation of the gate voltage is necessary as the gate current should be reduced during the rise of the drain current to avoid overshoots and oscillations. The gate voltage is switched at the right moments on the basis of the feedback signal provided from a measurement of the voltage across the parasitic source inductance of the module. This approach simplifies the circuit and provides no additional power losses in the measuring circuit. The paper contains the theoretical background and detailed description of the active gate driver design. The model of the parasitic-based active gate driver was verified using the double-pulse procedure both in Saber simulations and laboratory experiments. The active gate driver decreases the turn-on energy of a 1.7 kV/325 A SiC MOSFET by 7% comparing to a conventional gate driver (V_DS = 900 V, I_D = 270 A, R_G = 20 Ω). Furthermore, the proposed active gate driver lowered the turn-on cycle time from 478 to 390 ns without any serious oscillations in the main circuit. Full article

(This article belongs to the Special Issue Power Converters: Modeling, Control, and Applications)

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