Power Semiconductor Devices and Applications, 2nd Edition

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: 30 June 2024 | Viewed by 8304

Special Issue Editor


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Guest Editor
Chongqing Engineering Laboratory of High Performance Integrated Circuits, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing 400044, China
Interests: design, reliability and application of power semiconductor devices and ICs
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Special Issue Information

Dear Colleagues,

Power semiconductor devices have contributed to the rise of information technology since they can be widely used in central processing units, graphic accelerators, and digital sound processing, etc. There is a significant demand for power devices that are capable of handling operating voltages from grids or another high-voltage supply. Many power semiconductor devices have been proposed in recent decades, with the majority of technological developments being focused on silicon materials. Wide-gap semiconductors are currently represented by SiCs, and GaN and other compound semiconductor materials have gained increasing attention regarding electric power applications due to their excellent electrical performance. Although power semiconductor devices based on silicon and other semiconductor materials have seen great development, there are still many problems to be solved in the field of power electronics.

This Special Issue highlights the advances in the design, processing, reliability, and application of power semiconductor devices based on silicon or other semiconductor materials.

Dr. Shengdong Hu
Guest Editor

Manuscript Submission Information

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Keywords

  • High- and low-voltage silicon-based devices
  • GaN and compound semiconductor devices
  • SiC- and other-material-based devices
  • Power IC technology

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Published Papers (10 papers)

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Research

12 pages, 6658 KiB  
Article
A Novel Asymmetric Trench SiC Metal–Oxide–Semiconductor Field-Effect Transistor with a Poly-Si/SiC Heterojunction Diode for Optimizing Reverse Conduction Performance
by Yiren Yu, Zijun Cheng, Yi Hu, Ruiyi Lv and Shengdong Hu
Micromachines 2024, 15(4), 461; https://doi.org/10.3390/mi15040461 - 29 Mar 2024
Viewed by 635
Abstract
In this paper, a novel asymmetric trench SiC MOSFET with a Poly-Si/SiC heterojunction diode (HJD-ATMOS) is designed to improve its reverse conduction characteristics and switching performance. This structure features an integrated heterojunction diode, which improves body diode characteristics without affecting device static characteristics. [...] Read more.
In this paper, a novel asymmetric trench SiC MOSFET with a Poly-Si/SiC heterojunction diode (HJD-ATMOS) is designed to improve its reverse conduction characteristics and switching performance. This structure features an integrated heterojunction diode, which improves body diode characteristics without affecting device static characteristics. The heterojunction diode acts as a freewheeling diode during reverse conduction, reducing the cut-in voltage (Vcut-in) to a lower level than conventional asymmetric trench SiC MOSFET (C-ATMOS), while maintaining a similar breakdown voltage. Meanwhile, the split gate structure reduces gate-to-drain charge (Qgd). Through TCAD simulation, the HJD-ATMOS decreases Vcut-in by 53.04% compared to the C-ATMOS. Both Qgd and switching loss are reduced, with a decrease of 31.91% in Qgd and 40.29% in switching loss. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 2nd Edition)
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12 pages, 3372 KiB  
Article
Machine Learning-Based Figure of Merit Model of SIPOS Modulated Drift Region for U-MOSFET
by Zhen Cao, Qi Sun, Chuanfeng Ma, Biao Hou and Licheng Jiao
Micromachines 2024, 15(3), 411; https://doi.org/10.3390/mi15030411 - 19 Mar 2024
Viewed by 634
Abstract
This paper presents a machine learning-based figure of merit model for superjunction (SJ) U-MOSFET (SSJ-UMOS) with a modulated drift region utilizing semi-insulating poly-crystalline silicon (SIPOS) pillars. This SJ drift region modulation is achieved through SIPOS pillars beneath the trench gate, focusing on optimizing [...] Read more.
This paper presents a machine learning-based figure of merit model for superjunction (SJ) U-MOSFET (SSJ-UMOS) with a modulated drift region utilizing semi-insulating poly-crystalline silicon (SIPOS) pillars. This SJ drift region modulation is achieved through SIPOS pillars beneath the trench gate, focusing on optimizing the tradeoff between breakdown voltage (BV) and specific ON-resistance (RON,sp). This analytical model considers the effects of electric field modulation, charge-coupling, and majority carrier accumulation due to additional SIPOS pillars. Gaussian process regression is employed for the figure of merit (FOM = BV2/RON,sp) prediction and hyperparameter optimization, ensuring a reasonable and accurate model. A methodology is devised to determine the optimal BV-RON,sp tradeoff, surpassing the SJ silicon limit. The paper also delves into a discussion of optimal structural parameters for drift region, oxide thickness, and electric field modulation coefficients within the analytical model. The validity of the proposed model is robustly confirmed through comprehensive verification against TCAD simulation results. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 2nd Edition)
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16 pages, 3231 KiB  
Article
Analysis and Verification of Heat Dissipation Structures Embedded in Substrates in Power Chips Based on Square Frustums Thermal through Silicon Vias
by Fengjie Guo, Kui Ma, Jingyang Ran and Fashun Yang
Micromachines 2024, 15(3), 323; https://doi.org/10.3390/mi15030323 - 26 Feb 2024
Viewed by 673
Abstract
A novel heat dissipation structure composed of square frustums thermal through silicon via array and embedded in P-type (100) silicon substrate is proposed to improve the heat dissipation capacity of power chips while reducing process difficulty. Based on theoretical analysis, the heat transfer [...] Read more.
A novel heat dissipation structure composed of square frustums thermal through silicon via array and embedded in P-type (100) silicon substrate is proposed to improve the heat dissipation capacity of power chips while reducing process difficulty. Based on theoretical analysis, the heat transfer model and thermo-electric coupling reliability model of a power chip with the proposed heat dissipation structure are established. A comparative study of simulation indicates that the proposed heat dissipation structure, which can avoid problems such as softness, poor rigidity, fragility and easy fracture caused by thinning chips has better heat dissipation capability than thinning the substrate of power chips. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 2nd Edition)
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11 pages, 1450 KiB  
Communication
Investigation and Modeling of the Behavior of Temperature Characteristics of 0.3–1.1 GHz Complementary Metal Oxide Semiconductor Class-A Broadband Power Amplifiers
by Ruiliang Li, Shaohua Zhou, Cheng Yang and Jian Wang
Micromachines 2024, 15(2), 246; https://doi.org/10.3390/mi15020246 - 6 Feb 2024
Viewed by 637
Abstract
A power amplifier (PA) stands as a central module within the electronic information system (EIS), and any variation in a PA’s specifications has a direct impact on the EIS’s performance, especially in the face of temperature fluctuations. In examining the influence of PA [...] Read more.
A power amplifier (PA) stands as a central module within the electronic information system (EIS), and any variation in a PA’s specifications has a direct impact on the EIS’s performance, especially in the face of temperature fluctuations. In examining the influence of PA specification changes on the EIS, we employed support vector machine (SVM) to model the behavior of the temperature characteristics of 0.3–1.1 GHz complementary metal oxide semiconductor (CMOS) class-A broadband PAs. The results show that the parameters of S11, S12, S21, and S22 can be effectively modeled. SVM outperforms Elman and GRNN in terms of combined modeling time and modeling accuracy. This research can be extended to modeling the behavior of other types of power amplifiers or devices and circuits. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 2nd Edition)
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13 pages, 6969 KiB  
Article
A Highly Integrated C-Band Feedback Resistor Transceiver Front-End Based on Inductive Resonance and Bandwidth Expansion Techniques
by Boyang Shan, Haipeng Fu and Jian Wang
Micromachines 2024, 15(2), 169; https://doi.org/10.3390/mi15020169 - 23 Jan 2024
Viewed by 696
Abstract
This paper presents a highly integrated C-band RF transceiver front-end design consisting of two Single Pole Double Throw (SPDT) transmit/receive (T/R) switches, a Low Noise Amplifier (LNA), and a Power Amplifier (PA) for Ultra-Wideband (UWB) positioning system applications. When fabricated using a 0.25 [...] Read more.
This paper presents a highly integrated C-band RF transceiver front-end design consisting of two Single Pole Double Throw (SPDT) transmit/receive (T/R) switches, a Low Noise Amplifier (LNA), and a Power Amplifier (PA) for Ultra-Wideband (UWB) positioning system applications. When fabricated using a 0.25 μm GaAs pseudomorphic high electron mobility transistor (pHEMT) process, the switch is optimized for system isolation and stability using inductive resonance techniques. The transceiver front-end achieves overall bandwidth expansion as well as the flat noise in receive mode using the bandwidth expansion technique. The results show that the front-end modules (FEM) have a typical gain of 22 dB in transmit mode, 18 dB in receive mode, and 2 dB noise in the 4.5–8 GHz band, with a chip area of 1.56 × 1.46 mm2. Based on the available literature, it is known that the proposed circuit is the most highly integrated C-band RF transceiver front-end design for UWB applications in the same process. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 2nd Edition)
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10 pages, 4841 KiB  
Article
A 2.8 kV Breakdown Voltage α-Ga2O3 MOSFET with Hybrid Schottky Drain Contact
by Seung Yoon Oh, Yeong Je Jeong, Inho Kang, Ji-Hyeon Park, Min Jae Yeom, Dae-Woo Jeon and Geonwook Yoo
Micromachines 2024, 15(1), 133; https://doi.org/10.3390/mi15010133 - 14 Jan 2024
Viewed by 1168
Abstract
Among various polymorphic phases of gallium oxide (Ga2O3), α-phase Ga2O3 has clear advantages such as its heteroepitaxial growth as well as wide bandgap, which is promising for use in power devices. In this work, we demonstrate [...] Read more.
Among various polymorphic phases of gallium oxide (Ga2O3), α-phase Ga2O3 has clear advantages such as its heteroepitaxial growth as well as wide bandgap, which is promising for use in power devices. In this work, we demonstrate α-Ga2O3 MOSFETs with hybrid Schottky drain (HSD) contact, comprising both Ohmic and Schottky electrode regions. In comparison with conventional Ohmic drain (OD) contact, a lower on-resistance (Ron) of 2.1 kΩ mm is achieved for variable channel lengths. Physics-based TCAD simulation is performed to validate the turn-on characteristics of the Schottky electrode region and the improved Ron. Electric-field analysis in the off-state is conducted for both the OD and HSD devices. Furthermore, a record breakdown voltage (BV) of 2.8 kV is achieved, which is superior to the 1.7 kV of the compared OD device. Our results show that the proposed HSD contact with a further optimized design can be a promising drain electrode scheme for α-Ga2O3 power MOSFETs. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 2nd Edition)
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16 pages, 6556 KiB  
Article
Analysis of the Operation Mechanism of Superjunction in RC-IGBT and a Novel Snapback-Free Partial Schottky Collector Superjunction RC-IGBT
by Song Yuan, Yichong Li, Min Hou, Xi Jiang, Xiaowu Gong and Yue Hao
Micromachines 2024, 15(1), 73; https://doi.org/10.3390/mi15010073 - 29 Dec 2023
Viewed by 784
Abstract
This paper explores the operation mechanism of the superjunction structure in RC-IGBTs based on carrier distribution and analyzes the advantages and challenges associated with its application in RC-IGBTs for the first time. A Partial Schottky Collector Superjunction Reverse Conduction IGBT (PSC-SJ-RC-IGBT) is proposed [...] Read more.
This paper explores the operation mechanism of the superjunction structure in RC-IGBTs based on carrier distribution and analyzes the advantages and challenges associated with its application in RC-IGBTs for the first time. A Partial Schottky Collector Superjunction Reverse Conduction IGBT (PSC-SJ-RC-IGBT) is proposed to address these issues. The new structure eliminates the snapback phenomenon. Furthermore, by leveraging the unipolar conduction of the Schottky diode and its fast turn-off characteristics, the proposed device significantly reduces the turn-off power consumption and reverse recovery charge. With medium pillar doping concentration, the turn-off loss of the PSC-SJ-RC-IGBT decreases by 54.1% compared to conventional superjunction RC-IGBT, while the reverse recovery charge is reduced by 52.6%. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 2nd Edition)
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12 pages, 3210 KiB  
Article
A Two-Dimensional Computer-Aided Design Study of Unclamped Inductive Switching in an Improved 4H-SiC VDMOSFET
by Xinfeng Nie, Ying Wang, Chenghao Yu, Xinxing Fei, Jianqun Yang and Xingji Li
Micromachines 2024, 15(1), 35; https://doi.org/10.3390/mi15010035 - 23 Dec 2023
Viewed by 784
Abstract
Due to its high thermal conductivity, high critical breakdown electric field, and high power, the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) has been generally used in industry. In industrial applications, a common reliability problem in SiC MOSFET is avalanche failure. For applications [...] Read more.
Due to its high thermal conductivity, high critical breakdown electric field, and high power, the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) has been generally used in industry. In industrial applications, a common reliability problem in SiC MOSFET is avalanche failure. For applications in an avalanche environment, an improved, vertical, double-diffused MOSFET (VDMOSFET) device has been proposed. In this article, an unclamped inductive switching (UIS) test circuit has been built using the Mixed-Mode simulator in the TCAD simulation software, and the simulation results for UIS are introduced for a proposed SiC-power VDMOSFET by using Sentaurus TCAD simulation software. The simulation results imply that the improved VDMOSFET has realized a better UIS performance compared with the conventional VDMOSFET with a buffer layer (B-VDMOSFET) in the same conditions. Meanwhile, at room temperature, the modified VDMOSFET has a smaller on-resistance (Ron,sp) than B-VDMOSFET. This study can provide a reference for SiC VDMOSFET in scenarios which have high avalanche reliability requirements. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 2nd Edition)
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22 pages, 11882 KiB  
Article
Design and Implementation of an Online Efficiency-Optimized Multi-Functional Compensator for Wind Turbine Generators
by Chao-Tsung Ma and Feng-Wei Zhou
Micromachines 2023, 14(10), 1958; https://doi.org/10.3390/mi14101958 - 20 Oct 2023
Cited by 1 | Viewed by 795
Abstract
In recent years, the penetration of wind power generation has been growing steadily to adapt to the modern trend of boosting renewable energy (RE)-based power generation. However, the dynamic power flow of wind turbine generators (WTGs) is unpredictable and can have a negative [...] Read more.
In recent years, the penetration of wind power generation has been growing steadily to adapt to the modern trend of boosting renewable energy (RE)-based power generation. However, the dynamic power flow of wind turbine generators (WTGs) is unpredictable and can have a negative impact on existing power grids. To solve this problem efficiently, this paper presents a multifunctional WTG intelligent compensator (WTGIC) for the advanced power management and compensation of power systems embedded with WTGs. The proposed WTGIC consists of a power semiconductor device (PSD)-based bidirectional three-phase inverter module and an energy storage unit (ESU). In order to reduce system costs and improve reliability, efficiency, and flexibility, various control functions and algorithms are integrated via a modularized all-digital control scheme. In this paper, the configuration of the proposed WTGIC is first introduced, and then the operating modes and related compensation and control functions are addressed. An online efficiency optimization algorithm is proposed, and the required controllers are designed and implemented. The designed functions of the proposed WTGIC include high-efficiency charging/discharging of the ESU, real-time power quality (PQ) compensation, and high-efficiency power smoothing of the WTGs. The feasibility and effectiveness of the proposed WTGIC are verified using case studies with simulations in the Powersim (PSIM) environment and the implementation of a small-scale hardware experimental system with TI’s digital signal processor (DSP) TI28335 as the main controller. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 2nd Edition)
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19 pages, 5995 KiB  
Article
CS-GA-XGBoost-Based Model for a Radio-Frequency Power Amplifier under Different Temperatures
by Jiayi Wang and Shaohua Zhou
Micromachines 2023, 14(9), 1673; https://doi.org/10.3390/mi14091673 - 27 Aug 2023
Cited by 1 | Viewed by 868
Abstract
Machine learning methods, such as support vector regression (SVR) and gradient boosting, have been introduced into the modeling of power amplifiers and achieved good results. Among various machine learning algorithms, XGBoost has been proven to obtain high-precision models faster with specific parameters. Hyperparameters [...] Read more.
Machine learning methods, such as support vector regression (SVR) and gradient boosting, have been introduced into the modeling of power amplifiers and achieved good results. Among various machine learning algorithms, XGBoost has been proven to obtain high-precision models faster with specific parameters. Hyperparameters have a significant impact on the model performance. A traditional grid search for hyperparameters is time-consuming and labor-intensive and may not find the optimal parameters. To solve the problem of parameter searching, improve modeling accuracy, and accelerate modeling speed, this paper proposes a PA modeling method based on CS-GA-XGBoost. The cuckoo search (CS)-genetic algorithm (GA) integrates GA’s crossover operator into CS, making full use of the strong global search ability of CS and the fast rate of convergence of GA so that the improved CS-GA can expand the size of the bird nest population and reduce the scope of the search, with a better optimization ability and faster rate of convergence. This paper validates the effectiveness of the proposed modeling method by using measured input and output data of 2.5-GHz-GaN class-E PA under different temperatures (−40 °C, 25 °C, and 125 °C) as examples. The experimental results show that compared to XGBoost, GA-XGBoost, and CS-XGBoost, the proposed CS-GA-XGBoost can improve the modeling accuracy by one order of magnitude or more and shorten the modeling time by one order of magnitude or more. In addition, compared with classic machine learning algorithms, including gradient boosting, random forest, and SVR, the proposed CS-GA-XGBoost can improve modeling accuracy by three orders of magnitude or more and shorten modeling time by two orders of magnitude, demonstrating the superiority of the algorithm in terms of modeling accuracy and speed. The CS-GA-XGBoost modeling method is expected to be introduced into the modeling of other devices/circuits in the radio-frequency/microwave field and achieve good results. Full article
(This article belongs to the Special Issue Power Semiconductor Devices and Applications, 2nd Edition)
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