Analysis of the Input Current Distortion and Guidelines for Designing High Power Factor Quasi-Resonant Flyback LED Drivers
Abstract
:1. Introduction
2. Brief Overview of LED Driver Topologies
2.1. Passive LED Drivers
2.2. Switching LED Driver
3. Analysis of Input Current Distortion due to Power Processing and Power Circuit
3.1. Generic Control Method Obtaining High Power Factor
- The line voltage is sinusoidal, and the input bridge rectifier is ideal, thus the voltage at the bridge output terminal is a rectified sinusoid.
- The voltage drop across the power switch in the on-state is negligible and there is negligible energy accumulation on the dc side of the bridge.
- The transformer windings are perfectly coupled (i.e., no leakage inductance).
- The turn-off transient of the power switch has negligible duration so that TFW immediately follows TON.
- The converter is operated so the power switch is turned on in each cycle after the secondary current becomes zero, therefore in either QR-mode (i.e., on the first valley of the ringing in the drain–source voltage) or DCM.
- The output voltage is constant along a line half-cycle.
- During the time interval elapsing from the instant when the transformer demagnetizes to the instant when the power switch is turned on, the transformer current is zero; consequently, the initial current during the on-time is zero too. This time interval is equal to Tr/2 in the case of the converter being used in QR mode.
3.2. Experimental Verification of the Input Current Distortion in a Hi-PF QR Flyback LED Driver
3.3. Distortion Caused by the Ringing Current
- Vin > VR. In the time interval (0, Tneg) VDS(t) is always greater than zero and the current Ip(t) is sinusoidal; Tneg equals half the ringing period. The average value of Ip(t) during Tneg is 2/π times the negative peak value |Ivyp| = YLVR, therefore:
- Vin ≤ VR. The current Ip(t) is sinusoidal in the subinterval (0, Tz). Tz can be expressed as:
3.4. Crossover Distortion Due to the Input Capacitor
3.5. Crossover Distortion Due to Transformer’s Leakage Inductance
4. Conclusions
- The impact of the ringing current after transformer demagnetization can be mitigated by lowering the switching frequency, using a low reflected voltage VR or choosing a power MOSFET with a RDS(on) with an optimized RDS(on)/Coss FOM. These criteria also help to reduce the phenomenon of the lack of input-to-output energy transfer near the zero crossings of the line voltage.
- The leakage inductance of the transformer should be kept as low as practically possible. This choice essentially optimizes the converter efficiency but does not impact the reduction in the dead zones near the zero crossings of the line voltage caused by other phenomena (essentially, the input capacitor CS).
- The input storage capacitor CS should be minimized to reduce the dead zone near the line voltage zero crossings and the current leap occurring in the proximity of the dead zone. However, particular attention should be paid to the following points.
- The diodes of the input bridge rectifier are usually slow-recovery ones, so the primary current at the switching frequency may require an enhanced filter on the ac side of the bridge and may cause the diodes of the bridge to overheat.
- Close to the zero crossings, the switching frequency can be very low. If the ringing frequency related to CS and Lp is comparable with the switching one, it may generate current spikes that would degrade the current THD.
- Class-X capacitors are generally used along with inductors for EMI filtering, necessary for the certification of the final product. Class-X capacitors can degrade the PF, although they do not contribute to the THD. From this perspective, on the one hand, the design of the filter must make the device compliant with the standards. On the other hand, there is a degree of freedom that can be exploited to minimize PF lowering at high line and light load. The filters should be designed with the largest inductance and the smallest capacitance practically possible.
Author Contributions
Funding
Conflicts of Interest
Nomenclature
[V] | Line voltage input. | |
[V] | Rectified line voltage. | |
[V] | Peak of the rectified line voltage Vin (θ). | |
[A] | Line input current. | |
[A] | Current on the primary windings. | |
[A] | Current on the secondary windings. | |
[A] | Output constant current. | |
[V] | Output constant voltage. | |
[Ω] | Inductance of the primary windings. | |
[Ω] | Inductance of the secondary windings. | |
[s] | On time of the power switch | |
[s] | Time interval where the current flows on the secondary side. | |
[s] | Time interval where the drain–source voltage rings | |
[s] | Time interval of the switching period. | |
[F] | Drain to source capacitance of the MOSFET. | |
[V] | Drain to source voltage of the MOSFET. | |
[A] | Current amplitude on the primary windings. | |
[V] | Reflected voltage. | |
[s] | Time period of drain voltage ringing. | |
[s] | Time interval needed for VDS to fall to zero. | |
[s] | Time interval needed for primary current to ramp linearly until zero. | |
[Ω] | Characteristic admittance of the CDS-Lp tank circuit. | |
[C] | Charge accumulates from the input source. | |
[C] | Charge returned to the input source. | |
[Ω] | Magnetizing inductance. | |
[s] | Time interval needed to demagnetize the leakage inductance. | |
Coupling coefficient of Lm. | ||
[A] | Current amplitude on the secondary windings. | |
[Ω] | Equivalent resistor of the converter. | |
[W] | Input power. |
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Parameter | Value |
---|---|
Input voltage range [Vac] | 90–265 V |
Line frequency range [fl] | 47–63 Hz |
Rated output voltage [Vout] | 48 V |
Regulated dc output current [Iout] | 700 mA |
Expected full-load efficiency [η] | 86% |
Transformer primary inductance [Lp] | 500 μH |
Reflected voltage [VR] | 120 V |
Drain–Source capacitance [CDS] | 150 pF |
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Adragna, C.; Gritti, G.; Raciti, A.; Rizzo, S.A.; Susinni, G. Analysis of the Input Current Distortion and Guidelines for Designing High Power Factor Quasi-Resonant Flyback LED Drivers. Energies 2020, 13, 2989. https://doi.org/10.3390/en13112989
Adragna C, Gritti G, Raciti A, Rizzo SA, Susinni G. Analysis of the Input Current Distortion and Guidelines for Designing High Power Factor Quasi-Resonant Flyback LED Drivers. Energies. 2020; 13(11):2989. https://doi.org/10.3390/en13112989
Chicago/Turabian StyleAdragna, Claudio, Giovanni Gritti, Angelo Raciti, Santi Agatino Rizzo, and Giovanni Susinni. 2020. "Analysis of the Input Current Distortion and Guidelines for Designing High Power Factor Quasi-Resonant Flyback LED Drivers" Energies 13, no. 11: 2989. https://doi.org/10.3390/en13112989