AC–DC Flyback Dimmable LED Driver with Low-Frequency Current Ripple Reduced and Power Dissipation in BJT Linearly Proportional to LED Current

Abstract

In this paper, a dimmable light-emitting diode (LED) driver, along with the low-frequency current ripple decreased and the bipolar junction transistor (BJT) power dissipation reduced, is developed. This driver is designed based on a single-stage flyback converter. On the one hand, the low-frequency output current ripple reduction is based on the physical behavior of the linear current regulator. On the other hand, when the voltage across the LED string is decreased/increased due to dimming or temperature, the output voltage of the flyback converter will be automatically regulated down/up, thereby making the power dissipation in the BJT linearly proportional to the LED current. By doing so, not only the power loss in the linear current regulator will be decreased as the LED current is decreased or the LED temperature rises, but also the output current ripple can be reduced. Furthermore, the corresponding power factor (PF) is almost not changed, and the total harmonic distortion (THD) is improved slightly. In addition, the LED dimming is based on voltage division. Eventually, a 30 W LED driver, with an input voltage range from 85 to 295 V_rms and with 24 LEDs in series used as a load, is developed, and accordingly, the feasibility of the proposed LED driver is validated by experimental results.

1. Introduction

As generally recognized, the light-emitting diode (LED) is becoming more attractive in the world due to its small size, light weight, and long life [1,2]. In general, LED drivers with dimming from 100% to 10% are widely used. Adjusting the light level between 10% and 5% is called deep dimming. Modulating the light output through an LED’s current is achieved either by pulse width modulation (PWM) switching, or by amplitude control, also known as analog or level dimming. The former allows deep deeming but presents low luminous efficiency and a risk of flicker [3]. The latter is inherently safer with respect to flicker, but changes the LED operating point and hence the colorimetric characteristics [4]. For those reasons, PWM is the preferred method, and the corresponding dimming frequency is kept above 3.6 kHz to meet flicker specifications.

However, if the DC current with the low-frequency current ripple, due to the mains, is applied to the LED, the flickering will also occur [5]. Consequently, how to reduce this ripple is a very important issue. The flickering will make the human body uncomfortable and the human eye tired [6]. On the other hand, As well known, the LED lighting is an energy-saving device. Therefore, if the LED lighting can be dimmable, more energy will be savedm and the corresponding additional cost will be decreased. As well recognized in industrial applications, the DC LED driver can be classified into three types. One is the single-stage constructed by the flyback converter [7], another is the two-stage built up by the flyback and buck converters [8], and the other is the two-stage established by the boost and flyback/forward converters [9]. The first type has a simple structure, low cost, and high efficiency, but with a high low-frequency current ripple. However, the second and third types are of small low-frequency current ripple, but with complex structure, high cost, and low efficiency. Accordingly, the first type has a more serious flickering problem than the other two.

Therefore, how to reduce LED flickering is a research issue in this paper. The literature [10] presents a comprehensive experimental-based labeling methodology for comparing LED performance with reference to light flicker and power factor. The literature [11] presents an auxiliary circuit with battery powering, and by controlling this circuit, a current opposite to the low-frequency current ripple is generated to suppress such a current ripple. The literatures [12,13] adopt the three-phase voltage along with the power factor correction (PFC) to decrease the low-frequency current ripple. The literature [14,15] employs some auxiliary circuits, which will generate energy via different paths and transfer this energy to the output so that the low-frequency current ripple can be inhibited. The literature [16,17] also utilizes the third-order harmonic injection so that the input power pulsation will be smoothed; hence, the low-frequency current ripple can be alleviated, but the corresponding power factor (PF) is degraded. Furthermore, the literature [18,19] employs the valley-fill circuits, which will change the turn-on angle between the input instantaneous power and the input current, so that the low-frequency current ripple can be reduced. However, the above-mentioned methods have a common default of circuit complexity and design difficulty. Consequently, in this paper, a single-stage AC–DC flyback LED driver, together with a linear current regulator having the bipolar junction transistor (BJT) whose power dissipation is only linearly proportional to the LED current, is employed so as to decrease LED low-frequency flicker significantly with PF and total harmonic distortion (THD) slightly influenced. In addition, amplitude dimming from 100% to 10% is adopted herein.

2. Basic Operating Principles of the Proposed Circuit

Figure 1 displays the system block diagram for the proposed LED driver, and Figure 2 briefly illustrates its overall system. Figure 2 shows the proposed circuit with the input voltage v_ac and the input current i_ac before the bridge diode BD1. This circuit contains three subsystem blocks. The first subsystem block is the main power stage constructed by one single-stage flyback converter with the transformer T₁ having the primary turns of N₁ and the secondary turns of N₂. The second subsystem block is the linear current regulator along with a dimming function built up by one operational amplifier OP₁ used as a buffer with the voltage V₁ at the non-inverting input terminal and the voltage V₂ at the inverting input terminal, one BJT Q₁ operating in the linear region, one current-sensing resistor R_s, and three voltage-dividing resistors R₁, R₂, and VR₁, whose value can be adjustable. The third subsystem block is the output voltage automatic regulator established by one operational amplifier OP₂ used as a subtractor with the voltage V₃ at the non-inverting input terminal and the sensed voltage V₄ at the inverting input terminal, one adjustable precision shunt regulator TL432 providing one reference voltage V₃ of 1.24 V via the circuit voltage V_CC, one photocoupler, one controller, and two current-limiting resistors R_x and R_ref. Furthermore, the voltages V_o, V_f, and V_s indicate that the output voltage of the flyback converter, the equivalent forward voltage of the LED string, and the voltage across R_s, respectively. In addition, the voltage V₂ is equal to the voltage V₁ based on the virtual ground, and the current I_o is the current flowing through the LED string.

3. Basic Operating Concept

3.1. Reduction of Low-Frequency Output Current Ripple

Figure 1 displays the basic operating concept for reduction of the low-frequency output current ripple. As generally acknowledged, the single-stage flyback converter, operating under voltage control, can be regarded as a voltage source, and the linear current regulator under current control can be viewed as a current source. Therefore, the internal impedance of the linear current regulator is much larger than the equivalent impedance of the LED string. That is, the voltage ripple on the LED string is much lower than that on the linear current regulator based on the voltage division, thereby causing the corresponding current ripple in the LED string to be reduced significantly.

3.2. System Stability Based on Simple Circuit Concept

From the circuit concept point of view, the voltage source can be regarded as a capacitor with an infinite capacitance and vice versa, and the current source can be viewed as an inductor with an infinite inductance and vice versa [20]. Hence, the circuit in Figure 1 can be considered as a series RLC circuit, consisting of a resistor (R), an inductor (L) and a capacitor (C), and the quality factor Q is the characteristic impedance Z_o divided by the equivalent resistance of the LED string, called R, where Z_o is $\sqrt{L/C}$, which is equal to one based on the limit concept [21]. Hence, the value Q, equal to $Z_o/R$, is quite small since the value of R is larger than one, about 50 Ω in this paper, thereby making the phase margin quite large and guaranteeing that the circuit is stable [22].

3.3. Output Voltage Automatic Regulator

From Figure 1, the relationship between the voltages V_o, V_f, V_CE and V_s can be represented by

$${\mathit{V}}_o={\mathit{V}}_f+{\mathit{V}}_{CE}+{\mathit{V}}_s.$$

(1)

From (1), since the voltage V_s is relatively low, Equation (1) can be rewritten to be

$${\mathit{V}}_o\approx {\mathit{V}}_f+{\mathit{V}}_{CE}.$$

(2)

From (2), under the condition that the voltage V_o is fixed, if the voltage V_f increases, the voltage V_CE decreases, whereas if the voltage V_f decreases, the voltage V_CE increases. Under a given value of I_o with the corresponding value of V_CE, the accompanying power dissipation on Q₁, called P_Q1, can be expressed as

$${\mathit{P}}_{\mathit{Q}1}={\mathit{V}}_{CE}\times {\mathit{I}}_o.$$

(3)

However, under the condition that the voltage V_o and the current I_o are fixed, if the number of LEDs in the LED string is decreased or if the LED temperature is increased, then the voltage V_f will be decreased and the voltage V_CE will be increased based on (2). Hence, the power dissipation P_Q1 will be increased based on (3).

Consequently, from (2), under the condition that the voltage V_CE and the current I_o are fixed, if the voltage V_f increases, the voltage V_o increases; otherwise, the voltage V_o decreases. This will be achieved based on output voltage automatic regulation so that the voltage V_CE can be kept constant almost at the reference voltage V₃ for any time. Therefore, under a given value of I_o, the accompanying power dissipation can be expressed as

$${\mathit{P}}_{\mathit{Q}1}={\mathit{V}}_3\times {\mathit{I}}_o.$$

(4)

Therefore, we can see that the result in (4) will not be affected by any value of V_CE. Hence, the lower the load current, the less the power dissipation on Q₁. That means that if the value of V₃ is suitably chosen near the curve knee of the linear region of Q₁ or somewhat more, the power dissipation on Q₁ will be reduced all over the output load range and the input voltage range.

Regarding the corresponding operating principle for the output voltage automatic regulator, it will be described based on Figure 2 as follows. First, the sensed feedback voltage V₄ is sent to the subtractor, and this voltage is subtracted from the reference voltage V₃ to yield an error signal. Then, this error signal is passed to the compensator, named COMP, via the photocoupler, to create a desired gate driving signal, which is sent to the switch S₁ via OUT. By doing so, the LED driver can operate in the critical conduction mode (CRM) with V_CE kept at 1.24 V and hence V_o kept at some variable value, equal to the sum of V_f and 1.24 V, where V_f is a function of the current, temperature, and the number of LEDs. In addition, the CRM pulse width modulation (PWM) control will make the main switch have near-zero voltage switching (NZVS).

3.4. Operating Principle of CRM PWM Control

The waveforms shown in Figure 3 are used to understand the basic operating principle of the CRM PWM control for the single-stage PF flyback converter. From Figure 3, as soon as the zero current at the secondary is from the positive current to zero, the resonance occurs between the primary inductance and the parasitic capacitance of the main switch. Hence, the current at the primary goes to the negative. As soon as such a current goes to zero, the accompanying voltage on the main switch resonates to the minimum value. At this moment, the main switch is turned on with NZVS, and this is achieved by the auxiliary winding. As seen in Figure 3, the voltage on the auxiliary winding is almost the same as that on the main switch except for the amplitude. Therefore, the zero current detection signal, called ZCD, is attained and compared with a fixed threshold voltage inside the CRM PWM integrated circuit (IC); hence, the resulting gate-driving signal v_gs is activated.

As for the control loop of the single-stage PF flyback converter based on the L6561 PWM IC [23], it will have a narrow bandwidth (<20 Hz) to maintain control force almost constant over a given line cycle, and this will ensure a high PF. The higher the PF, the larger the inrush current during the turn-on period, and the slower the transient response. Accordingly, the bandwidth will be designed between 10 and 16 Hz. In addition, based on the CRM PWM control, the right-half-plane zero is removed, and only a single left-half-plane pole exists, thereby making the control design relatively easy [22].

The following mathematical derivative is based on CRM with the small value of t_d negligible, as shown in Figure 3. Since this converter operates in CRM with the bandwidth of the voltage loop far lower than that of the mains, the turn-on period T_on of the gate-driving signal for the main switch is kept constant at some value, as shown in Figure 4. Therefore, T_on can be expressed in terms of L_p, I_m and V_m:

$${\mathit{T}}_{\mathit{on}}=\frac{{\mathit{L}}_{\mathit{p}}\cdot {\mathit{i}}_{\mathit{m}}(\omega \mathit{t})}{{\mathit{v}}_{\mathit{ac}}(\omega \mathit{t})}=\frac{{\mathit{L}}_{\mathit{p}}\cdot {\mathit{I}}_{\mathit{m}}}{{\mathit{V}}_{\mathit{m}}}$$

(5)

where L_p is the primary self-inductance, v_ac is the AC input voltage, i_m is the current flowing through L_p, $\omega$ is the radian frequency of v_ac, V_m is the maximum value of v_ac, and I_m is the maximum value of i_m.

In addition, the turn-off period t_off of the gate driving signal is instead variable and can be expressed by

$${\mathit{t}}_{\mathit{off}}=\frac{{\mathit{L}}_{\mathit{p}}\cdot {\mathit{I}}_{\mathit{m}}\cdot \left|\sin (\omega \mathit{t})\right|}{\mathit{n}\cdot ({\mathit{V}}_{\mathit{o}}+{\mathit{V}}_{\mathit{F}})}$$

(6)

where t_off is the time duration between the instant of turning off the main switch and the instant of detecting the current flowing through the diode at the secondary to be zero, n is the turns ratio of the flyback transformer, equal to N₁/N₂, V_o is the output voltage, and V_F is the voltage across the forward-biased diode at the secondary.

Therefore, based on (5) and (6), the variable switching period t_s can be represented by

$$t_s=T_{on}+t_{off}=\frac{L_p\cdot I_m\cdot [1+K_v\cdot \left|\sin (\omega t)\right|]}{V_m}$$

(7)

where ${\mathit{K}}_{\mathit{v}}={\mathit{V}}_{\mathit{m}}{/\mathit{V}}_{\mathit{R}}$, ${\mathit{V}}_{\mathit{R}}=\mathit{n}\cdot ({\mathit{V}}_{\mathit{o}}{+\mathit{V}}_{\mathit{F}})$ and V_R is the voltage reflected from the secondary to the primary.

Hence, the variable switching frequency f_s can be expressed as

$$f_s=\frac{V_m}{L_p\cdot I_m\cdot [1+K_v\cdot \left|\sin (\omega t)\right|]}.$$

(8)

Then, the minimum switching frequency f_s,min can be obtained as

$${\mathit{f}}_{\mathit{s},\mathit{min}}=\frac{{\mathit{V}}_{\mathit{m}}}{{\mathit{L}}_{\mathit{p}}\cdot {\mathit{I}}_{\mathit{m}}\cdot (1+{\mathit{K}}_{\mathit{v}})}.$$

(9)

According to (5) and (7), the resulting duty cycle d varied with the mains can be expressed as

$$\mathit{d}=\frac{{\mathit{T}}_{\mathit{on}}}{{\mathit{t}}_{\mathit{s}}}=\frac{1}{1+{\mathit{K}}_{\mathit{v}}\cdot \left|\sin (\omega \mathit{t})\right|}.$$

(10)

4. Design Considerations

In the following, the system specifications are given first, and then the design of the magnetizing inductance, output capacitance, dimming control circuit, linear current regulator, and output voltage automatic regulator follow. In the paper, a single LED, belonging to the Edixeon A1 Series, has the rated forward current of 350 mA and the typical forward voltage of 3.4 V. However, the forward voltage adopts 3.6 V due to a tolerance for different dimming current levels. Consequently, if the number of LEDs is chosen to be 24, then the maximum output voltage is 86.4 V plus 1.24 V and the maximum output current is 350 mA. Based on the above-mentioned, the system specifications are shown in

Table 1. System specifications without the linear current regulator considered.

Parameter	Specification
Input Voltage (vac)	90–277 V ± 5% (85–295 V)
Input Voltage Frequency (fac)	60 Hz
Maximum Output Voltage (Vo,max)	86.4 V ($=3.6\mathrm{V}\times 24$)
Maximum Output Current (Io,max)	350 mA
Minimum Output Current (Io,min)	35 mA
Converter Efficiency ($\eta$)	85%
Minimum Switching Frequency (fs,min)	55 kHz
LED String	24 LEDs in series

. In addition, the efficiency at the rated load is assumed to 85% and the minimum switching frequency is set at 55 kHz.

4.1. Design of Magnetizing Inductance L_m

The design procedure for L_m of the transformer T₁ is based on the application note AN1059 of the L6561 PWM IC [23], which makes the circuit operate in the CRM. In addition, it is assumed that there is no leakage inductance—that is, the coupling coefficient of the transformer is equal to one; hence, L_m is equal to the primary inductance L_p. There are four steps in design of L_m.

4.1.1. Step 1

From Table 1, some parameters will be used in the design, as shown in

Table 2. Design parameters used.

Name	Symbol	Value	Unit
Maximum Output Voltage	Vo,max	86.4	V
Maximum Output Current	Io,max	0.35	A
Maximum Output Power	Po,max	30.24	W
Converter Efficiency	η	85	%
Minimum Input Voltage	vac,min	85	Vrms
Minimum Input Voltage	vac,max	295	Vrms
Minimum Switching Frequency	fs,min	55	kHz

.

4.1.2. Step 2

The peak value of the minimum input voltage v_pk,min, the peak value of the maximum input voltage v_pk,max, and the rated input power P_in,max are calculated as follows:

$$v_{pk,min}=\sqrt{2}\times v_{ac,min}=\sqrt{2}\times 85=120.21\mathrm{V}$$

(11)

$$v_{pk,max}=\sqrt{2}\times v_{ac,max}=\sqrt{2}\times 295=417.19\mathrm{V}$$

(12)

$$P_{in,max}={\mathit{P}}_{\mathit{o},\mathit{max}}/\eta =30.24/0.85=35.58\mathrm{W}.$$

(13)

4.1.3. Step 3

The expressions of the reflected voltage V_R, the maximum duty cycle D_max, and the ratio of v_pk,min to V_R, called K_v, are shown below:

$$V_R=n\times (V_{o,\mathit{max}}+V_F)$$

(14)

$$D_{max}=\frac{V_R}{v_{pk,min}+V_R}$$

(15)

$$K_v=v_{pk,min}/V_R$$

(16)

where V_F is generally set at 1 V in the design.

In order to obtain relatively high utilization of the switch, the value of D_max is set at about 0.45. Accordingly, the value of n is adjusted based on (14) and (15) so that the value of D_max is close to 0.45. In this case, the value of n is set at 1.1. Therefore, the values of V_R, D_max, and K_v can be figured out to be

$$V_R=n\times (V_{o,\mathit{max}}+V_F)=1.1\times (86.4+1)=96.14\mathrm{V}$$

(17)

$$D_{max}=\frac{V_R}{v_{pk,min}+V_R}=\frac{96.14}{120.21+96.14}=0.444$$

(18)

$$K_v=v_{pk,min}/V_R=120.21/96.14=1.25.$$

(19)

4.1.4. Step 4

The expressions of F₂(K_v), which is a function of K_v, the peak value of the primary self-inductance current I_p,pk, and the primary self-inductance L_p, are shown below:

$$F_2(K_v)=\frac{0.5+0.0014\times K_v}{1+0.815\times K_v}$$

(20)

$$I_{p,pk}=\frac{2\times P_{in,max}}{v_{pk,min}\times F_2(K_v)}$$

(21)

$$L_p=v_{pk,min}/[(f_{s,min}\times I_{p,pk}\times (1+K_{{}_v})].$$

(22)

Based on (13) and (19)–(22), the values of F₂(K_v), I_p,pk, and L_p can be worked out to be

$$F_2(K_v)=\frac{0.5+0.0014\times K_v}{1+0.815\times K_v}=\frac{0.5+0.0014\times 1.25}{1+0.815\times 1.25}=0.249$$

(23)

$$I_{p,pk}=\frac{2\times P_{in,max}}{v_{pk,min}\times F_2(K_v)}=\frac{2\times 35.58}{120.21\times 0.249}=2.382\mathrm{A}$$

(24)

$$L_p=v_{pk,min}/[(f_{s,min}\times I_{p,pk}\times (1+K_{{}_v})]=120.21/[(55\mathrm{k}\times 2.382\times (1+1.25)]=408\mathsf{\mu }\mathrm{H}.$$

Since the transformer T₁ has the coupling coefficient of one, L_m = L_p = 408 μH. Hence, an RM8 core is chosen for T₁ with N₁ = 51 turns and N₂ = 46 turns.

4.2. Design of C_o

According to Table 1, since the low-frequency output voltage ripple will influence the value of C_o significantly, this ripple is assumed to be smaller than 4% of the maximum output voltage V_o,max. Accordingly, based on Table 1, the inequality of C_o can be obtained to be [24]:

$$C_o\ge \frac{I_{o,\mathit{max}}}{2\times \pi \times f_{ac}\times \mathsf{\Delta }{v}_o}=\frac{0.35}{2\times \pi \times 60\times 86.4\times 0.04}=269\mathsf{\mu }\mathrm{F}.$$

(25)

Hence, one 390 μF/100 V Rubycon capacitor is chosen as C_o.

4.3. Design of Input Filter

A two-order low-pass filter, with one inductor of 3.2 mH and one plastic capacitor of 0.22 μF, is used as an input filter and inserted between the rectifier and the LED driver. Therefore, the corner frequency of this filter is about 6 kHz. In addition, the harmonics for the THD regulations are measured up to the 39th order, equal to 60 Hz × 39 = 2.34 kHz, which is much lower than the corner frequency used. This means that such a filter does affect the THD slightly. Since the value of PF is the product of the displacement factor and the distortion factor, which is a function of THD, this filter does affect the PF slightly, also.

4.4. Components Used

The components used in the circuit is tabulated in

Table 3. Component specifications.

Component	Part Name
S1	IPA90R1K2
Do	SFF1008G
Co	390 uF/100 V Rubycon
T1	A-CORE RM8 with N1 = 51, N2 = 46
Q1	2SD1816
OP1, OP2	LM2904
Rs	0.2 Ω
R1	4.7 kΩ
R2	0.3 kΩ
VR1	100 kΩ
Rx	10 kΩ
Rref	4.7 kΩ
VCC	12.3 V
Controller	LD7830
Photocoupler	EL817

.

4.5. Design of LED Dimming Circuit

From Figure 1, it can be seen that one variable resistor VR₁ is used to change the voltage V₁ and then the voltage V₂ will be varied, so that the output current I_o is altered to achieve LED dimming. In the following equation, the formula for I_o can be represented by

$$I_o=\frac{1.24\times (\frac{R_{c2}}{R_{c1}+R_{c2}+V{R}_1})}{R_s}$$

(26)

From Table 1, the output current locates between 10% and 100% of the maximum output current, namely, between 0.035 and 0.35 A. With the values of R₁ and R₂ set at 4.7 kΩ and 0.3 kΩ, respectively, the maximum output current is 0.372 A as the value of VR₁ is zero, whereas the minimum output current is 0.018 A as the value of VR₁ is 100 kΩ. These two values, covering the dimming current range, are calculated below:

$$I_{o,adj,\mathit{max}}=\frac{1.24\times (\frac{R_{c2}}{R_{c1}+R_{c2}+0})}{R_s}=\frac{1.24\times (\frac{0.3k}{4.7k+0.3k+0})}{0.2}=0.372\mathrm{A}$$

(27)

$$I_{o,adj,\mathit{min}}=\frac{1.24\times (\frac{R_{c2}}{R_{c1}+R_{c2}+100k})}{R_s}=\frac{1.24\times (\frac{0.3k}{4.7k+0.3k+100k})}{0.2}=0.018\mathrm{A}.$$

(28)

4.6. Design of Linear Current Regulator

From Figure 1, the output current is determined by the following equation:

$$I_o=\frac{V_s}{R_s}\approx \frac{V_2}{R_s}.$$

(29)

Based on the LM2904 datasheet, it can be seen that the maximum offset of the input pin is 7 mV. This means that the value of V₂ should be larger than 7 mV to avoid this IC having an error in action at minimum output current. Hence, the value of V₂ is set at 70 mV, thereby causing the value of R_s to be 0.2 Ω (= 0.07 V/0.35 A).

4.7. Design of Output Voltage Automatic Regulator

4.7.1. Design of V₃

In design of the linear current regulator, the value of V₃ is set at 1.24 V due to a stable voltage of 1.24 V inside the LT432. Hence, we should make sure that the voltage V_CE for Q₁ is higher than the voltage V_CE,sat to guarantee that Q₁ operates in the linear region. According to the datasheet for Q₁, called 2SD1816, as the current flowing through Q₁ is 410 mA, the corresponding voltage V_CE is 1 V, which is larger than the V_CE,sat voltage of 0.4 V. In this paper, as the current flowing through Q₁ is 350 mA, the resulting voltage V_CE is 1.17 V (= 1.24 V − 0.35 A × 0.2 Ω), guaranteeing that Q₁ operates in the linear region.

4.7.2. Design of R_x and R_ref

From Figure 2, the value of V_CC is about 12.3 V. According to the industrial experience, the current flowing through R_x is at least 1 mA to make sure that the photocoupler can operate normally. Therefore, the value of R_x is set at 10 kΩ, causing the current in R_x to be 1.09 mA [= (12.3 − 2.4) V/10 kΩ], where 2.4 V is the voltage of the anode of the diode embedded in the photocoupler. On the other hand, the current flowing through R_ref is at least 2 mA to make sure that the TL432 can operates normally. Thus, the value of R_ref is set at 4.7 kΩ, thereby making the current in R_ref be 2.35 mA [= (12.3 − 1.24) V/4.7 kΩ].

5. Experimental Results

5.1. Test Bench for Measurements

The setup used to measure the efficiency will be briefly described. First, as shown in Figure 5, the values of input power, PF, and THD can be obtained from the power meter. Regarding the output power, the output current is read from a current meter, and the output voltage is read from another voltage meter. Therefore, the output power can be attained. Finally, the efficiency is deduced from those two measurements.

As for measured waveforms, they are also obtained by the instruments shown in Figure 5, along with one additional current amplifier, named Tektronix TCPA300, one additional current probe, named Tektronix TCP305, and one additional isolated oscilloscope, named Tektronix TPS2024B.

5.2. Actual System Circuit

Figure 6 shows the actual system circuit of the proposed LED driver, where the primary auxiliary winding N₃, the diode D_a, the capacitor C_a, and the resistor R_ZCD are used to obtain the signal ZCD, and the secondary auxiliary winding N₄, the diode D_b, the capacitor C_b, the transistor Q₂, the Zener Z_D1, and the resistor R_ZD are employed to generate the circuit voltage V_CC.

5.3. Measured Waveforms

At 110 and 220 V input voltages and 100% output load, some experimental results, without and with the proposed low-frequency current ripple improved, are given to verify the proposed LED driver.

Under 110 V input voltage and 100% output load, Figure 7 displays the input voltage v_ac and the input current i_ac, without and with the proposed method, whereas Figure 8 depicts the ripple of V_f, called Δv_f, and the ripple of I_o, called Δi_o, without and with the proposed method. Under 220 V input voltage and 100% output load, Figure 9 displays the input voltage v_ac and the input current i_ac, without and with the proposed method, whereas Figure 10 depicts the ripple of V_f, called Δv_f, and the ripple of I_o, called Δi_o, without and with the proposed method.

Some comments on measured waveforms will be given as follows:

(1)

For both methods, the higher the input voltage, the larger the input current distortion.

(2)

For both methods, any value of the input voltage affects the low-frequency output voltage ripple and current ripple slightly.

(3)

With the low-frequency current ripple improved, not only the output voltage ripple but also the output current ripple is reduced.

5.4. Electrical Data Comparisons

Electrical data curves: In the following, the power factor, harmonic distortion, and output current ripple percentage without and with the low-frequency current ripple improved are discussed as below.

5.4.1. Efficiency Comparison

Efficiency curve: Figure 11 shows curves of efficiency versus output load without and with the low-frequency current ripple improved at the input voltage of 110 V, whereas Figure 12 shows curves of efficiency versus output load without and with the low-frequency current ripple improved at the input voltage of 220 V. From these two figures, the efficiency with a low-frequency current ripple improved is lower than that without a low-frequency current ripple improved by 1.2%. From these two figures, the efficiency at 100% output load with the current ripple improved is 86.3% at the input voltage of 110 V, whereas the efficiency at 100% output load with the low-frequency current ripple improved is 89.2% at the input voltage of 220 V.

5.4.2. Power Factor Comparison

Power factor curve: Figure 13 shows curves of the power factor versus output load without and with the low-frequency current ripple improved at the input voltage of 110 V, whereas Figure 14 shows curves of the power factor versus output load without and with the low-frequency current ripple improved at the input voltage of 220 V. From these two figures, the power factor with the low-frequency current ripple improved is almost the same as that without the low-frequency current ripple improved. From these two figures, the power factor at 50% output load with the low-frequency current ripple improved is 0.994 at the input voltage of 110 V, whereas the power factor at 50% output load with the low-frequency current ripple improved is 0.935 at the input voltage of 220 V.

5.4.3. Total Harmonic Distortion Comparison

Figure 15 shows curves of total harmonic distortion versus output load without and with the low-frequency current ripple improved at the input voltage of 110 V, whereas Figure 16 shows the curves of total harmonic distortion versus output load without and with the low-frequency current ripple improved at the input voltage of 220 V. From these two figures, the total harmonic distortion with the low-frequency current ripple improved is slightly lower than that without the low-frequency current ripple improved. From these two figures, the total harmonic distortion at 50% output load with the low-frequency current ripple improved is 5.6% at the input voltage of 110 V, whereas the total harmonic distortion at 50% output load with the low-frequency current ripple improved is 9.4% at the input voltage of 220 V.

5.4.4. Output Current Ripple Comparison

Figure 17 shows curves of output current ripple versus output load without and with the low-frequency current ripple improved at the input voltage of 110 V, whereas Figure 18 shows curves of output current ripple versus output load without and with the low-frequency current ripple improved at the input voltage of 220 V.

The output current ripple percentage, called I_o,ripple%, is defined as

$$I_{o,ripple}\%=(\mathsf{\Delta }{i}_o/I_o)\times 100\%.$$

(30)

From Figure 17 and Figure 18 and

Table 4. Measurements of load percentage versus output current ripple percentage at input voltage of 110 V (OCR: output current ripple).

Output Load [%]	10	20	30	40	50	60	70	80	90	100
Traditional OCR [%]	13.1	14.3	14.7	14.9	15.1	16.1	16.9	17.6	17.8	18.3
Proposed OCR [%]	4.9	4.6	4.2	3.9	3.7	3.9	4.2	4.4	4.4	4.6
Improvement Traditional/Proposed	2.7	3.1	3.5	3.9	4.1	4.1	4.1	4.0	4.0	4.0

and

Table 5. Measurements of load percentage versus output current ripple percentage at input voltage of 220 V.

Output Load [%]	10	20	30	40	50	60	70	80	90	100
Traditional OCR [%]	10.9	13.0	13.9	14.3	14.6	15.4	16.1	16.5	16.9	17.1
Proposed OCR [%]	4.9	4.6	3.8	3.4	3.2	3.4	3.6	3.8	3.9	4.0
Improvement Traditional/Proposed	2.2	2.9	3.7	4.2	4.6	4.5	4.5	4.3	4.4	4.3

, it can be seen that with the low-frequency current ripple improved, the output current ripple at 100% output load is lower than that at 10% output load. As compared with the output current ripple percentage without a low-frequency current ripple improved, the output current ripple percentage with the low-frequency current ripple improved can be reduced by a factor of about four at 100% output load and by a factor of about two at 10% output load. From these two figures, the maximum value of the output current ripple percentage with the low-frequency current ripple improved is 4.9%.

6. Comparison

Since the proposed circuit belongs to the step-down circuit, we choose the circuit shown in [5] as a comparison. This circuit is constructed by flyback and buck converters. Since there is no show of THD in [5], the comparison items include the power factor, efficiency, and current ripple percentage. From

Table 6. Comparison between [5] and the proposed.

Comparison Items	Power Factor		Efficiency		Current Ripple Percentage
Input voltage	110 V	220 V	110 V	220 V	110 V	220 V
[5]	0.99	0.96	83.8%	85.5%	<10%	<10%
Proposed	0.99	0.98	86.3%	89.2%	<5%	<5%

, we can see that the proposed converter has better performance than the circuit in [5].

7. Conclusions

In this paper, applying the low-frequency current ripple reduction based on the linear current regulator to the AC-DC flyback LED driver is presented so that LED flickering can be improved. At the same time, adjusting the value of the variable resistor can achieve LED dimming. Furthermore, the output voltage of the flyback converter can be automatically regulated so that the power dissipation in the BJT will be only linearly proportional to the LED current. The results of the comparison between the proposed and the compared are described as following:

(1)

The performance on PF between the two is almost the same.

(2)

The performance on THD between the two is slightly different.

(3)

The maximum difference in efficiency between the compared and the proposed is around 1.2%.

(4)

The maximum difference in output current ripple percentage between the compared and the proposed is around 14%.