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Article

Modeling and Analysis of Voltage Harmonic for Three-Level Neutral-Point-Clamped H-Bridge Inverter Considering Dead-Time

National Key Laboratory of Science and Technology on Vessel Integrated Power System, Naval University of Engineering, Wuhan 430033, China
*
Author to whom correspondence should be addressed.
Energies 2022, 15(16), 5937; https://doi.org/10.3390/en15165937
Submission received: 19 July 2022 / Revised: 12 August 2022 / Accepted: 15 August 2022 / Published: 16 August 2022
(This article belongs to the Special Issue Advanced Design and Control of Multiphase Machines)

Abstract

:
The advantages of three-level neutral-point-clamped (NPC) H-bridge inverters, such as simple topological structure, low device voltage stress, high equivalent switching frequency, and highly expansible capacity, have made them the preferred choice for inverters matching with medium voltage high-capacity multi-phase open-end winding vessel propulsion motors. To quantitatively evaluate the propulsion motors’ harmonics, electromagnetic vibration, and noise caused by pulse-width modulation (PWM) and device dead-time, it is necessary to research the mathematical modeling of pulse-width modulated output voltage harmonics in consideration of dead-time. In this paper, the principle of the phase-disposition PWM method of the 3L-NPC H-bridge inverters was firstly introduced. Then, the analytical models of output voltage harmonics with and without considering the effect of dead-time were established based on the double Fourier series approach and the harmonic distribution of the dead-time effect was accurately characterized. On the basis of the above, the experimental platform was established to verify the proposed analytical model. Simulation and experimental results are consistent with the theoretical analysis in low and high-frequency output voltage harmonics, which proves the correctness and the feasibility of the analytical modeling method researched by this paper. This will provide a theoretical basis for subsequent studies, which include the quantitative analysis and the suppression of output harmonics of the H-bridge inverter considering dead-time.

1. Introduction

An integrated power system (IPS) combines the traditional mechanical propulsion system with the power system, which is the only way for high-energy weapons to function on the ship [1,2,3]. Compared with the conventional two-level converter, the neutral-point-clamped (NPC) three-level converter has the advantages of higher efficiency and fault-tolerance [4], better quality of output voltage [5,6,7], and less voltage stress on the device [8,9], which has been widely researched and applied. The propulsion system composed of the NPC three-level H-bridge inverter and multiphase open-winding motors is the core subsystem of the IPS and the preferred scheme for modern large-tonnage ship power systems [10,11,12,13,14]. The behavior of the propulsion system has an important influence on the overall performance of ships, such as acoustic stealth, fitness, mobility, and electromagnetic compatibility, and has the characteristics of typical power equipment with high technical difficulty, long development period, and high investment demand, which has always been the focus in the research of the technology and engineering application of IPS.
As the driving device of the propulsion motor, inverters are generally controlled by sinusoidal pulse-width modulation (SPWM) technology [15]. To prevent short circuits caused by the device straight-through, the dead-time must be set when the complementary switch tube is switched, which will lead to output voltage distortion and reduce the control performance of the propulsion system [16,17]. What is more, the high-frequency harmonic component [18] caused by PWM modulation contained in the output voltage of the inverter will cause high-frequency electromagnetic vibration and noise [19,20,21] in the propulsion motor, which largely determines the electromagnetic compatibility performance of the whole propulsion motor and its full-frequency vibration acceleration. Therefore, accurate quantitative analysis of the output voltage harmonics of the inverter considering the dead-time can lay a theoretical foundation for subsequent research including the evaluation of the propulsion system’s electromagnetic compatibility performance and the suppression of vibration noise.
Analytical calculations of inverters’ output voltage harmonics have been studied in the literature [22,23,24,25,26,27]. In [23], analytical modeling was carried out on the output voltage harmonics of the cascaded H-bridge topology, but the influence of dead-time was not considered. In [24], the output voltage harmonics of the two-level single-phase H-bridge inverter are analytically derived under the influence of dead-time. However, the process of two-level inverter modulation is different from the modulation of a multi-level inverter, thus it cannot be directly promoted. Meanwhile, the influence of load power factor changes on the analytical expression of output voltage is not taken into account.
The Fourier-based unit cell analysis method is widely used in harmonic analysis of inverter output voltage, which can intuitively show the switching time and phase relationship in the process of PWM modulation [25,26,27]. By establishing the unit cell of a NPC three-level single-phase inverter under phase opposite disposition PWM(POD-PWM), the literature [26] provides the calculation method for harmonic expression of output voltage considering dead-time under different sampling methods, but the proportion and harmonic composition of dead zone effect in output voltage is not analyzed. The literature [27] modeled the output harmonic characteristics of NPC three-level H-bridge converters considering dead zone, but the analytical results have not been experimentally verified.
The above research has certain guiding significance for the analytical modeling of the output voltage of the inverter, but few provide accurate quantitative derivation and systematic experimental verification for the proportion of dead zone in the output voltage of NPC three-level H-bridge inverters and the harmonic distribution characteristics of output voltage considering dead-time. In this paper, the modulation model of the NPC three-level H-bridge inverter is established. By constructing the PD-PWM modulation unit cell of the NPC three-level H-bridge inverter considering the dead-time, the influence of dead-time and modulation process on the output voltage harmonics are analyzed. Based on the theoretical analysis, the accurate harmonic model of the output voltage is given, which can provide a theoretical basis for estimating and eliminating the harmonics of the inverter and improving the stability and the electromagnetic compatibility performance of the ship propulsion system. The validity of the proposed voltage harmonics analytical model was verified by off-line simulation and experiment.

2. Modulation Strategy of Three-Level H-Bridge Inverter

The main circuit of the 15-phase three-level H-bridge propulsion inverter and propulsion motor are shown in Figure 1 and Figure 2, respectively.
The phase-disposition pulse-width modulation (PD-PWM) strategy is used for propulsion inverter driving. A15-phase three-level H bridge inverter unit in three channels has the same carrier phase. The difference of the modulation waves between the five-phase H bridges in a single channel is 72° (the difference of the modulation waves within the H bridge is 180°), and the difference of the modulation waves between different channels is 12°, which matches the phase difference of the propulsion motor winding. The block diagram of the PD-PWM of three-level single-phase H-bridge topology is presented in Figure 3.
The three channels of the 15-phase inverter are relatively independent. To improve the device expansibility and modular maintainability, the top-centralized-bottom-distributed layout combined with the modularized power unit is adopted as shown in Figure 4. Every single channel is composed of five parallel three-level inverter H bridge units which correspond to five open-end windings of the propulsion motor as shown in Figure 5.
Due to the distributed control framework, the main circuit and control circuit structure are relatively independent, thus the analysis of harmonic characteristics of the output voltage of the five-phase H bridge is similar to that of a single-phase H bridge. To simplify the analysis, this paper studies one of the phase topologies, and the conclusions can be directly extended to NPC three-level multiphase H-bridge topology.

3. NPC Three-Level Inverter PD-PWM Modulation Principle

The single-channel five-phase H-bridge topology of the NPC three-level inverter is shown in Figure 6. According to the analysis above, the main difference between the five-phase H-bridge topology and the single-phase H-bridge topology of the inverter is that the modulation waves of the five-phase H bridge differ by 2π/5 in sequence, and the topological structure and control strategy of the power units of each H-bridge are completely the same [28]. Therefore, the harmonic characteristics of the output voltage of the inverter can be characterized based on the expansion analysis of the single-phase H-bridge topology. Figure 7 shows the single-phase H-bridge topology of the NPC three-level inverter.
The NPC three-level single-phase H-bridge topology consists of two legs, each of which contains four switch tubes and two clamp diodes. The switch modes of a single leg are shown in Table 1. Its output contains three levels, namely, +Udc/2, 0, and –Udc/2, corresponding to switch modes S1–S3, respectively. The output voltage of the H bridge is the output voltage difference between the left and right legs, including five output levels of +Udc, +Udc/2, 0, −Udc/2, and −Udc.

4. Harmonic Analysis of Output Voltage of NPC Three-Level H-Bridge Inverter

PD-PWM modulation of a single leg of NPC three-level topology without dead-time is shown in Figure 8. Two stacked triangular carriers, uc1 and uc2, are compared with the modulated wave uref to control the switch tubes in order that each leg can operate according to the switch states shown in Table 1.

4.1. Harmonic Analysis of Output Voltage without Dead-Time

The double Fourier-based harmonic analysis method is used to construct the unit cell of different modulation strategies by analyzing the phase relationship between modulation wave and carrier wave and deducing the analytical expression of output voltage with double integration. This method is intuitive and effective for harmonic analysis of inverter output voltage. According to double Fourier analysis, output voltage uao of a single bridge leg in NPC three-level topology can be written as:
u ao = A 00 2 + n = 1 A 0 n cos n y + B 0 n sin n y + m = 1 A m 0 cos m x + B m 0 sin m x + m = 1 n = ( n 0 ) A m n cos m x + n y + B m n sin m x + n y
A00/2 represents DC offset fraction, n = 1 A 0 n cos n y + B 0 n sin n y represents fundamental wave components and fundamental band harmonic components, m = 1 A m 0 cos m x + B m 0 sin m x represents the carrier harmonic component, and m = 1 n = ( n 0 ) A m n cos m x + n y + B m n sin m x + n y represents the side-band harmonic component. x = ωst, y = ωot, ωs is the carrier angular frequency and ωo is the fundamental angular frequency. Amn and Bmn represent coefficients of harmonic components, respectively, and their expressions are as follows:
A m n = 1 2 π 2 - π π - π π U ao cos m x + n y d x d y B m n = 1 2 π 2 - π π - π π U ao sin m x + n y d x d y
The expressions of modulated wave uref and carriers uc1 and uc2 are shown in (3). Us and Uc represent the amplitudes of modulated wave and carrier, respectively. The switch function of a single leg of NPC three-level topology can be obtained by simultaneously modulating wave and carrier expression as shown in Table 2, where M represents the modulation ratio. Based on the switch function and output voltage in Table 2, a single leg modulation unit cell of NPC three-level topology can be built without considering dead-time as shown in Figure 9.
u ref = U s cos y u c 1 = U c π x , π + 2 k π x < 2 k π U c π x , 2 k π x < π + 2 k π u c 2 = U c π x + π , π + 2 k π x < 2 k π U c π x π , 2 k π x < π + 2 k π
The expression of the output voltage of a single leg of NPC three-level H-bridge topology without dead-time, uao, can be obtained by the double integral operation based on the unit cell shown in Figure 9. By shifting phase π of modulated wave in uao, the expression of the output voltage of the other bridge leg at the same time, ubo, can be obtained. By subtracting the two expressions, the analytical expression of output voltage uo of the dead-time free NPC three-level single-phase H-bridge inverter can be obtained:
u o = u ao u bo = M U dc cos ω o t + 2 U dc π m = 1 n = 1 2 m J 2 n + 1 2 m π M cos n π cos 2 m N + 2 n + 1 ω o t
where J2n+1(.) denotes the Bessel’s function of the first kind of order 2n + 1, and the Jacobi–Anger expansion and Bessel integral equations which were used to calculate (4) are given in Appendix A.

4.2. Harmonic Analysis of Output Voltage with Dead-Time

PD-PWM modulation of a single leg of the NPC three-level topology with dead-time is shown in Figure 10.
The dead-time will delay the opening of the switch tube and affect the pulse width of the output voltage. A single leg of an NPC three-level inverter is an illustrative example. Assuming that the current outflow the bridge arm is positive, the specific analysis is as follows:
(1) When the output current io > 0, the output voltage is switched from −Udc/2 to 0, and the switch mode is switched from S3 to S2. In the dead-time, the switch tube T4 is closed, while T2 is not yet opened. At this time, the reverse parallel diode of T3 and T4 continues to flow and the output voltage is still −Udc/2. After the dead-time, the output voltage becomes zero, thus the switching process will affect the length of the output voltage pulse width. The corresponding dead-zone middle-mode current path is shown in Figure 11a—black, blue, and green dotted lines represent the current path of S1, S2, and S3, respectively, and the red solid line represents the current path in dead-time.
(2) When the output voltage is switched from 0 to +Udc/2 and the switch mode is switched from S2 to S1, T3 is closed in the dead-time and T1 is not yet opened. During the dead-time, D1 and T2 continue to flow and the output voltage remains 0. After the dead-time, the output voltage becomes +Udc/2, thus the switching process will also affect the length of the output voltage pulse width. The corresponding dead-zone middle-mode current path is shown in Figure 11b.
(3) When the switch mode is switched from S1 to S2 or from S2 to S3, the output voltage can be switched immediately and the dead-time has no influence on the output voltage pulse width.
Reflecting the above changes into the unit cell, all switch curves in the x < 0 regions will shift upward, ωstd, while all switch curves in the x > 0 regions do not need to move. Thus, the unit cell of a single leg in NPC three-level H-bridge topology when io > 0 can be obtained as shown in Figure 12. In the region x < 0, the dotted line represents the switching curve without dead-time, while the solid line represents the switching curve with dead-time, and the shaded part represents the effect of dead-time on the output voltage.
Similarly, when io < 0, the corresponding current path in the dead-time is shown in Figure 13. When the switch mode switches from S1 to S2 or from S2 to S3, the dead-time will affect the pulse width length of the output voltage, and the switching curve shifts upward in the region x > 0 by ωstd. When the switch mode is switched from S3 to S2 or from S2 to S1, the dead-time does not affect the output voltage pulse width and the switch curve remains fixed in the region x < 0. The unit cell of a single leg in the corresponding NPC three-level topology is shown in Figure 14.
After the unit cell with dead-time is obtained, based on the shaded part in Figure 12 and Figure 14, the output voltage deviation Δua of a single leg of the NPC three-level inverter generated by the dead zone can be obtained as shown in (5):
Δ u a = U dc π 2 ω s t d n = 3 , 5 ... 1 n cos n ω o t + U dc 2 π m = 1 n = J 2 n 2 m π M 2 m cos n π sin m ω s t d cos 2 m N + 2 n ω o t m ω s t d - U dc 2 π m = 1 n = J 2 n 1 2 m π M 2 m cos n π sin 2 n 1 2 π sin m ω s t d sin 2 m N + 2 n 1 ω o t m ω s t d + U dc π 2 m = 1 n = k = 1 4 J 2 k 1 2 m 1 π M 2 k 1 cos n π 2 k 1 2 2 n 2 sin 2 m 1 2 ω s t d sin 2 m N N + 2 n ω o t 2 m 1 2 ω s t d U dc π 2 m = 1 n = k = 1 4 J 2 k 2 m 1 π M 2 k sin 2 n 1 2 π 2 k 2 2 n 1 2 sin 2 m 1 2 ω s t d cos 2 m N N + 2 n 1 ω o t 2 m 1 2 ω s t d
When the inverter is carrying a resistance-inductance load, the output voltage phase is ahead of the output current. As shown in the previous analysis, when io > 0, the superposition of Δua reduces the output voltage and its polarity is negative; while when io < 0, the superposition of Δua increases the output voltage and its polarity is positive, thus it can be seen that the output voltage deviation generated by the dead-time is always opposite to the output current polarity. The voltage and current vector diagrams are shown in Figure 15. U a o denotes the output voltage of a single leg of the NPC three-level H-bridge inverter without dead-time, while U a o denotes the actual output voltage of the leg considering dead-time, I o denotes the output current, Δ U a denotes the voltage deviation due to the dead-time effect, φ denotes the load power factor angle, and θ denotes the angle between U ao and I o .
Based on Figure 15, taking the phase of uao as the benchmark, the phase of io is −θ, and the phase of Δua is π – θ. Then the actual output voltage uao′ of a single leg with dead-time can be calculated by:
u ao = u ao 0 + Δ u a ( π θ )
Since the analytical expressions for uao, Δua, and φ are known, the angle θ can be calculated first, and then the expression for uao′ can be derived from Equation (6). Let the fundamental wave components of Δua, uao, and uao′ be ΔUa, Uao, and Uao′, respectively, and from the cosine theorem we obtain:
U a o 2 = U a o 2 + Δ U a 2 - 2 U a o Δ U a c o s π - φ
The expression for solving the included angle θ is
θ = a r c c o s U a o 2 + Δ U a 2 - U a o 2 2 U a o Δ U a
Expressions of Uao′ and θ can be obtained by solving (7) and (8), and each known quantity can be substituted into Equation (6) simultaneously to obtain the output voltage uao′. For NPC three-level H bridge topology, the polarity of the output current of two bridge legs is opposite at the same time, and the phase relation between the output voltage and current of each leg corresponds to the same. Thus, according to the same steps, the expression of Δub and ubo′ can be obtained in the same way. By subtracting uao’ and ubo′, we can obtain the output voltage uo of the NPC three-level single-phase H bridge inverter with dead-time:
u o = u a o - u b o = M U d c 2 - 2 U d c ω s t d sin φ π 2 2 - 2 U d c ω s t d cos φ π 2 cos ω o t + φ - θ - 2 U d c π 2 ω s t d n = 3 , 5 1 n cos n ω o t + θ + 2 U d c π m = 1 n = - J 2 n + 1 2 m π M 2 m cos n π cos 2 m N + 2 n + 1 ω o t + U d c π m = 1 n = - J 2 n 2 m π M m cos n π sin m ω s t d cos 2 m N + 2 n ω o t + θ - m ω s t d - U d c π m = 1 n = - J 2 n - 1 2 m π M m cos n π sin 2 n - 1 2 π sin m ω s t d sin 2 m N + 2 n - 1 ω o t + θ - m ω s t d
According to (9):
(1) Considering dead-time, the amplitude of the fundamental component of the NPC three-level H-bridge inverter output voltage is expressed as:
U f = M U dc 2 2 U dc ω s t d sin φ π 2 2 2 U dc ω s t d cos φ π 2
According to the above equation, the dead-time will lead to a reduction in the fundamental amplitude, and the degree of reduction is related to the dead-time duration, carrier frequency, and load power factor angle. The ratio of the fundamental amplitude of the output voltage considering the dead-time to the maximum value of the fundamental MUdc for different modulation ratios varies with the load power factor angle φ is shown in Figure 16.
(2) The dead-time introduces odd low frequency harmonics to the output voltage, the amplitude of which is independent of the modulation ratio and load conditions, with the nth harmonic amplitude being
U n = 2 U d c n π 2 ω s t d
where n = 3, 5, 7... The variation of the ratio of low-frequency harmonics to fundamental component with the change of dead-time and carrier frequency is shown in Figure 17. It can be seen from Figure 17 that the proportion of low-frequency harmonics increases with the extension of dead-time and the increase of carrier frequency, and decreases with the increase of harmonic order.
(3) According to the comparison of Equations (4) and (9), the dead-time introduces the high frequency harmonic terms into the output voltage, and the side-band frequency harmonics are still symmetrically distributed in the center of even frequency doubling of carrier frequency.

5. Simulation and Experimental Results

5.1. Simulation Results

To verify the correctness of the theoretical analysis in this paper, a simulation model of the NPC three-level single-phase H-bridge inverter is built in MATLAB/Simulink. Combined with the rated working condition of the propulsion motor, the simulation parameters are set as shown in Table 3.
By taking the modulation ratio M = 0.8 and the fundamental frequency fo is 22 Hz, Figure 18 shows the spectral comparison between simulation and calculation of the output voltage without dead-time and Figure 19 shows the time-domain waveform comparison of the output voltage.
In the dead-time free condition, the amplitude of the fundamental wave of the simulated output voltage is 3200 V and THD is 38.37%. The side-band harmonics are symmetrically distributed in the center of even frequency doubling of switching frequency, which reflects the frequency doubling effect of the H-bridge topology. The fundamental wave amplitude obtained by theoretical calculation is 3200 V and THD is 38.04%. According to the comparison of Figure 18 and Figure 19, the simulation output voltage waveform and spectrum are consistent with the theoretical calculation, thus the correctness of theoretical derivation can be demonstrated. After adding 10 μs dead-time, the spectrum comparison of the output voltage obtained by simulation and theoretical calculation is shown in Figure 20, and the waveform comparison of output voltage is shown in Figure 21.
After adding dead-time, the amplitude of the fundamental wave of the output voltage obtained by simulation is 3160 V and THD is 38.73%, and the proportion of side band harmonics at 1936 Hz and 2068 Hz account for the highest percentage with 14.81% and 14.85%, respectively. Theoretical calculation of the fundamental wave amplitude is 3159 V and THD is 38.59%, side-band harmonics at 1936 Hz and 2068 Hz frequency account for 14.74%. Figure 20 and Figure 21 show that the simulation output voltage waveform and spectrum agree well with the theoretical calculation results. Change the dead time to 15 μs while keeping the other parameters unchanged, the spectrum comparision of the output voltage obtained by simulation and theoretical calculation is shown in Figure 22, and the waveform comparison of output voltage is shown in Figure 23.
After the dead-time is increased to 15 μs, the simulated output fundamental amplitude is 3142.31 V, which drops more than when compared to the 10 μs dead-time condition. The THD of the output voltage is 38.74% and the side frequency harmonics at 1936 Hz and 2068 Hz account for the highest percentage at 14.59% and 14.72%, respectively. As can be seen from Figure 22c compared with Figure 20c, the harmonic amplitude in the low frequency band has increased. The calculation results of the output voltage fundamental amplitude are 3140.68 V, THD is 38.61%, and the ratio of side frequency harmonics at 1936 Hz and 2068 Hz are 14.51%. As can be seen from the comparison of Figure 22 and Figure 23, the simulation and the calculation results are in good agreement, which can show the correctness of the theoretical analysis.
Considering the low frequency operating conditions of the ship, other parameters are unchanged, for example, the fundamental frequencies, fo, are 1 Hz and 5 Hz and dead-time is 10 μs for verification. The comparison between the simulation and calculation results when fo is 5 Hz is shown in Figure 24 and Figure 25, while the comparison when fo is 1 Hz is shown in Figure 26 and Figure 27.
At 5 Hz, the fundamental frequency is 3150 V, THD is 38.93%, and the side frequency harmonics at 1985 Hz and 2015 Hz have the largest proportion with 15.19% and 15.15%, respectively; the theoretical calculated fundamental amplitude is 3150 V and THD is 38.82% The ratio of side frequency harmonics at 1985 Hz and 2015 Hz is 14.88%. At 1 Hz fundamental frequency, the simulated output voltage fundamental amplitude is 3148 V, THD is 38.82%, and the side frequency harmonics at 1997 Hz and 2003 Hz have the largest proportions of 15.17% and 15.16%, respectively; the theoretical calculated fundamental amplitude is 3149 V and THD is 38.64% The side frequency harmonics at 1997 Hz and 2003 Hz are 14.85%. By increasing the modulation ratio from 0.5 to 1 in steps of 0.05, the output voltage harmonic pairs are obtained for the fundamental frequency of 22 Hz, 5 Hz, and 1 Hz, respectively, as shown in Figure 28, Figure 29 and Figure 30.
As shown in Figure 28, Figure 29 and Figure 30, with the increase of modulation ratio, the simulated output voltage low-frequency harmonic amplitude remains unchanged, while the high-frequency harmonic amplitude oscillates periodically with the rise of modulation ratio. In summary, the simulation results can illustrate the correctness of the theoretical analysis in this paper.

5.2. Experimental Results

To further verify the correctness of the theoretical derivation of this paper, an experimental platform of an NPC three-level H-bridge inverter was built based on RT-Lab and OP5600 real-time simulator for experimental verification, as shown in Figure 31. The experimental parameters are consistent with the simulation parameters, taking the modulation ratio M = 0.8 and the fundamental frequency fo = 22 Hz. The output voltage waveform of the semi-physical experiment is shown in Figure 32, and the comparison of the output voltage spectrum is shown in Figure 33 when the dead-time is 10 μs.
The experimental output voltage fundamental amplitude is 3161 V, which is similar to the theoretical calculation result; the THD is 38.91%, which is slightly larger than the theoretical calculation value (38.59%), and the experimental output voltage low-frequency harmonic amplitude is slightly larger than the theoretical calculation value, which is considered to be caused by the switching tube conduction voltage drop factor in the experiment; the percentages of the side frequency harmonics at 1936 Hz and 2068 Hz are 13.74% and 13.96%, respectively, which are slightly less than the theoretical calculation results (14.74%). Taking the modulation ratio M = 0.2 and the fundamental frequency fo = 5 Hz, the output voltage waveform of the experiment is shown in Figure 34, and the comparison of the output voltage spectrum is shown in Figure 35.
After the change of working conditions, the experimental output voltage fundamental amplitude is 771.36 V and the percentages of the side frequency harmonic amplitudes at 1995 Hz and 2005 Hz are 85.90% and 87.03%, respectively. The theoretical calculated fundamental amplitude is 750.93 V and the side frequency harmonics at 1995 Hz and 2005 Hz are 86.3%. From Figure 35, the amplitude and distribution of each harmonic of the experimental output voltage agree with the theoretical calculation. In summary, the experimental results can illustrate the correctness of the theoretical analysis in this paper.

6. Conclusions

In this paper, the harmonic characteristics of the output voltage of the NPC three-level H-bridge inverter considering dead-time are studied. The NPC three-level PD-PWM modulation unit cells with dead-time were established and the harmonic components of the voltage deviation generated by the dead-time were derived analytically. Most importantly, an accurate output voltage expression considering dead-time is given, and the correctness of the analytical model is verified by simulation and experiment. The output voltage analysis model proposed in this paper can intuitively reflect the influence of the dead-time and the harmonic amplitude and distribution characteristics of output voltage after considering the dead-time, which can provide a theoretical reference for quantitative analysis and optimal suppression of inverter output voltage harmonics. The harmonic modeling method proposed in this paper considering dead-time can be extended to other pulse width-modulation methods in the NPC three-level topology, which also lays the foundation for the assessment and enhancement of EMC performance and vibration and noise performance of the three-level multiphase propulsion motor system.

Author Contributions

Conceptualization, L.-D.H. and W.-J.W.; methodology, L.-D.H., W.-J.W., and Z.-Y.X.; software, W.-J.W. and Z.-Y.X.; validation, L.-D.H., W.-J.W., and Z.-Y.X.; formal analysis, W.-J.W.; data curation, W.-J.W.; writing—original draft preparation, W.-J.W.; writing—review and editing, W.-J.W. and C.G.; supervision, W.-J.W. and C.G. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the National Natural Science Foundation of China (No. 51907200). This work was also funded by the Natural Science Foundation of Hubei Province (No. 2019CFB249).

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interests.

Appendix A

Jacobi–Anger expansion and Bessel integral equations
Jacobi–Anger expansion, which is widely used in Fourier-based harmonic analysis calculation, is as follows:
e ± j ξ cos θ = J 0 ξ + 2 k = 1 j ± k J k ξ cos k θ
According to Euler’s equation, (A1) can be transformed as follows:
cos ξ cos θ = J 0 ξ + 2 k = 1 cos k π J 2 k ξ cos 2 k θ sin ξ cos θ = 2 k = 0 cos k π J 2 k + 1 ξ cos 2 k + 1 θ
Substitute θ′ = θ − π/2 to (A2) we obtain:
cos ξ sin θ = J 0 ξ + 2 k = 1 J 2 k ξ cos 2 k θ sin ξ sin θ = 2 k = 0 J 2 k + 1 ξ sin 2 k + 1 θ
From (A1)–(A3), we can obtain some Bessel integral equations which can be useful for harmonic calculation as follows:
π π e ± j ξ cos θ e j n θ d θ = 2 π j n ξ
cos ξ sin θ = J 0 ξ + 2 k = 1 J 2 k ξ cos 2 k θ sin ξ sin θ = 2 k = 0 J 2 k + 1 ξ sin 2 k + 1 θ
π 2 π 2 e j n y e ± j ξ cos y d y = π cos n π 2 J n ξ ± j 4 k = 1 J 2 k 1 ξ 2 k 1 cos n π 2 2 k 1 2 n 2 ,   n = 2 , 4 , 6 2 n J 0 ξ sin n π 2 + 4 k = 1 J 2 k ξ 2 k sin n π 2 2 k 2 n 2 ± j π sin n π 2 J n ξ ,   n = 1 , 3 , 5

Appendix B

Derivation process of the output voltage deviation caused by dead-time
As shown in Figure 12, in the x < 0 regions, the dotted line represents the switching curve without dead-time, while the solid line represents the switching curve with dead-time, and the shaded area enclosed by two curves denotes the deviation caused by dead-time when io > 0. By changing the limits of (2) according to the equation of the curves shown in Figure 12, the calculation expression of the voltage deviation caused by dead-time when io > 0 can be obtained as follows:
1 2 π 2 - π - π 2 dy - π M cos y - π - π M cos y - π + ω s t d - U dc 2 e j m x + n y d x + 1 2 π 2 π 2 π dy - π M cos y - π - π M cos y - π + ω s t d - U dc 2 e j m x + n y d x + 1 2 π 2 - π 2 π 2 dy - π M cos y - π M cos y + ω s t d - U dc 2 e j m x + n y d x
When io < 0, the shaded area shown in Figure 14 denotes the deviation caused by dead-time. By changing the limits of (2) according to the equation of the curves shown in Figure 14, the calculation expression of the deviation caused by dead-time when io < 0 can be obtained as follows:
1 2 π 2 - π - π 2 dy π M cos y + π π M cos y + π + ω s t d U dc 2 e j m x + n y d x + 1 2 π 2 π 2 π dy π M cos y + π π M cos y + π + ω s t d U dc 2 e j m x + n y d x + 1 2 π 2 - π 2 π 2 dy π M cos y π M cos y + ω s t d U dc 2 e j m x + n y d x
By solving (A7) and (A8) the harmonic coefficients of Δua, Amn, and Bmn can be obtained. Substituting each harmonic coefficient into (1), the analytical expression of the output voltage deviation caused by dead-time of a single leg can be obtained.

References

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Figure 1. The main circuit of the 15-phase propulsion inverter.
Figure 1. The main circuit of the 15-phase propulsion inverter.
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Figure 2. Schematic diagram of the winding layout of the 15-phase propulsion motor.
Figure 2. Schematic diagram of the winding layout of the 15-phase propulsion motor.
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Figure 3. The block diagram of PD-PWM for the single-phase three-level H-bridge topology.
Figure 3. The block diagram of PD-PWM for the single-phase three-level H-bridge topology.
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Figure 4. Control structure of the 15-phase high-capacity propulsion inverter.
Figure 4. Control structure of the 15-phase high-capacity propulsion inverter.
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Figure 5. Single-channel topology of the 15-phase propulsion inverter.
Figure 5. Single-channel topology of the 15-phase propulsion inverter.
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Figure 6. Single-channel 5-phase H-bridge topology of the NPC three-level inverter.
Figure 6. Single-channel 5-phase H-bridge topology of the NPC three-level inverter.
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Figure 7. Single-phase H-bridge topology of the NPC three-level inverter.
Figure 7. Single-phase H-bridge topology of the NPC three-level inverter.
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Figure 8. Schematic diagram of PD-PWM of single leg of the NPC three-level topology without dead-time.
Figure 8. Schematic diagram of PD-PWM of single leg of the NPC three-level topology without dead-time.
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Figure 9. Unit cell of single leg of the NPC three-level topology without dead-time.
Figure 9. Unit cell of single leg of the NPC three-level topology without dead-time.
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Figure 10. Schematic diagram of PD-PWM of single leg of the NPC three-level topology with dead-time.
Figure 10. Schematic diagram of PD-PWM of single leg of the NPC three-level topology with dead-time.
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Figure 11. Current pathways of single leg during dead-time when io > 0. (a) Switch mode is switched from S3 to S2; (b) switch mode is switched from S2 to S1.
Figure 11. Current pathways of single leg during dead-time when io > 0. (a) Switch mode is switched from S3 to S2; (b) switch mode is switched from S2 to S1.
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Figure 12. Unit cell of single leg of the NPC three-level topology with dead-time when io > 0.
Figure 12. Unit cell of single leg of the NPC three-level topology with dead-time when io > 0.
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Figure 13. Current pathways of single leg during dead-time when io < 0. (a) Switch mode is switched from S1 to S2; (b) switch mode is switched from S2 to S3.
Figure 13. Current pathways of single leg during dead-time when io < 0. (a) Switch mode is switched from S1 to S2; (b) switch mode is switched from S2 to S3.
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Figure 14. Unit cell of single leg of the NPC three-level topology with dead-time when io < 0.
Figure 14. Unit cell of single leg of the NPC three-level topology with dead-time when io < 0.
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Figure 15. Voltage and current vector diagram.
Figure 15. Voltage and current vector diagram.
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Figure 16. Variation of the ratio of Uf to Ufmax with respect to load power factor angle.
Figure 16. Variation of the ratio of Uf to Ufmax with respect to load power factor angle.
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Figure 17. The ratio of nth harmonics to the fundamental component. (a) n = 3; (b) n = 5; (c) n = 7.
Figure 17. The ratio of nth harmonics to the fundamental component. (a) n = 3; (b) n = 5; (c) n = 7.
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Figure 18. Comparison of the spectrum of output voltage without dead-time when the fundamental frequency is 22 Hz. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of fundamental component; (d) comparison of high frequency harmonics.
Figure 18. Comparison of the spectrum of output voltage without dead-time when the fundamental frequency is 22 Hz. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of fundamental component; (d) comparison of high frequency harmonics.
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Figure 19. Comparison of output voltage waveform without dead-time when the fundamental frequency is 22 Hz. (a) Simulated voltage waveform; (b) calculated voltage waveform.
Figure 19. Comparison of output voltage waveform without dead-time when the fundamental frequency is 22 Hz. (a) Simulated voltage waveform; (b) calculated voltage waveform.
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Figure 20. Comparison of the spectrum of output voltage when the fundamental frequency is 22 Hz and dead-time is 10 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
Figure 20. Comparison of the spectrum of output voltage when the fundamental frequency is 22 Hz and dead-time is 10 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
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Figure 21. Comparison of the output voltage waveform when the fundamental frequency is 22 Hz and dead-time is 10 μs. (a) Simulated voltage waveform; (b) calculated voltage waveform.
Figure 21. Comparison of the output voltage waveform when the fundamental frequency is 22 Hz and dead-time is 10 μs. (a) Simulated voltage waveform; (b) calculated voltage waveform.
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Figure 22. Comparison of the spectrum of output voltage when the fundamental frequency is 22 Hz and dead-time is 15 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
Figure 22. Comparison of the spectrum of output voltage when the fundamental frequency is 22 Hz and dead-time is 15 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
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Figure 23. Comparison of the output voltage waveform when the fundamental frequency is 22 Hz and dead-time is 15 μs. (a) Simulated voltage waveform; (b) calculated voltage waveform.
Figure 23. Comparison of the output voltage waveform when the fundamental frequency is 22 Hz and dead-time is 15 μs. (a) Simulated voltage waveform; (b) calculated voltage waveform.
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Figure 24. Comparison of the spectrum of output voltage when the fundamental frequency is 5 Hz and dead-time is 10 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
Figure 24. Comparison of the spectrum of output voltage when the fundamental frequency is 5 Hz and dead-time is 10 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
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Figure 25. Comparison of the output voltage waveform when the fundamental frequency is 5 Hz and dead-time is 10 μs. (a) Simulated voltage waveform; (b) calculated voltage waveform.
Figure 25. Comparison of the output voltage waveform when the fundamental frequency is 5 Hz and dead-time is 10 μs. (a) Simulated voltage waveform; (b) calculated voltage waveform.
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Figure 26. Comparison of the spectrum of output voltage when the fundamental frequency is 1 Hz and dead-time is 10 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
Figure 26. Comparison of the spectrum of output voltage when the fundamental frequency is 1 Hz and dead-time is 10 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
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Figure 27. Comparison of the output voltage waveform when the fundamental frequency is 1 Hz and dead-time is 10 μs. (a) Simulated voltage waveform; (b) calculated voltage waveform.
Figure 27. Comparison of the output voltage waveform when the fundamental frequency is 1 Hz and dead-time is 10 μs. (a) Simulated voltage waveform; (b) calculated voltage waveform.
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Figure 28. Comparison of the output voltage harmonic when the fundamental frequency is 22 Hz and dead-time is 10 μs. (a) Comparison of low frequency harmonics; (b) comparison of high frequency harmonics; (c) the relative error of low frequency harmonics.
Figure 28. Comparison of the output voltage harmonic when the fundamental frequency is 22 Hz and dead-time is 10 μs. (a) Comparison of low frequency harmonics; (b) comparison of high frequency harmonics; (c) the relative error of low frequency harmonics.
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Figure 29. Comparison of the output voltage harmonic when the fundamental frequency is 5 Hz and dead-time is 10 μs. (a) Comparison of low frequency harmonics; (b) comparison of high frequency harmonics; (c) the relative error of low frequency harmonics.
Figure 29. Comparison of the output voltage harmonic when the fundamental frequency is 5 Hz and dead-time is 10 μs. (a) Comparison of low frequency harmonics; (b) comparison of high frequency harmonics; (c) the relative error of low frequency harmonics.
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Figure 30. Comparison of the output voltage harmonic when the fundamental frequency is 1 Hz and dead-time is 10 μs. (a) Comparison of low frequency harmonics; (b) comparison of high frequency harmonics; (c) the relative error of low frequency harmonics.
Figure 30. Comparison of the output voltage harmonic when the fundamental frequency is 1 Hz and dead-time is 10 μs. (a) Comparison of low frequency harmonics; (b) comparison of high frequency harmonics; (c) the relative error of low frequency harmonics.
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Figure 31. Semi-physical experimental platform based on RT-LAB and OP5600 real-time simulator.
Figure 31. Semi-physical experimental platform based on RT-LAB and OP5600 real-time simulator.
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Figure 32. Experimental waveform of the output voltage when the fundamental frequency is 22 Hz and dead-time is 10 μs.
Figure 32. Experimental waveform of the output voltage when the fundamental frequency is 22 Hz and dead-time is 10 μs.
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Figure 33. Comparison of the spectrum of experimental output voltage when the fundamental frequency is 22 Hz and dead-time is 10 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
Figure 33. Comparison of the spectrum of experimental output voltage when the fundamental frequency is 22 Hz and dead-time is 10 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
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Figure 34. Experimental waveform of the output voltage when the fundamental frequency is 5 Hz and dead-time is 10 μs.
Figure 34. Experimental waveform of the output voltage when the fundamental frequency is 5 Hz and dead-time is 10 μs.
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Figure 35. Comparison of the spectrum of experimental output voltage when the fundamental frequency is 5 Hz and dead-time is 10 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
Figure 35. Comparison of the spectrum of experimental output voltage when the fundamental frequency is 5 Hz and dead-time is 10 μs. (a) Simulation spectrum; (b) calculated spectrum; (c) comparison of low frequency harmonics; (d) comparison of high frequency harmonics.
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Table 1. Switch modes of single leg of the NPC three-level topology.
Table 1. Switch modes of single leg of the NPC three-level topology.
Switch TubeOutput VoltageSwitch Mode
T1T2T3T4
1100+Udc/2S1
01100S2
0011Udc/2S3
Table 2. Switching function of single leg of NPC three-level topology.
Table 2. Switching function of single leg of NPC three-level topology.
Output VoltageRange of x
−π ≤ x < 00 ≤ x < π
+Udc/2x/π < Mcosyx/π < Mcosy
0x/π − 1 ≤ Mcosy <xx/π − 1 ≤ Mcosy < x
Udc/2Mcosy <x/π − 1Mcosy < x/π − 1
Table 3. Simulation parameters.
Table 3. Simulation parameters.
DescriptionValue
DC bus voltage4 kV
Carrier frequency1000 Hz
Load resistance0.78 Ω
Load inductance4.77 mH
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Wu, W.-J.; Hu, L.-D.; Xin, Z.-Y.; Guo, C. Modeling and Analysis of Voltage Harmonic for Three-Level Neutral-Point-Clamped H-Bridge Inverter Considering Dead-Time. Energies 2022, 15, 5937. https://doi.org/10.3390/en15165937

AMA Style

Wu W-J, Hu L-D, Xin Z-Y, Guo C. Modeling and Analysis of Voltage Harmonic for Three-Level Neutral-Point-Clamped H-Bridge Inverter Considering Dead-Time. Energies. 2022; 15(16):5937. https://doi.org/10.3390/en15165937

Chicago/Turabian Style

Wu, Wen-Jie, Liang-Deng Hu, Zi-Yue Xin, and Cheng Guo. 2022. "Modeling and Analysis of Voltage Harmonic for Three-Level Neutral-Point-Clamped H-Bridge Inverter Considering Dead-Time" Energies 15, no. 16: 5937. https://doi.org/10.3390/en15165937

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