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Article

Efficiency Performance of 7-Level Multiplexed and 3-Level Neutral Point Clamped (NPC) Converters

Department of Electrical, Electronics and Telecommunication Engineering and Naval Architecture (DITEN), University of Genova, 16145 Genova, Italy
*
Author to whom correspondence should be addressed.
Energies 2025, 18(9), 2161; https://doi.org/10.3390/en18092161
Submission received: 6 March 2025 / Revised: 7 April 2025 / Accepted: 21 April 2025 / Published: 23 April 2025

Abstract

:
In medium-voltage AC applications, multilevel converters are essential due to their ability to achieve high efficiency and significantly reduce total harmonic distortion (THD), ensuring improved performance and power quality. This paper presents a detailed analysis of the efficiency, power loss, and THD characteristics of multiplexed multilevel converters and neutral point clamped converters. Using MATLAB®Simulink 2024b, the switching and conduction losses of both multiplexed multilevel converters and NPC converters are calculated. The three-level NPC converter offers advantages of a simpler design, reduced component count, and cost effectiveness with the drawback of low voltage quality. Simulation results validate the THD, power losses, and efficiency for the conventional three-phase three-level NPC converter and the three-phase multiplexed multilevel converter, and a detailed comparison is performed.

1. Introduction

Three-phase multilevel converters have found extensive applications in motor drives, uninterruptible power supplies (UPSs) and renewable energy systems (REs). The growing adoption of these converters is driving advancements in their design, particularly with regard to efficiency improvements and reductions in total harmonic distortion (THD) [1].
In medium- and high-power applications, traditional two-level converters are often limited by the voltage ratings of commercially available power switches. When these devices cannot meet the voltage requirements, series-connected switches are employed. However, this approach introduces challenges related to dynamic voltage sharing between switches [2]. To overcome this limitation, multilevel converters (MLCs) were developed [3,4], offering several advantages over conventional two-level converters, including the followings:
(1)
The characteristic waveforms of MLCs have lower harmonic contents at lower switching frequencies, which minimizes the need for expensive filters [5].
(2)
They can handle medium and high voltage applications using ordinary commercial power devices, and eliminate the need for series-connected switches and the associated dynamic voltage sharing problem [6].
(3)
MLCs operate at lower switching frequencies, minimizing power losses and maintaining higher efficiency [7]. MLCs are the preferred choice for medium- and high-voltage/power applications due to their numerous advantages [8,9]. Recently, the most widely used multilevel converter structures and their advantages have been reviewed in [10,11,12,13,14], with a focus on evaluating their efficiency and THD.
It is essential to choose the appropriate conversion topology and technology to improve the THD of output currents, output voltages, efficiency, losses, and other attributes of multilevel converters [15,16]. The fundamental properties of multilevel converters that influence their performance, such as DC bus neutral point voltage balancing and flying capacitor voltage balancing techniques, are discussed by the authors in [17,18]. Recent developments have introduced new converter topologies [19], specifically designed for medium voltage applications. Modular multilevel converters (MMCs) have been extensively reviewed in [20], highlighting their unique capabilities, operational principles, and advantages in high power and high voltage applications. These converters are widely recognized for their scalability, modularity, and ability to deliver superior power quality with reduced harmonic distortion. The practical application of MMCs in medium voltage electric drives has been demonstrated in [21], showing their effectiveness in industrial and commercial settings. A comprehensive analysis of the flying capacitor architecture, specifically tailored for MMCs, is provided in [22]. This study delves into the operational nuances of flying capacitors, emphasizing their role in ensuring proper voltage balance.
One of the significant challenges associated with MMCs is the charge of floating capacitors, a critical issue that can impact both the performance and stability of the system. This challenge has been effectively addressed through innovative and cost-effective methods, as outlined in [23]. These methods not only simplify the capacitor charging process but also integrate seamlessly with various converter topologies. Furthermore, the exploration of multilevel converter topologies has expanded beyond AC applications to include DC-DC applications, as detailed in [24,25]. The three-phase three-level neutral point clamped ( 3 Φ 3 L NPC) converter, which consists of two conventional two-level inverters [26], is configured with the first inverter positioned above the second. Two diodes are connected in series between the upper and lower inverters at the neutral point (N). Over the past thirty years, these inverters have been widely used in industrial applications requiring approximately 6 kV. The flying capacitor converter (FCC) represents another type of multilevel converter [27,28]. The flying capacitor converter (FCC) is implemented by connecting a series of capacitors to a clamped switching cell, allowing these capacitors to facilitate voltage division. This division enables the delivery of smaller, discrete voltage levels to IGBTs, ensuring smoother operation and improved performance. Unlike other multilevel converter topologies such as neutral point clamped (NPC) converters, the FCC does not require clamping diodes. This omission simplifies the circuit design, reduces the overall component count, and minimizes power losses associated with diode switching. The capacitors play a dual role in the FCC topology: they balance the voltage across the switching cells and improve harmonic performance by ensuring better waveform quality. This design inherently reduces total harmonic distortion (THD), making the FCC suitable for high-performance applications where power quality is critical. Additionally, the modular nature of the FCC makes it adaptable for systems requiring scalability in voltage and power levels. The three-phase seven-level multiplexed converter ( 3 Φ 7 L M L M X C ), presented in [29], incorporates two FCCs and one NPC converter to achieve seven voltage levels. In this topology, the FCCs generate the positive and negative half cycles of the waveform, while the NPC converter combines these half cycles to produce a continuous sinusoidal output. Regarding the control of MLCs, the FCS-MPC controller has been developed since few decades for MLCs because of its performance and easy implementation. In [30,31] MPC and some modified MPC controllers are developed for MLCs. To further improve the performance of FCS-MPC reinforcement learning based predictive control is proposed in [32,33] to cope with computational performance and model dependencies of the FCS-MPC on the model. The aim of this study is to conduct a comparative analysis of the 3 Φ 3 L NPC converter and the 3 Φ 7 L M L M X C for medium-voltage applications. A comparison will be carried out between, in particular, the efficiency of the two converters and the THD.
It is interesting to note that the NPC stage of the 3 Φ 7 L M L M X C has the same structure as the 3 Φ 3 L NPC converter. Moreover, also the voltage stress on the switches is the same. As a matter of fact, even if the 3 Φ 7 L M L M X C is a seven-level converter, the voltage stress on the switches of the NPC stage is Vdc/2. From this point of view, it seems that the 3 Φ 7 L M L M X C is a worse converter compared to the standard NPC since it has additional switches (the ones of the FCC stages) without reducing the voltage stress on the NPC stage. The comparison of 3 Φ M L C converters is shown in Table 1.
However, the introduction of the FCC stages can lead to advantages in terms of THD and converter efficiency. The aim of this paper is to deeply compare the 3 Φ 7 L M L M X C and the 3 Φ 3 L NPC from an efficiency and THD point of view in order to evaluate and quantify the benefits of the 3 Φ 7 L M L M X C . Even if the the 3 Φ 7 L M L M X C is a seven-level converter, whereas the NPC is a three-level converter, the highest voltage stress on 3 Φ 7 L M L M X C (i.e., the voltage stress on the switches of NPC stage) is the same as the voltage stress of the switches in NPC. Therefore, the NPC is most suitable converter to compare the 3 Φ 7 L M L M X C .
This paper is organized into five sections. Section 2 describes the main principle of a 3 Φ 3 L NPC converter. In Section 3, the 3 Φ 7 L M L M X C converter topology is explained. In the first part of Section 3, the flying capacitor (FC) balancing technique used in this study is presented. After that, the modulation strategy of a 3 Φ 7 L M L M X C converter is shown in the second part of Section 3. The comparative results of both multilevel converters are explained in the Section 4. At last, the conclusion of the paper is added in Section 5.

2. Three-Phase Three-Level Neutral Point Clamped Converter

The 3 Φ 3 L NPC converter is one of the most used topologies in medium-voltage conversion systems (UPS, motor drives, etc.). Compared to a traditional two-level converter, in an NPC converter, the voltage stress on the switches is half of the DC-link voltage. Moreover, an additional voltage level can be exploited since the converter output can be linked to the neutral point of the DC-link. The circuit diagram of a conventional 3 Φ 3 L NPC converter is shown in Figure 1.
Each phase of the 3 Φ 3 L NPC converter comprises four switches and two diodes.

3. Three-Phase Seven-Level Multiplexed Converter

The 3 Φ 7 L M L M X C has 24 switches, which are the combination of a 3 Φ 3 L NPC and two four-level (FCC) topologies. The first FCC on top manages the V u p on the top side of the power converter, while the second FCC on the bottom manages the V d o w n on the lower side of the converter as shown in Figure 2.
Consequently, the top and bottom side FCCs generate positive and negative half-cycles, respectively. The NPC stage functions as a multiplexer to generate the complete sine wave by combining positive and negative half cycles, giving rise to the term multilevel multiplexed converter. Four voltage levels are offered by both top and bottom FCs: 0, 1 / 2 V B U S , 1 / 3 V B U S , and 1 / 6 V B U S . These generate the same levels of voltages at the output of upper FCC and 0, 1 / 2 V B U S , 1 / 3 V B U S , and 1 / 6 V B U S on the bottom side of FCC. As a result, the three-phase NPC stage in each phase may provide seven voltage levels of 0, ± 1 / 2 V B U S , ± 1 / 3 V B U S , and ± 1 / 6 V B U S . This configuration’s primary benefit is the absence of DC-link capacitors between the FCC stages and NPC topology. From the perspective of system complexity, the NPC topology is the preferred choice, whereas the 3 Φ 7 L M L M x C converter demonstrates superiority in terms of THD as detailed in Section 4. The voltage stress on the switches of the FCC stages is Vdc/6; therefore, even if the 3 Φ 7 L M L M X C has additional switches compared to a standard NPC converter, the additional cost and complexity of the FCC are not so significant, and therefore, the 3 Φ 7 L M L M X C could be a promising converter.

3.1. Balancing of Flying Capacitors for 3 Φ 7 L M L M X C Converter

The voltage balancing of the individual capacitors poses a significant challenge for multilevel flying capacitor (FCC) converters, especially as the number of levels increases. In the case of a three-level FCC converter, voltage regulation of the flying capacitors is relatively straightforward and manageable. This is because the two available redundant switching states can be alternated effectively to maintain the voltage levels of the capacitors separately. However, as the topology scales up to FCC converters with more levels (n > 3), the complexity of voltage balancing increases significantly. In these cases, a similar approach to voltage balancing can be applied, but it becomes much more intricate due to the need to regulate additional capacitor voltage levels. Furthermore, the increased number of available switching states introduces more variables and scenarios that must be carefully managed to ensure proper operation and stability. The higher number of levels necessitates advanced control strategies to handle the additional degrees of freedom and maintain consistent voltage levels across all capacitors, which is crucial for reliable converter performance.
Each redundant condition in the charging and discharging of capacitor voltages produces varying impacts, which is the primary cause of voltage imbalance across FCs. This imbalance can adversely affect the overall performance, stability, and efficiency of the multilevel converter, making it a critical issue to address in the design and operation of such systems. For the effective balancing of the FCs, the redundant switching states are carefully selected to ensure proper voltage regulation. This selection process often involves the implementation of advanced control algorithms that leverage a cost function to prioritize capacitor voltage balancing. The cost function evaluates the impact of each possible switching state and determines the optimal sequence to maintain consistent voltage levels across the FCs. By minimizing the deviation from the desired voltage levels, the control strategy ensures that the converter operates reliably and efficiently. Moreover, the use of such optimization techniques can help mitigate the impact of external disturbances, load variations, and other dynamic factors that could otherwise exacerbate the voltage imbalance. This approach is especially vital in multilevel converters with a high number of levels, where the complexity of managing redundant switching states increases significantly [34]. An equation for the minimization of the cost function to balance the FCs is
J x z = 1 2 j = 1 n 2 C x j V C x j V C x j * 2
where x identifies the FCC (i.e., x = u for upper FCC and x = l for lower FCC) and z represents the switching state, with z = 1, ..., 8. The index (j) is used to identify each FC. In this paper j = 1, 2. The V C x j * is the reference voltage, and C x j is a specific FC of the FCC stage of 3 Φ 7 L M L M X converter. When the voltages of all the FCs are equal to their reference values, the cost function shown in Equation (1) will be equal to zero. To achieve voltage balance, it must be reduced during each switching time. The differential Equations (2) and (3) show the minimized differential equations:
d d t J x z = d d t 1 2 j = 1 n 2 C x j V C x j V C x j * 2
d d t J x z = j = 1 n 2 Δ v C x j i C x j 0
where Δ v C x j is the deviation of voltage from the referenced value of any FC. Since Δ v C x j = V C x j V C x j * , the current in each FC can be represented as i C x j , which depends on the selected redundant switching states and the output current flowing through the upper FCC and lower FCC as shown in Table 2.
Table 2 illustrates the redundant switching states for voltage levels ± 1 / 2 V d c , ± 1 / 3 V d c , and ± 1 / 6 V d c that produce distinct current routes across any FCs of upper and lower FCC stages and, therefore, have a unique impact of charging and discharging on the FCs of upper and lower FCCs. A phase leg of four-level upper and lower FCC converters that incorporate FCs are schematically shown in Figure 2. The mean voltage values of FCs C x 1 and C x 2 for upper FCC should be kept at V d c /6 and V d c /3, respectively, during regular operation. The upper FCC converter has four output voltage levels, but the zero voltage level will be omitted by always closing the switch S 3 , and the output voltage will be produced: V d c /6, V d c /3, and V d c /2. The same is true for the lower FCC at voltage levels of − V d c /6, − V d c /3, and − V d c /2. Once the desired voltage level is determined, the redundant switching state that minimizes the cost function is chosen [30]; this procedure is carried out for each voltage level of a specific switching period. For example, J u 6 is the estimated cost function of the 6th switching state for upper FCC, i.e., S 1 = 1, S 2 = 0, and S 3 = 1 (or 1 0 1). The overall structure of the flying capacitor balancing using the cost function minimization technique is shown in Figure 3. For a specific reference voltage level, more redundant states may be possible. For each redundant state, the cost function is calculated. Then, the redundant state corresponding to the minimum cost function is applied.
Figure 4 shows three-level reference voltage levels. A reference sinusoidal signal is compared with the three triangular carriers to generate the reference levels of voltage. Based on these reference voltage levels, particular switching sequences are applied to the FCC stages to perform voltage balancing across the FCs.

3.2. Carrier-Based PWM for 3 Φ 7 L M L M X C Converter

In the case of 3 Φ 7 L M L M X C , when the modulation index ( V r e f ) is greater than 0.5, the top three and bottom three carriers generate PWM for upper FCC and lower FCC, respectively. Three carrier signals, Carr 1, Carr 2, and Carr 3, and the upper part of the modulating signal are compared to generate the control signals for the switches in the top FCC. In the same way, the modulating signal’s lower portion and the three carrier signals, Carr 6, Carr 7, and Carr 8, are compared to provide the control signals for the power semiconductors positioned on the bottom FCC stage of the 3 Φ 7 L M L M X C .
When the modulation signal is lower than 0.5, in the upper FCC stage, the switches S 3 , S 5 , and S 6 are turned on. In the lower FCC stage, S 7 , S 8 , and S 10 are closed. In the NPC stage of the 3 Φ 7 L M L M X C , the modulating signal ( V r e f ) and two carrier signals (Carr 4 and Carr 5) between −0.5 and +0.5 are compared to produce the PWM signals for the power semiconductors as shown in Figure 5.

4. Simulation Results

The balanced voltages across the flying capacitors, characteristic waveforms, and voltage stress across IGBTs, losses, and efficiency of the 3 Φ 7 L M L M X C converter and 3 Φ 3 L NPC converters are analyzed under higher, medium, and lower modulation indexes. The tests were conducted in open-loop with a fixed modulation index; as a matter of fact, the aim of this paper is not to test the control but to compare the efficiency and THD of the two converters in steady-state operation. The IGBTs from Hitachi, 5SNG0900R120590 and 5SNA1000G650300 with a voltage rating of 1200 V and 6500 V are chosen for the FCC stage and NPC stage, respectively, for the 3 Φ 7 L M L M X C and simulated in the Simscape library of MATLAB®. The latest version of MATLAB®provides thermal modeling of the semiconductors and efficiency calculations.
The parameters for 3 Φ 3 L NPC converter and 3 Φ 7 L M L M X C converter are shown in Table 3, while dead time is ignored in this work because it does not significantly affect the efficiency of the 3 Φ 3 L NPC and 3 Φ 7 L M L M X C converters. The switching losses, conduction losses, efficiency, and THD are evaluated according to the parameters shown in Table 3 for 3 Φ 3 L NPC and 3 Φ 7 L M L M X C converters.
Figure 6 shows the calculated THD in the load current against the load current for 3 Φ 7 L M L M X C and 3 Φ 3 L NPC converter. The 3 Φ 7 L M L M X C converter has lower THD at lower, medium, and higher load currents. These values cover a wide range of operating conditions and well represent all the possible working points. Moreover, this wide range of possible operating conditions simulates real-word applications with variable loads For the 3 Φ 7 L M L M X C converter, the THD values are calculated as 0.6% at a higher load current of 173A, 0.6% at 145A, 0.7% at 112A, 0.8% at 73A, 0.7% at a load current of 58A and 1.7% at a lower load current of 29A. In contrast, for the 3 Φ 3 L NPC converter, the THD values are 1.4% at 173A, 1.8% at 145A, 2.3% at 112A, 2.8% at 73A, 3% at 58A, and 3.5% at a lower load current of 29A.
The voltage stress across the IGBTs and voltage during switching in the FCC stage of the multiplexed converter is just V d c / 6 . The voltage stress across each IGBT in the NPC stage and FCC stage of the 3 Φ 7 L M L M X C converter is V d c / 2 . The voltage during switching in the FCC stage is V d c / 6 , while in the NPC stage, it varies depending on the switches ( S 1 a = V d c / 3 , S 1 b = V d c / 6 ) and similarly for their complementary switches in each phase as detailed in Table 4.
The voltage stress across the IGBTs and voltage during switching for each IGBT of the conventional 3 Φ 3 L NPC converter are shown in Table 5. Both voltages are the same, and there is higher voltage during switching and voltage stress of V d c / 2 compared with the 3 Φ 7 L M L M X C , which causes more switching losses in 3 Φ 3 L NPC converter then the 3 Φ 7 L M L M X C .
Figure 7 and Figure 8 represent the waveform of the voltage across the IGBTs for the NPC stage and FCC stage of 3 Φ 7 L M L M X C respectively, where voltage during switching and voltage stress can be seen from the waveforms for switches.
The four-level upper and lower FCC converters of 3 Φ 7 L M L M X C will act like three-level converters by always closing the switch S 3 from the upper FCC and S 10 from the lower FCC. This is because the zero voltage level will be generated by the NPC stage of 3 Φ 7 L M L M X C . The output voltage from the upper FCC stage and lower FCC stage are shown in Figure 9.
During medium load current of 145A, the voltage across the upper and lower FCC stages of 3 Φ 7 L M L M X C are shown in Figure 10. The switch S 1 is always opened because voltage V d c 2 is clipped out and voltage V d c 2 is the peak voltage. The switch S 2 will perform switching as the output voltage, while the switch S 3 will always remain closed. For lower FCC, switch S 7 will always remain open, and switch S 8 will perform the switch as the output voltage of the lower FCC, while S 9 will always remain closed.
During the lower load current of 58A or 28A in 3 Φ 7 L M L M X C so, as explained earlier, it is verified from Figure 11 that switches S 3 , S 5 , and S 6 , will remain closed, while in the lower FCC part, S 7 , S 8 , and S 10 , will be closed, which will allow only V d c / 6 voltage from the FCC stage to the NPC stage of the 3 Φ 7 L M L M X C .
The losses of the 3 Φ 7 L M L M X C and 3 Φ 3 L NPC converter are evaluated based on the converter’s parameters shown in Table 3, and the results are reported in Figure 12, Figure 13 and Figure 14. The voltages during switching in the FCC and NPC stages of the 3 Φ 7 L M L M X C are lower than the conventional 3 Φ 3 L NPC converter. So, the switching losses are much lower in 3 Φ 7 L M L M X C . The switching, conduction, and total losses of the 3 Φ 7 L M L M X C converter and 3 Φ 3 L NPC converter at higher, medium, and lower modulation indexes are shown in Figure 12, Figure 13 and Figure 14.
In Figure 13, the 3 Φ 7 L M L M X C and 3 Φ 3 L NPC converters operate at the same load current and load parameters. Compared with the 3 Φ 3 L NPC converter, the 3 Φ 7 L M L M X C exhibits more conduction losses because of the large number of switches, while it has lower switching losses. But the total losses of the 3 Φ 7 L M L M X C are lower comparatively.
The same case applies for medium and smaller load currents. The total losses of the 3 Φ 7 L M L M X C are less than the 3 Φ 3 L NPC converter under similar load conditions and switching frequency.
Table 4 and Table 5 present the voltage across the switches and the voltage during switching for the 3 Φ 3 L NPC converter and the 3 Φ 7 L M M x L C . While the voltage stress across the switches is identical in both converters, the voltage during switching is higher in the conventional 3 Φ 3 L NPC converter. It is evident from Figure 12, Figure 13 and Figure 14 that the switching losses are higher in the 3 Φ 3 L NPC converter. However, its conduction losses are lower due to the reduced number of switches compared to the 3 Φ 7 L M M x L C . As a result, 3 Φ 7 L M M x L C has slightly higher efficiency.
The 3 Φ 7 L M M x L C converter incorporates a total of 30 semiconductor devices. In the FCC stage, the maximum voltage stress and switching voltage across the semiconductors are V d c / 6 . In the NPC stage, the maximum voltage stress is V d c / 2 , while the switching voltage varies depending on the type of semiconductor as illustrated in Table 6. By contrast, a conventional NPC converter utilizes 18 semiconductors but has both maximum voltage stress and voltage during switching of V d c / 2 . The 3 Φ 7 L M M x L C converter produces seven levels of output voltage, whereas the 3 Φ 3 L NPC converter generates three levels of output voltage. Additionally, the total harmonic distortion (THD) of the 3 Φ 7 L M M x L C converter remains almost constant regardless of load variations. In contrast, the THD of the conventional NPC converter increases as the load decreases.

5. Conclusions

In this paper, a 3 Φ 3 L NPC converter and a 3 Φ 7 L M M x L C converter have been compared. The comparison is based on the THD value, conduction losses, switching losses, voltage stress across and during IGBT switching, and efficiency of converters. The simulation results verified that the voltage during the switching of each IGBT in 3 Φ 7 L M L M X C is much lower than that of the IGBT of the conventional 3 Φ 3 L NPC converter. The 3 Φ 7 L M L M X C has 30 switches, and the 3 Φ 3 L NPC converter has 18 switches. The THD at the same load current is significantly lower in the 3 Φ 7 L M L M X C converter compared to the 3 Φ 3 L NPC converter. Moreover, in the case of a conventional 3 Φ 3 L NPC converter, the THD increases as the load current decreases. In contrast, for 3 Φ 7 L M L M X C , it is smaller and almost constant under all load conditions. The maximum voltage stress in the 3 Φ 7 L M M x L C converter is V d c / 2 , while in the FCC stage, it is V d c / 6 , and in the NPC stage, it is V d c / 2 . In addition, the efficiency of the 3 Φ 7 L M M x L C converter is slightly higher than that of the 3 Φ 3 L NPC converter. Moreover, the 3 Φ 7 L M M x L C provides significantly better THD values and enhanced waveform control while maintaining high efficiency. In conclusion, 3 Φ 7 L M M x L C converter is a promising solution when a low THD is required and, considering the voltage stress on the NPC stage, this converter is particularly suitable for renewable energy systems and motor drives with a voltage rate of about 3 kV on the AC side.

Author Contributions

Conceptualization, M.M. and M.P.; methodology, M.M.; software, S.H.; validation, L.R.V., M.P. and S.H.; formal analysis, S.H.; investigation, A.F.; resources, S.H.; data curation, M.M.; writing—original draft preparation, S.H.; writing—review and editing, M.P. and S.C.; visualization, L.R.V.; supervision, M.P. and L.R.V.; project administration, L.R.V. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

The original contributions presented in this study are included in the article.

Conflicts of Interest

The authors declare no conflicts of interest.

Abbreviations

The following abbreviations are used in this manuscript:
MLCMultilevel Converters
M L M X C Multilevel Multiplexed Converter
NPCNeutral Point Clamped Converter
FCCFlying Capacitor Converter
THDTotal Harmonic Distortion
MMC     Modular Multilevel Converter

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Figure 1. Three-phase three-level NPC converter.
Figure 1. Three-phase three-level NPC converter.
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Figure 2. Three-phase, seven-level multiplexed converter.
Figure 2. Three-phase, seven-level multiplexed converter.
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Figure 3. Balancing of FCs for four-level FCC converter.
Figure 3. Balancing of FCs for four-level FCC converter.
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Figure 4. Reference voltage levels for upper and lower FCC stage of 3 Φ 7 L M L M X C .
Figure 4. Reference voltage levels for upper and lower FCC stage of 3 Φ 7 L M L M X C .
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Figure 5. Carrier-based modulation scheme for 3 Φ 7 L M L M X C converter.
Figure 5. Carrier-based modulation scheme for 3 Φ 7 L M L M X C converter.
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Figure 6. THD in the load current of 3 Φ 3 L NPC converter and 3 Φ 7 L M M x L C converter.
Figure 6. THD in the load current of 3 Φ 3 L NPC converter and 3 Φ 7 L M M x L C converter.
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Figure 7. Voltage stress across IGBTs of S 1 a , S 2 a , and D 1 a of the NPC stage in the 3 Φ 7 L M L M X C converter.
Figure 7. Voltage stress across IGBTs of S 1 a , S 2 a , and D 1 a of the NPC stage in the 3 Φ 7 L M L M X C converter.
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Figure 8. Voltage stress across IGBTs of S 1 , S 2 , and S 3 of the FCC stage in the 3 Φ 7 L M L M X C converter.
Figure 8. Voltage stress across IGBTs of S 1 , S 2 , and S 3 of the FCC stage in the 3 Φ 7 L M L M X C converter.
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Figure 9. Output voltage across the FCC stage of 3 Φ 7 L M L M X C converter during a high load current of 173A.
Figure 9. Output voltage across the FCC stage of 3 Φ 7 L M L M X C converter during a high load current of 173A.
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Figure 10. Output voltage across the FCC stage of 3 Φ 7 L M L M X C converter during a medium load current of 145A.
Figure 10. Output voltage across the FCC stage of 3 Φ 7 L M L M X C converter during a medium load current of 145A.
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Figure 11. Output voltage across the FCC stage of 3 Φ 7 L M L M X C converter during a low load current of 58A.
Figure 11. Output voltage across the FCC stage of 3 Φ 7 L M L M X C converter during a low load current of 58A.
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Figure 12. Losses of IGBTs in 3 Φ 7 L M L M X C and 3 Φ 3 L NPC converters during a load current of 173A.
Figure 12. Losses of IGBTs in 3 Φ 7 L M L M X C and 3 Φ 3 L NPC converters during a load current of 173A.
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Figure 13. Losses of IGBTs in 3 Φ 7 L M L M X C and 3 Φ 3 L NPC converters during load current of 145A.
Figure 13. Losses of IGBTs in 3 Φ 7 L M L M X C and 3 Φ 3 L NPC converters during load current of 145A.
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Figure 14. Losses of IGBTs in 3 Φ 7 L M L M X C and 3 Φ 3 L NPC converters during load current of 58A.
Figure 14. Losses of IGBTs in 3 Φ 7 L M L M X C and 3 Φ 3 L NPC converters during load current of 58A.
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Table 1. Comparison table of multilevel converters.
Table 1. Comparison table of multilevel converters.
ConverterNumber of SemiconductorsNumber of Power Semiconductors with 1/6 V BUS Number of Power Semiconductors with 1/2 V BUS
3 Φ 3 L  NPC12 + 6 clamping diodes-12 + 6 clamping diodes
3 Φ 7 L  FCC3636-
3 Φ 7 L M L M X C 24 + 6 clamping diodes1212 + 6 clamping diodes
Table 2. Four-level upper and lower FCC: voltage levels, switching states, FC currents, and effects on FC voltages.
Table 2. Four-level upper and lower FCC: voltage levels, switching states, FC currents, and effects on FC voltages.
Voltage LevelSwitch StatesFC CurrentFC Voltage
z S 1 S 2 S 3 I CF 1 I CF 2 V CF 1 V CF 2
+ V dc 2 811100XX
71100 i x X
+ V dc 3 6101 i x i x
5011 i x 0X
4100 i x 0X
+ V dc 6 3010 i x i x
20010 i x X
0 100000XX
Voltage Levelz S 7 S 8 S 9 I CF 3 I CF 4 V CF 3 V CF 4
V dc 2 811100XX
71100 i x X
V dc 3 6101 i x i x
5011 i x 0X
4100 i x 0X
V dc 6 3010 i x i x
20010 i x X
0 100000XX
Note: The charging and discharging effects in FC are given assuming that i x is positive with the following notations: ↑ Increasing capacitor voltage. ↓ Decreasing capacitor voltage. X No change in capacitor voltage.
Table 3. Parameters for a 3-phase 7-level multiplexed converter.
Table 3. Parameters for a 3-phase 7-level multiplexed converter.
ParameterValue
DC-Bus voltage ( V b u s )5000 V
Switching frequency ( F s w )3000 Hz
Fundamental frequency ( F m )50 Hz
Output filter inductor (L)20 mH
Resistive load (R) 5 Ω
Table 4. Voltage stress across the switches of 3 Φ 7 L M L M X C .
Table 4. Voltage stress across the switches of 3 Φ 7 L M L M X C .
FCC Stage of 3 Φ 7 LM L M X C
Switch NumberVoltage StressVoltage During Switching
S 1 S 12 V d c 6 V d c 6
NPC Stage of 3 Φ 7 LM L M X C
S 1 a , S 4 a V d c 2 V d c 3
S 2 a , S 3 a V d c 2 V d c 6
S 1 b , S 4 b V d c 2 V d c 3
S 2 b , S 3 b V d c 2 V d c 6
S 1 c , S 4 c V d c 2 V d c 3
S 2 c , S 3 c V d c 2 V d c 6
Table 5. Voltage stress across the switches of the 3 Φ 3 L NPC converter.
Table 5. Voltage stress across the switches of the 3 Φ 3 L NPC converter.
3 Φ 3 L NPC Converter
Switch NumberVoltage StressVoltage During Switching
S 1 a S 4 a V d c 2 V d c 2
S 1 b S 4 b V d c 2 V d c 2
S 1 c S 4 c V d c 2 V d c 2
Table 6. Comparison of 3 Φ 3 L NPC and 3 Φ 7 L M M x L C .
Table 6. Comparison of 3 Φ 3 L NPC and 3 Φ 7 L M M x L C .
Parameter 3 Φ 3 L NPC 3 Φ 7 LM L M X C
FCC Stage of 3 Φ 7 LM L M X C NPC Stage of 3 Φ 7 LM L M X C
Number of switches12 + 6 clamping diodes1212 + 6 clamping diodes
S 1 = V d c / 6 S 1 = V d c / 3
Voltage during switching S 1 = V d c / 2 S 2 = V d c / 6 S 2 = V d c / 6
S 3 = V d c / 6 D 1 = V d c / 6
Voltage stress V d c / 2 V d c / 6 V d c / 2
Voltage levels37
Efficiency97.9%98.1%
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Hussain, S.; Cosso, S.; Passalacqua, M.; Vaccaro, L.R.; Formentini, A.; Marchesoni, M. Efficiency Performance of 7-Level Multiplexed and 3-Level Neutral Point Clamped (NPC) Converters. Energies 2025, 18, 2161. https://doi.org/10.3390/en18092161

AMA Style

Hussain S, Cosso S, Passalacqua M, Vaccaro LR, Formentini A, Marchesoni M. Efficiency Performance of 7-Level Multiplexed and 3-Level Neutral Point Clamped (NPC) Converters. Energies. 2025; 18(9):2161. https://doi.org/10.3390/en18092161

Chicago/Turabian Style

Hussain, Shafquat, Simone Cosso, Massimiliano Passalacqua, Luis Ramon Vaccaro, Andrea Formentini, and Mario Marchesoni. 2025. "Efficiency Performance of 7-Level Multiplexed and 3-Level Neutral Point Clamped (NPC) Converters" Energies 18, no. 9: 2161. https://doi.org/10.3390/en18092161

APA Style

Hussain, S., Cosso, S., Passalacqua, M., Vaccaro, L. R., Formentini, A., & Marchesoni, M. (2025). Efficiency Performance of 7-Level Multiplexed and 3-Level Neutral Point Clamped (NPC) Converters. Energies, 18(9), 2161. https://doi.org/10.3390/en18092161

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