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Article

Interleaved Boost Converter with ZVT-ZCT for the Main Switches and ZCS for the Auxiliary Switch

1
Department of Electrical Engineering, National Taipei University of Technology, 1, Sec. 3, Zhongxiao E. Rd., Taipei 10608, Taiwan
2
Department of Electrical Engineering, Feng Chia University, No. 100, Wenhwa Road, Seatwen, Taichung 40724, Taiwan
3
Chicony Power Technology Co., Ltd., Sanchong, New Taipei 24158, Taiwan
*
Authors to whom correspondence should be addressed.
Appl. Sci. 2020, 10(6), 2033; https://doi.org/10.3390/app10062033
Submission received: 17 February 2020 / Revised: 6 March 2020 / Accepted: 10 March 2020 / Published: 17 March 2020
(This article belongs to the Special Issue Resonant Converter in Power Electronics Technology)

Abstract

:
A soft-switching interleaved topology is presented herein and applied to the boost converter. The basic operating principle is that the main power switches are turned on at zero voltage and turned off at zero current via the same auxiliary resonant circuit whose switch is turned on from zero current. Furthermore, as compared to the traditional boost converter, the proposed topology has three additional auxiliary diodes, two additional auxiliary capacitors, one additional auxiliary inductor, and one additional auxiliary switch. On the other hand, since the interleaved control is adopted herein, the difference in current between the two phases exists. Hence, the cascaded control is utilized to regulate the output voltage to the desired voltage via the first phase, whereas the current-sharing control, based on half of the input current as the current reference for the second phase, is employed so as to make the load current extracted from the two phases as evenly as possible. In this paper, the effectiveness of the proposed topology and control strategy is demonstrated by some experimental results.

Graphical Abstract

1. Introduction

Generally, the traditional switching power supply operates under hard switching. However, due to the parasitic components, large electromagnetic interference and high switching loss will happen the instant the switch is turned on/off. Accordingly, the soft switching concept is presented [1,2,3,4,5]. Based on an auxiliary inductor connected in series with the switch, this inductor will oscillate with the parasitic capacitor during the turn-off period, and, as soon as the voltage across the parasitic capacitor resonates to zero, the switch will be turned on. This behavior is called zero-voltage switching (ZVS) at turn-on. Moreover, as soon as the current in the auxiliary inductor resonates to zero, the switch will be turned off. This behavior is called zero-current switching (ZCS) at turn-off. However, although the switching loss is reduced based on ZVS or ZCS or both, high resonant voltage stress or high resonant current stress is generated so as to select proper components, thereby increasing the corresponding circuit cost. In addition, since the turn-on and turn-off intervals are determined by the resonant period, the variable-frequency control is chosen so as to stabilize the output voltage, thereby making the filter design difficult.
As seen in the half-resonant drawbacks, the active clamp [6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30], the zero-voltage transition (ZVT) [21,22,23,24,25,26,27] and the zero-current transition (ZCT) [28,29,30] are presented. As the voltage clamp is applied to the non-isolated power supply, the parasitic inductance of the line and the leakage inductance of the transformer are used as the auxiliary inductance, which will oscillate with the auxiliary capacitance. Via this way, the switch can reach soft switching during the resonant period. As the auxiliary switch is turned off, the current in the auxiliary inductance flows through the input terminals, thereby making the body diode of the main switch turn on, and hence the main switch has soft switching and the energy stored in the auxiliary inductance is transferred to the input terminals. By doing so, the overall efficiency is increased. As the active clamp technique is applied to the non-isolated power converter [31], one auxiliary inductance, one auxiliary capacitance, and one auxiliary switch are used to form a resonant loop, and, during the resonant period, the soft switching of the main switch and auxiliary switch can be achieved. Via this way, the voltage stress on the main switch is reduced in addition to the switching loss. However, the switching frequency is varied according to output load and input voltage, and an auxiliary inductance is inserted in the power path. Consequently, although the soft switching of the main switch can be achieved, the low-pass filter is designed difficultly, and the conduction loss is severe as this converter operates under the half or rated load.
As the ZVT or ZCT technique is applied to the power supply, one auxiliary resonant circuit is connected in parallel with the main switch. Before the main switch is turned on or off, the auxiliary switch is turned on and hence the resonance occurs, forcing the voltage on the main switch or the current in the main switch to be zero. Since the resonance circuit does not locate in the main power path, the conduction loss is reduced and hence the overall efficiency is increased. The literatures [32,33,34] employ ZVT and ZCT simultaneously, so that the switching loss can be reduced and hence the overall efficiency can be enhanced.
On the one hand, in order to upgrade the output current as well as to improve the efficiency, the multiphase converter, along with interleave control, is widely used. The fact that the AC components of the inductor currents for multiple phases are cancelled to some extent makes the output current ripple reduce as well as the frequency of the output current ripple increase. By doing so, the required filter design will be easier and the corresponding size will be smaller. In general, the total loss created from multiple phases will be smaller than that created from a single phase. Accordingly, the multiphase converter with soft switching is presented. The literatures [33,34,35,36] adopt multiple phases with the corresponding number of auxiliary resonance circuits, leading to increasing the number of components to increase conduction loss as well as cost. In the literature [35], the two-phase converter uses the same auxiliary resonant circuit. However, only the ZVS is used, such that the efficiency improvement is limited. In the literature [36], the two-phase converter uses one snubber circuit so as to make the main switches achieve soft switching. However, the resonant inductor locates in the power path, thereby making conduction loss increased.
On the other hand, there are differences in component features and line impedance between the two phases. Consequently, the current-sharing control will be needed. As for current sharing, there are two types of current-sharing control methods. One is passive; the other is active. The former employs capacitors or differential-mode transformers or both to do current sharing [37,38,39,40], whereas the latter contains current regulators and current sensors to balance currents [41,42,43,44,45].
Based on what has been discussed above, a two-phase converter with one resonant inductor, two resonant capacitors, two resonant diodes, one auxiliary diode, one auxiliary switch, and two main switches are proposed. This converter can achieve ZVT and ZCT for the main switches and ZCS for the auxiliary switch, so as to further increase the overall efficiency. In addition, the proposed current-sharing control is adopted herein so that the output voltage is regulated by the first phase and the current sharing between the two phases is controlled by the second phase.

2. Two-Phase Converter with Proposed Soft Switching

In Figure 1, the proposed inductor resonant circuit applied to the two-phase interleaved converter is built up by only one resonant Lr, two resonant capacitors Cr1 and Cr2, two resonant diodes Dr1 and Dr2, one auxiliary switch Sa, and one auxiliary diode Da.

3. Basic Operating Principles

Prior to the circuit analysis, there are some assumptions as below: (i) all the main switches and diodes are viewed as ideal; (ii) no parasitic resistances exist in the inductor and capacitors; (iii) the ideal input inductor can be considered as current source such that L1, L2, and Vin can be removed.; (iv) the ideal output capacitor can be regarded as a voltage source such that Co and Ro can be removed. Based on the above, the circuit in Figure 2 is an equivalent circuit for Figure 1. In Figure 3, there are twenty-two operating states. Since this converter is controlled by interleave, the behavior of the first eleven states is the same as that of the last eleven states. Therefore, only the first eleven states are described.
State 1: [ t 0 t t 1 ] . As shown in Figure 4, the main switches S1 and S2 are turned off but the auxiliary switch Sa is turned on, whereas the freewheeling diodes D1 and D2 as well as the resonant diodes Dr1 and Dr2 are turned on. During this state, the resonant inductor Lr is magnetized, and hence the resonant inductor current iLr is linearly increased. In addition, the energy required by the load is provided by the current IL, which is equal to the current IL1 plus the current IL2. As soon as iLr is equal to IL, D1 and D2 are turned off, and hence this state comes to the end. During this interval, the corresponding state equation can be expressed as follows:
i L r ( t ) = V o L r ( t t 0 ) + i L r ( t 0 )
As t = t1, iLr(t1) = IL, and hence the corresponding time elapsed is as follows:
( t 1 t 0 ) = [ I L i L r ( t 0 ) ] L r V o
State 2: [ t 1 t t 2 ] . As shown in Figure 5, the main switches S1 and S2 are still turned off but the auxiliary switch Sa is still turned on, whereas the freewheeling diodes D1 and D2 are turned off but the resonant diodes Dr1 and Dr2 are still turned on. During this state, the parasitic capacitors of S1 and S2, called CS1 and CS2, resonate with the resonant inductor Lr, thereby making the resonant inductor current iLr keep increasing. In addition, the output capacitor Co provides energy to the load. The moment CS1 and CS2 are discharged to zero, the parasitic diodes of the main switches S1 and S2, called DS1 and DS2, are turned on, and hence this state comes to the end. During this interval, the corresponding state equation can be represented as follows:
{   i L r ( t ) = I L + v S ( t 1 ) Z 2 sin ω 2 ( t t 1 ) [ I L i L r ( t 1 ) ] cos ω 2 ( t t 1 )   v S ( t ) = Z 2 [ I L i L r ( t 1 ) ] sin ω 2 ( t t 1 ) + v S ( t 1 ) cos ω 2 ( t t 1 )
where
ω 2 = 1 L r C S ,   Z 2 = L r C S ,   C S = C S 1 + C S 2   and   v S 1 = v S 2 = v S
And hence, the corresponding time elapsed is as follows:
( t 2 t 1 ) = π 2 ω 2
State 3: [ t 2 t t 3 ] . As shown in Figure 6, the main switches S1 and S2 are still turned off but the auxiliary switch Sa is still turned on, whereas the freewheeling diodes D1 and D2 are still turned off but the resonant diodes Dr1 and Dr2 are still turned on. During this state, the parasitic diodes of the main switches S1 and S2, called DS1 and DS2, are turned on, and hence the voltages across S1 and S2, called vs1 and vs2, are zero. In addition, the output capacitor Co still provides energy to the load. The instant the auxiliary switch Sa is turned off, S1 has zero-voltage-transition (ZVT) turn-on and hence this state comes to the end. During this interval, the corresponding state equation can be signified as follows:
i L r ( t ) = I L + V o Z 2
State 4: [ t 3 t t 4 ] . As shown in Figure 7, the main switch S1 is turned on but the main switch S2 is still turned off and the auxiliary switch Sa is turned off, whereas the freewheeling diodes D1 and D2 are still turned off but the resonant diodes Dr1 and Dr2 are still turned on. During this state, the current iS1 begins to increase, and the auxiliary diode Da is turned on due to Sa being turned off, thereby making the voltage across the resonant inductor Lr change its polarity such that Lr is demagnetized. Once iS1 = IL1 and iLr = IL2, the resonant diode Dr1 is turned off, and hence this state comes to the end. During this interval, the corresponding state equation can be represented as follows:
i L r ( t ) = V o L r ( t t 3 ) + I L + V o Z 2
As t = t4, the corresponding time elapsed is as follows:
( t 4 t 3 ) = [ I L + V o Z 2 i L r ( t 4 ) ] L r V o
State 5: [ t 4 t t 5 ] . As shown in Figure 8, the main switch S1 is still turned on but the main switch S2 is still turned off and the auxiliary switch Sa is still turned off, whereas the freewheeling diodes D1 and D2 are still turned off and the resonant diode Dr1 is turned off but the resonant diode Dr2 is still turned on. During this state, the inductor current IL2 charges the parasitic capacitor of the main switch S2, called CS2, and also charges the resonant capacitor Cr1 in the opposite direction. At the same time, the resonant inductor Lr still keeps demagnetized, and as the resonant current iLr is deceased to zero, the voltage across CS2, called vS2, is increased to the output voltage Vo and the voltage across Cr1, called vCr1, is decreased to −Vo. The moment the auxiliary diode Da is turned off, the freewheeling diode D2 is turned on, and hence this state comes to the end. During this interval, the corresponding state equation can be signified as follows:
{ i L r ( t ) = I L 2 + v A ( t 4 ) V o Z 5 sin ω 5 ( t t 4 ) [ I L 2 i L r ( t 4 ) ] cos ω 5 ( t t 4 ) v A ( t ) = V o + Z 5 [ I L 2 i L r ( t 4 ) ] sin ω 5 ( t t 4 ) + [ v A ( t 4 ) V o ] cos ω 5 ( t t 4 )
where vA is the voltage across CA, and
C A = C r 1 + C S 2 , ω 5 = 1 L r C A   and   Z 5 = L r C A
Hence, the corresponding time elapsed is as follows:
( t 5 t 4 ) = π 2 ω 5
State 6: [ t 5 t t 6 ] . As shown in Figure 9, the main switch S1 is still turned on but the main switch S2 is still turned off and the auxiliary switch Sa is still turned off, whereas the freewheeling diode D1 is still turned off but the freewheeling diode D2 is turned on but the resonant diode Dr1 is still turned off and the resonant diode Dr2 is turned off. During this state, the operating behavior of this converter is the same as that of the traditional boost converter. The instant Dr2 and Sa are both turned on, this state comes to the end. At the same time, since Sa is connected in series with the resonant inductor Lr, the current flowing through Sa, called iSa, is slowly increased from zero, making Sa turned on with zero current switching (ZCS).
State 7: [ t 6 t t 7 ] . As shown in Figure 10, the main switch S1 is still turned on but the main switch S2 is still turned off but the auxiliary switch Sa is turned on, whereas the freewheeling diode D1 is still turned off but the freewheeling diode D2 is still turned on but the resonant diode Dr1 is still turned off but the resonant diode Dr2 is turned on. During this state, since Sa and Dr2 are turned on, the resonant inductor Lr is to be magnetized. Once iLr = IL2, this state comes to the end. During this interval, the corresponding state equation can be expressed as follows:
i L r ( t ) = V o L r ( t t 6 ) + i L r ( t 6 )
As t = t6, iLr(t6) = 0, whereas as t = t7, iLr(t7) = IL2. Accordingly, the corresponding time elapsed is
( t 7 t 6 ) = I L 2 L r V o
State 8: [ t 7 t t 8 ] . As shown in Figure 11, the main switch S1 is still turned on but the main switch S2 is still turned off but the auxiliary switch Sa is still turned on, whereas the freewheeling diodes D1 and D2 are turned off and the resonant diode Dr1 is still turned off but the resonant diode Dr2 is still turned on. During this state, the resonant capacitor Cr1 and the parasitic capacitor CS2 of the main switch S2 resonate with the resonant inductor Lr. Therefore, CS2 is discharged, Cr1 is discharged in the opposite direction, and the resonant inductor remains demagnetized. In addition, the output capacitor Co provides energy to the load. As soon as the current in S1 is decreased to zero, S1 is turned off with zero current transition (ZCT) and hence this state comes to the end. During this interval, the corresponding state equation can be represented as follows:
{ i L r ( t ) = I L 2 + v A ( t 7 ) Z 8 sin ω 8 ( t t 7 ) [ I L 2 i L r ( t 7 ) ] cos ω 8 ( t t 7 ) v A ( t ) = Z 8 [ I L 2 i L r ( t 7 ) ] sin ω 8 ( t t 7 ) + v A ( t 7 ) cos ω 8 ( t t 7 )
where
ω 8 = 1 L r C A   and   Z 8 = L r C A
Accordingly, the corresponding time elapsed is as follows:
( t 8 t 7 ) = 1 ω 8 sin 1 ( [ i L r ( t 8 ) I L 2 ] Z 8 V o )
State 9: [ t 8 t t 9 ] . As shown in Figure 12, the main switch S1 is turned off and the main switch S2 is still turned off and the auxiliary switch Sa is turned off but the auxiliary diode Da is turned on, whereas the freewheeling diodes D1 and D2 are still turned off and the resonant diode Dr1 is still turned off but the resonant diode Dr2 is still turned on. During this state, the resonant capacitor Cr1 is still discharged in the opposite direction, and the input inductor currents IL1 and IL2 charge the capacitors CS1 and CS2 of the main switches S1 and S2, respectively. As soon as CS2 is charged to Vo, this state comes to the end. During this interval, the corresponding state equation can be expressed as follows:
{ i L r ( t ) = V 1 Z 9 sin ω 9 ( t t 8 ) I 1 cos ω 9 ( t t 8 ) + I 1 I L r ( t 8 ) v S 1 ( t ) = C C S 1 [ V 1 cos ω 9 ( t t 8 ) I 1 Z 9 sin ω 9 ( t t 8 ) V 1 ] + I L 1 C r + C S 1 ( t t 8 ) v C r ( t ) = C C r [ V 1 cos ω 9 ( t t 8 ) I 1 Z 9 sin ω 9 ( t t 8 ) V 1 ] + I L 1 C r + C S 1 ( t t 8 ) + V C r ( t 8 )
where
C = C r C S 1 C r + C S 1 , ω 9 = 1 L r C = C r + C S 1 L r C r C S 1 Z 9 = L r C = L r ( C S 1 + C r ) C r C S 1 V 1 = V o + V C r ( t 8 ) , I 1 = I L r C C S 1 + I L 2 + I L r ( t 8 )
State 10: [ t 9 t t 10 ] . As shown in Figure 13, the main switch S1 is still turned off and the main switch S2 is still turned off and the auxiliary switch Sa is still turned off but the auxiliary diode Da is still turned on, whereas the freewheeling didoes D1 is still turned off but the freewheeling diode D2 is turned on but the resonant diode Dr1 is still turned off but the resonant diode Dr2 is still turned on. During this state, the voltage across the parasitic capacitor CS2 of the main switch S2 is the input voltage Vo, making D2 turned on, the auxiliary capacitor Cr1 is still discharged in the opposite direction, and the parasitic capacitor CS1 of the main switch S1 is still charged. Since D2, Dr2, and Da are turned on, the voltage across the resonant inductor Lr is zero. The moment CS1 reaches Vo, the diode D1 is turned on, and hence this state comes to the end. During this interval, the corresponding state equation can be signified as follows:
{ v S 1 ( t ) = I L 1 C S 1 + C r 1 t + v S 1 ( t 9 ) v C r 1 ( t ) = I L 1 C S 1 + C r 1 t + v S 1 ( t 9 ) V o
State 11: [ t 10 t t 11 ] . As shown in Figure 14, the main switch S1 is turned still off and the main switch S2 is still turned off and the auxiliary switch Sa is still turned off but the auxiliary diode Da is turned on, whereas the freewheeling didoes D1 is turned on and the freewheeling diode D2 is still turned on and the resonant diode Dr1 is turned on and the resonant diode Dr2 is still turned on. The instant the auxiliary switch Sa is turned on, this state comes to the end. During this interval, the corresponding state equation can be represented as follows:
i L r ( t ) = i L r ( t 10 )
As the time interval between t0 and t11 is finished, the time interval between t11 and t21 begins. In other words, the converter enters into the operating states of the second phase. The corresponding operating states are the same as those of the first phase. Eventually, as the time interval between t11 and t21 is finished, the time comes back to the instant t0 and the next cycle is repeated.

4. Proposed Control Strategy

Figure 15 shows the proposed control strategy block diagram. First, the output voltage is sensed by a voltage divider with a gain of k. The sensed voltage is sent to the first analog-to-digital converter (ADC1) to obtain the sensed output voltage V o . After this, the error coming from Vref minus V o is passed to the controller Gc1(z) so as to generate a control force. The sensed current after ADC2 is subtracted from this control effort. Therefore, a resulting error is created and sent to the controller Gc3(z) so as to yield one pulse-width modulated (PWM) signal after the first PWM generator. This signal will control the main switch of the first phase. On the other hand, the sensed current of the second phase after ADC3, called I L 2 , is subtracted from half of the sum of I L 1 and I L 2 , and the corresponding error is sent to the controller Gc2(z) to obtain the other PWM signal after the second PWM generator. This PWM signal is shifted by 180 degrees and then used to drive the main switch of the second phase.
The basic operating behavior is described as follows. Since 0.5(IL1 + IL2) is used as the current reference for IL2, the difference between 0.5(IL1 + IL2) and IL2 is 0.5(IL1IL2) and this value will be sent to the feedback controller such that IL1 is almost equal to IL2. On the other hand, Io1 = (1 − D)IL1 and Io2 = (1 − D)IL2, where D is a duty cycle. Since IL1 = IL2 and Io1 = Io2 = 0.5Io, the current sharing will be achieved.

5. Design of the Key Components

The system specifications of the proposed interleaved boost converter with soft switching can be seen in Table 1, whereas the components used in this converter can be seen in Table 2. The design of the key components is based on Table 1.

5.1. Design of L1 and L2

The used converter operates in the continuous conduction mode (CCM) all over the input voltage range and the output current range. The worst case for the design of L1 is under the minimum input voltage and the minimum output current. It is assumed that as the auxiliary switch is turned on, the voltage across each input inductor is not affected by the resonant inductor. Hence, Figure 16 displays the current in L1 under the discontinuous conduction mode (BCM), whose direct current (DC) value is ILB1.
Therefore, based on the following equation, the minimum value of the input inductor, called L1,min, can be figured out as below:
L 1 , min = V i n , min D max T s 2 × 0.5 I o , min = V i n , min D max T s I o , min = 699.84 μ H
Eventually, the value of L1 is set at 720 μH, which is also for the value of L2.

5.2. Design of Co

It is assumed that the voltage ripple is smaller than 0.2% of the output voltage. Since this converter takes a two-phase interleaved structure, the frequency of the output voltage ripple is 50 kHz. Therefore, based on the following equation, the minimum value of the output capacitor, Co,min, is as follows:
C o , min = 0.5 I o , r a t e d D max × 0.5 T s 0.2 % V o = 125 I o , r a t e d D max T s V o = 346.43 μ F
Finally, the value of Co is set at 680 μH.

5.3. Design of Lr, Cr1 and Cr2

For one PWM cycle, before the main switches S1 and S2 are turned off, the auxiliary switch Sa has been turned on so that the main switches S1 and S2 will have zero-current transition at turn-off. Since the input voltage locates between 21.6 and 26.4 V, the turn-on time of the main switches locates between 15 and 20 μs. It is assumed that the turn-on time of the auxiliary switch Sa is set to 0.1 times of the turn-on time of the main switches, equal to 1.5 and 2 μs. Hence, the turn-on time of Sa is chosen to be 2 μs, which is the sum of the time intervals of [t6, t7] and [t7, t8]. The resonant current at t8, called iLr(t8), makes the current flowing through the main switch S1 zero, causing S1 to be turned on with ZCT. Since iLr(t8) = IL1 + IL2 and t8t6= 2 μs, based on (13) and (16), the following equation can be obtained as below:
( t 8 t 7 ) + ( t 7 t 6 ) = 1 ω 8 sin 1 ( I L 1 Z 8 V o ) + I L 2 L r V o = 2   μ s
In addition, it is assumed that the resonant period is set at four times of the turn-on time of Sa.
f r = 1 2 π L r C r 1 = 125 kHz
From (23) and (24), the value of Lr can be worked out to be 6.7 μH, and the value of Cr1 can be figured out to be 230 μF. Eventually, the value of Lr is set at 6 μH and the value of Cr1 is set at 220 μF, which is also for the value of Cr2.
In addition, the turn-on time of Sa before the main switches S1 and S2 are turned on is set at 1 μs, which is half of the turn-on time of Sa before the main switches S1 and S2 are turned off.

6. Experimental Results

Figure 17, Figure 18, Figure 19, Figure 20, Figure 21, Figure 22, Figure 23, Figure 24, Figure 25, Figure 26 and Figure 27 are measured at the rated load. Figure 17 shows the gate driving signals for S1, S2 and Sa, called vg1, vg2 and vga. In addition, vg1 and vg2 are almost the same except that the difference in phase between them is 180 degrees, and Sa is turned on before S1 and S2 are turned on or off. Figure 18 shows the gate driving signal for S1, called vg1, the voltage across S1, called vS1, and the current flowing through S1, called iS1. Figure 19 is the zoom-in of Figure 18 as S1 is turned on, whereas Figure 20 is the zoom-in of Figure 18 as S1 is turned off. Figure 21 shows the gate driving signal for S2, called vg2, the voltage across S2, called vS2, and the current flowing through S2, called iS2. Figure 22 is the zoom-in of Figure 21 as S2 is turned on, whereas Figure 23 is the zoom-in of Figure 21 as S2 is turned off. Figure 24 displays the gate driving signal for Sa, called vga, the voltage across Sa, called vSa, and the current flowing through Sa, called iSa. Figure 25 is the zoom-in of Figure 24. In addition, Figure 26 shows the voltage across the resonant capacitor Cr1, called vCr1, the voltage across Cr2, called vCr2. Figure 27 displays the voltage across S1, called vS1, the current in L1, called iL1, and the current in L2, called iL2.
From Figure 19 and Figure 20, it can be seen that the main switch S1 has ZVT turn-on and ZCT turn-off, whereas from Figure 22 and Figure 23, it can be seen that the main switch S2 has ZVT turn-on and ZCT turn-off. From Figure 25, since the auxiliary switch Sa is connected in series with the resonant inductor Lr, thereby making iSa increase slowly and hence causing Sa to be turned on with ZCS. From Figure 26, via Cr1, Cr2, and Lr in the resonant loop along with CS1 and CS2 of the main switches S1 and S2, the soft switching of the main switches for individual phases can be realized. It is noted that due to the diode clamp, Cr1 and Cr2 can be reversely charged to −Vo. From Figure 27, it can be seen that the DC values of iL1 and iL2 are almost the same, and iL2 is shifted from iL1 by 180 degrees.
On the other hand, Figure 28 shows how to measure the efficiency. First of all, as displayed in Figure 28, the input current Iin is attained by measuring the voltage across the current-sensing resistor according to the digital meter named Fluke 8050 A. Next, the input voltage Vin is obtained also by the digital meter. Therefore, the input power is the product of Vin and Iin. Concerning the output power, the output current Io is read from the electronic load and the output voltage Vo is attained also by the digital meter. Hence, the output power can be gotten. Eventually, the accompanying efficiency can be attained. Figure 29 displays the curves of efficiency versus load under the input voltage of 24 V. From Figure 29, it can be seen that the converter with the proposed soft switching circuit has higher efficiency than that of the converter without the proposed soft switching circuit. Particularly, the difference in efficiency between with and without the proposed soft switching can be up to about 9%, which occurs at minimum load.

7. Conclusions

A soft switching method is presented herein, which is applied to a two-phase interleaved boost converter. The concept of this method is that the auxiliary switch Sa is turned on before the main switches S1 and S2 are turned on/off. By doing so, the ZVT turn-on and ZCT-turn-off of S1 and S2 can be achieved, leading to improvement in the overall efficiency. Furthermore, two phases use the same resonant inductor such that the circuit size can be reduced. In addition, Sa is turned on with ZCS due to Sa and Lr being connected in series.

Author Contributions

Conceptualization, K.-I.H.; methodology, K.-I.H.; software, W.-Z.J.; validation, W.-Z.J.; formal analysis, W.-Z.J.; investigation, J.-J.S.; resources, K.-I.H.; data curation, J.-J.S.; writing—original draft preparation, K.-I.H.; writing—review and editing, K.-I.H.; visualization, J.-J.S.; supervision, K.-I.H.; project administration, K.-I.H.; funding acquisition, K.-I.H. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Ministry of Science and Technology, Taiwan, under the Grant Number: MOST 108-2221-E-027-051.

Acknowledgments

The authors gratefully acknowledge the support of the Ministry of Science and Technology, Taiwan, under the Grant Number MOST 108-2221-E-027-051.

Conflicts of Interest

The authors declare no conflict of interest with commerce.

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Figure 1. Proposed soft-switching interleaved boost converter.
Figure 1. Proposed soft-switching interleaved boost converter.
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Figure 2. Equivalent circuit of the circuit shown in Figure 1.
Figure 2. Equivalent circuit of the circuit shown in Figure 1.
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Figure 3. Illustrated waveforms for the proposed converter.
Figure 3. Illustrated waveforms for the proposed converter.
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Figure 4. Current flow in state 1.
Figure 4. Current flow in state 1.
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Figure 5. Current flow in state 2.
Figure 5. Current flow in state 2.
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Figure 6. Current flow in state 3.
Figure 6. Current flow in state 3.
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Figure 7. Current flow in state 4.
Figure 7. Current flow in state 4.
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Figure 8. Current flow in state 5.
Figure 8. Current flow in state 5.
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Figure 9. Current flow in state 6.
Figure 9. Current flow in state 6.
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Figure 10. Current flow in state 7.
Figure 10. Current flow in state 7.
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Figure 11. Current flow in state 8.
Figure 11. Current flow in state 8.
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Figure 12. Current flow in state 9.
Figure 12. Current flow in state 9.
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Figure 13. Current flow in state 10.
Figure 13. Current flow in state 10.
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Figure 14. Current flow in state 11.
Figure 14. Current flow in state 11.
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Figure 15. Proposed control block diagram.
Figure 15. Proposed control block diagram.
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Figure 16. Voltage and current of L1 under the BCM.
Figure 16. Voltage and current of L1 under the BCM.
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Figure 17. Gate driving signals: (1) vg1; (2) vg2; (3) vga.
Figure 17. Gate driving signals: (1) vg1; (2) vg2; (3) vga.
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Figure 18. Waveforms relevant to S1: (1) vg1; (2) vS2; (3) iS1.
Figure 18. Waveforms relevant to S1: (1) vg1; (2) vS2; (3) iS1.
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Figure 19. Zoom-in of Figure 17 as S1 is turned on: (1) vg1; (2) vS1; (3) iS1.
Figure 19. Zoom-in of Figure 17 as S1 is turned on: (1) vg1; (2) vS1; (3) iS1.
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Figure 20. Zoom-in of Figure 17 as S1 is turned off: (1) vg1; (2) vS1; (3) iS1.
Figure 20. Zoom-in of Figure 17 as S1 is turned off: (1) vg1; (2) vS1; (3) iS1.
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Figure 21. Waveforms relevant to S2: (1) vg2; (2) vS2; (3) iS2.
Figure 21. Waveforms relevant to S2: (1) vg2; (2) vS2; (3) iS2.
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Figure 22. Zoom-in of Figure 20 as S2 is turned on: (1) vg2; (2) vS2; (3) iS2.
Figure 22. Zoom-in of Figure 20 as S2 is turned on: (1) vg2; (2) vS2; (3) iS2.
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Figure 23. Zoom-in of Figure 20 as S2 is turned off: (1) vg2; (2) vS2; (3) iS2.
Figure 23. Zoom-in of Figure 20 as S2 is turned off: (1) vg2; (2) vS2; (3) iS2.
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Figure 24. Waveforms relevant to Sa: (1) vga; (2) vSa; (3) iSa.
Figure 24. Waveforms relevant to Sa: (1) vga; (2) vSa; (3) iSa.
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Figure 25. Zoom-in of Figure 23 as Sa is turned on: (1) vga; (2) vSa; (3) iSa.
Figure 25. Zoom-in of Figure 23 as Sa is turned on: (1) vga; (2) vSa; (3) iSa.
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Figure 26. Waveforms relevant to the resonant loop: (1) vCr1; (2) vCr2; (3) iLr.
Figure 26. Waveforms relevant to the resonant loop: (1) vCr1; (2) vCr2; (3) iLr.
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Figure 27. Waveforms relevant to current sharing: (1) vS1; (2) iL1; (3) iL2.
Figure 27. Waveforms relevant to current sharing: (1) vS1; (2) iL1; (3) iL2.
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Figure 28. Efficiency measurement block diagram.
Figure 28. Efficiency measurement block diagram.
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Figure 29. Curves of efficiency versus load under the input voltage of 24 V.
Figure 29. Curves of efficiency versus load under the input voltage of 24 V.
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Table 1. System specifications of the proposed converter.
Table 1. System specifications of the proposed converter.
System ParametersSpecifications
Operating modeCCM
Input voltage (Vin) 24 V ± 10 %
Output voltage (Vo)42 V
Rated output current (Io,rated)6 A
Minimum output current (Io,min)0.3 A
Switching frequency (fs)25 kHz
Table 2. Components used in the proposed converter.
Table 2. Components used in the proposed converter.
ComponentsSpecifications
Input Inductor for the first phase (L1)720 μH
Input Inductor for the second phase (L2)720 μH
Output capacitor (Co)680 μF
Resonant inductor (Lr)6 μH
Resonant capacitor for the first phase (Cr1)220 μF
Resonant capacitor for the second phase (Cr2)220 μF

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MDPI and ACS Style

Hwu, K.-I.; Shieh, J.-J.; Jiang, W.-Z. Interleaved Boost Converter with ZVT-ZCT for the Main Switches and ZCS for the Auxiliary Switch. Appl. Sci. 2020, 10, 2033. https://doi.org/10.3390/app10062033

AMA Style

Hwu K-I, Shieh J-J, Jiang W-Z. Interleaved Boost Converter with ZVT-ZCT for the Main Switches and ZCS for the Auxiliary Switch. Applied Sciences. 2020; 10(6):2033. https://doi.org/10.3390/app10062033

Chicago/Turabian Style

Hwu, Kuo-Ing, Jenn-Jong Shieh, and Wen-Zhuang Jiang. 2020. "Interleaved Boost Converter with ZVT-ZCT for the Main Switches and ZCS for the Auxiliary Switch" Applied Sciences 10, no. 6: 2033. https://doi.org/10.3390/app10062033

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