A High Gain Modified Quadratic Boost DC-DC Converter with Voltage Stress Half of Output Voltage

1

In different parts of the manuscript the conventional quadratic converter is mentioned; however, references are not provided.

Reply:

Many thanks to the Reviewer’s reminder. We have updated the manuscript by citing the reference for the Conventional quadratic boost converter (CQBC) in he introduction section.

2

In the proposed configuration, a considerable number of components are added with respect to the quadratic boost converter. This directly affects the efficiency of the proposed converter when the converter power increases.

Reply:

Thanks to the Reviewer’s comments. Yes, we are totally agreeing that the efficiency would be reduced if we use a high number of components. In some applications where the volage gain is more important for suitable application the topology can cane be used in that case.

3

The font size must be homogenized in equation 45.

Reply:

Thanks to the Reviewer’s reminder. We have updated the font size of that mentioned equation.

4

In table 1, reference 35 should be replaced by something else dealing with the conventional quadratic boost converter [ok please check]

Reply:

Many thanks to the Reviewer’s reminder. The conventional quadratic boost converter is the general primary structure. We have discussed that in section 2.1. In the updated manuscript we have included more references.

5

To complement the research, modeling, and control of the proposed converter should be added

Reply:

Many thanks, for the Reviewer’s valuable suggestions. In this study, we have experimentally demonstrated the open-loop performance of the proposed new modified structure. However, we have also updated the manuscript with the gain and phase plot from the PSIM simulation. The gain and phase plot for the circuit shown in figure 27 justify that the converter can easily be implemented by a close-loop control technique for voltage regulation.

6

Why is an output voltage of 408 V proposed in table 2?

Reply:

Thanks to the Reviewer’s query. As this proposed topology uses many diodes so as results the voltage gain deviates from its original value. But that is not only the case, the ESR of each passive component is responsible for reduced voltage gain. In SIMPLIS software simulation the ESR value has not been considered. That’s why the voltage gain is slightly higher than the experimentally obtained output voltage.

7

Figure 24 shows that for a power of 200 W, the efficiency of the converter decreases considerably. For applications with renewable energies, the efficiency of the converter must be high (90%-99%). It is observed that this converter is less efficient than the conventional quadratic converter for medium power. This is due to the high number of passive components.

Reply:

Many thanks, to the Reviewer’s comment. First of all, we can easily say that the efficiency is reduced because of the high number of passive components.

The loss in the power converter system is also highly dependent on the switching losses of the active power device. So, we can increase the switching frequency and would help to use a lower rating for all passive components. However, we have used the same circuit components and we measured the efficiency of the conventional quadratic boost converter. The efficiency is slightly higher than this proposed topology. Based on that we can conclude that switching loss is majorly dominated due to occurring hard switching in the power MOSFET.

1

Paper writing and sentences punctuation need to be revised

Reply:

Many thanks for the Reviewer’s valuable suggestions. We have checked the manuscript and modified most parts in order to improve the content of the manuscript.

2

The resolution of the simulation figures from (12) to (16) need to be increased

Reply:

Many thanks to the Reviewer’s reminder. We have tried to improve the image quality. In this manuscript, we have directly attached the simulation results from the software.

3

In Fig. 24, why the maximum efficiency is occurred at 140W although the converter is designed at 200W.

Reply:

Thanks to the Reviewer for asking this question. First of all, there was a small calculation error from our side. In the new manuscript, the corresponding efficiency plot is updated to figure 25. The maximum efficiency is experimentally measured at 150-watt output power based on passive components design consideration for the proposed topology. The circuit offers the highest efficiency at a 150-Watt output power rating as a result the operating waveforms are measured depending on this situation.

The efficiency of the proposed converter depends on two types of power loss. The loss comes from switching loss and the loss due to the having resistance in each component. After remeasuring the efficiency plot for the studied topology, we consider that a major part of the loss is due to switching loss across all active devices.

1

The abstract can be written in an effective way to attract readers. Be specific to the points that how the proposed topology is unique.

Reply:

Many thanks for the Reviewer’s valuable suggestions. We have modified the abstract of this study.

2

In the abstract, the authors have written peak efficiency is 94% at 150 W but in section 6, line 485, it has been written as 94.5%. Look into this issue properly.

Reply:

Many thanks for the Reviewer’s suggestions. We have corrected the information.

3

From figure 24, it is clear that the proposed topology cannot be operated for a higher power rating. Because the efficiency is gradually decreased if the power rating is increased. Justify with your answer.

Reply:

Many thanks for the Reviewer’s comments. The modified efficiency plot is changed to figure 25 in the modified manuscript. In this study, we have designed this converter for low-medium power applications. Based on the output rating we have designed the inductor accordingly. For higher power ratings, the inductors also need to design accordingly. In the non-isolated-based boost topology, the voltage boost phenomenon is mostly dependent on the inductor’s charging and discharging properties. For a higher power rating, the inductors are unable to provide the theoretical voltage gain as well as higher efficiency.

4

The reviewer felt that the content in sections 2.1 to 2.3 can be included in the introduction which can be justification for developing the proposed topology. [ok]

Reply:

Many thanks for the Reviewer’s concerns and suggestions. According to the reviewer, we can shift it to the introduction section but in this study, we have paved the way for the readers about the evolution of the proposed topology step by step. That’s why we have documented all the techniques of each topology in a step-by-step manner from section 2.1.

5

Kindly include the Discontinuous mode of operation and boundary condition for the proposed converter.

Reply:

Many thanks for the Reviewer’s suggestions. We have modified the manuscript with exact data in figure 8 for CCM, DCM, and Boundary mode operation.

6

Figure 8, kindly include the capacitor current also. 

Reply:

Many thanks for the Reviewer’s suggestions. We have updated the figure with the capacitor current waveform to understand how the current flows during each ON and OFF period. In the new manuscript, figure 9 demonstrates all the steady-state waveforms.

7

Kindly include the state space equation for the proposed topology to check the stability analysis. 

Reply:

Many thanks for the Reviewer’s suggestions. We have updated the manuscript with an open-loop gain and phase plot from the PSIM software in section 6.3. We believe these results justify that the proposed topology is stable and the close-loop can easily e designed for voltage regulation.

1

Added references not suitable for citing the quadratic boost converter. on the other hand, most of the references are from years prior to 2018. Research papers must be innovative, compared with updated references.

Reply:

Many thanks to the Reviewer’s suggestion. We totally agree with the reviewer’s decisions. Besides, we believe that research techniques and results carry past, present, and future. We have updated the manuscript with a few more references that were reported recently. Also, we have updated with more details and drawbacks in order to show the potential advantage of his proposed circuit configuration. The main objective for non-isolated based high gain boost topology is using fewer switches and reduced voltage stress. This proposed circuit topology is the modified version of the reference [33] that we have discussed in section 2.3.

2

This converter configuration is proposed for application with renewable sources. These kinds of applications need a high-power efficiency and high-voltage gain; however, as the authors mentioned, the proposed configuration provides a low power efficiency.

Reply:

Thanks to the Reviewer’s comments. Generally, if we consider all kinds of losses then switching loss as well as the loss due to ESR is the more prominent if we neglect the loss in the PCB. The power MOSFET switch and diodes have a huge impact. They can improve efficiency significantly by employing more efficient power devices.

In this study based on experimentally measured efficiency, the efficiency data has been plotted and shown.

3

Almost all DC-DC power converter applications (including energy processing of renewable sources) must be provided output voltage regulation. A control scheme for the proposed converter seems not to be easy to implement (due to a large number of components); then, modelling is needed to design an adequate controller to provide voltage regulation and system stability. 

Reply:

Thanks to the Reviewer’s comments. The application of the boost converter is not limited to renewable energy resources only. There are several other applications for example X-ray drivers, and high pulse generators where high voltage is required for only a short period of time. In that case open-loop, the high gain DC-DC converter is sufficient enough. Generally, for that kind of application, this boost converter can be utilized

  For analyzing the stability and control purpose the open-loop bode plot is added before the conclusion section. The obtained results justify that a basic simple PI controller can be used for voltage regulation. Moreover, the experimental results are taken by running at a fixed duty ratio (i.e., in his case 0.4) for a longer period of time to observe the voltage regulation. The output voltage was constant with a tolerance level of 0.2%.

1

The article can be accepted in its current form. I have asked to include the state-space equations in the previous round of review but the authors took another method to prove the open-loop steady-state stability. 

Reply:

Many thanks to the Reviewer’s suggestion and comments after 1^st round of revision. However, we have modified several sentences. Please check that.