Magnetic Skyrmion-Based Spiking Neural Network for Pattern Recognition

Abstract

Spiking neural network (SNN) has emerged as one of the most powerful brain-inspired computing paradigms in complex pattern recognition tasks that can be enabled by neuromorphic hardware. However, owing to the fundamental architecture mismatch between biological and Boolean logic, CMOS implementation of SNN is energy inefficient. A low-power approach with novel “neuro-mimetic” devices offering a direct mapping to synaptic and neuronal functionalities is still an open area. In this paper, SNN constructed with novel magnetic skyrmion-based leaky-integrate-fire (LIF) spiking neuron and the skyrmionic synapse crossbar is proposed. We perform a systematic device-circuit-architecture co-design for pattern recognition to evaluate the feasibility of our proposal. The simulation results demonstrated that our device has superior lower switching voltage and high energy efficiency, two times lower programming energy efficiency in comparison with CMOS devices. This work paves a novel pathway for low-power hardware design using full-skyrmion SNN architecture, as well as promising avenues for implementing neuromorphic computing schemes.

1. Introduction

The human brains are highly efficient in performing pattern cognitive tasks including image recognition, speech recognition et al., which were thought as the main applications of current artificial intelligence (AI) [1]. Generally speaking, we have been studying spike-based coding schemes and various related learning methods [2], trying to mimic the logic and function of the human brain with AI in the field of neuroscience, which is called spiking neural networks (SNNs). SNNs have important applications in pattern recognition as a result of their outstanding performance over traditional machine learning algorithms. In parallel to such progress, hardware implementation of these SNNs mimicking the information transfer in biological neurons, i.e., via the precise timing of spikes or a sequence of spikes has attracted a lot of attention [3,4,5].

Many researchers try to build silicon semiconductor-based circuits through transistor integration to realize spiking neurons. However, there are energy consumption and area problems that are difficult to solve when implementing SNN with CMOS, hindering further development. This is mainly due to the lack of direct mapping to spike neurons and multiple synaptic memory access. Therefore, emerging nonvolatile devices, such as Ag-Si memristors [6], phase change memories [7], and multilayer spintronic devices [8], have been adopted for SNN functionalities exploration. Magnetic random access memory (MRAM) is a typical representative of spintronic devices [9,10]. Many achievements have been made in recent years [11,12,13,14,15], promoting the application of MRAM in neuromorphic computing.

Among the post-CMOS technologies, magnetic skyrmions have emerged as potential candidates due to their small size, stable structure, and low driving threshold current density [16]. There have been prior proposals for SNN implementation based on skyrmions. For instance, ref. [17] considers a skyrmion-based artificial synapse device for neuromorphic systems, mimicking the process of a biological synapse. Ref. [18] introduced a new artificial neuron model, in which the threshold can be modulated by voltage. In addition, the different behaviors of neurons are realized by many parallel skyrmionic devices. Ref. [19] proposed that skyrmion is a spintronic device for deep learning, which improves energy consumption as a spiking neuron processor. Nevertheless, most of these studies focus on single neural/synaptic device functionality demonstration from a device perspective or simple digit recognition with a relatively small array size from the application perspective. A holistic design of an SNN system based on full-skyrmion-based neural network design for complicated pattern recognition is still an open area.

In this paper, we provide a device-circuit-architecture co-design of all-skyrmion leaky-integrate-fire (LIF) type SNN. We choose the LIF neuron model which has attracted a lot of attention in SNN applications in the past two decades [20]. Much progress has been made in previous work on the study of skyrmion-based LIF neurons in terms of device design and performance evaluation. For example, ref. [21] studied skyrmion dynamics driven by the current in the nanotrack, proposing a new LIF neuron device. Ref. [22] mainly studied the performance of the skyrmion-based LIF neuron dynamics in the nanotrack, focusing on size, velocity, energy, and stability. Based on the above achievements, we present a new method to simulate neurons and their synaptic responses, mainly focusing on the circuit implementation of the whole SNN structure. The research provides a new way to build skyrmion-based SNN for complicated pattern recognition tasks, which paves the way for the practical application of skyrmionics and can be used as an alternative to traditional CMOS-based SNN implementation.

2. Overview

2.1. LIF Neuron Model

A number of spiking models, such as the pulse-coupled IF model [23] and the Spike Response Model [24] have been developed to quantitatively characterize the biophysical neuronal membrane potential and ion channel. As one of the exemplary models, the LIF neuron model has been widely recognized and applied in the field of neuroscience [25]. The principle can be understood by the simplified computational model in Figure 1. The input spikes (V_i) from pre-neurons are modulated by the weights (W_i) which are stored in the interconnecting synapses. The output from all synapses is then summed up and fed to the post-neuron through the non-linear activation function. In response to this weighted current, a neuron’s membrane potential (V_mem) rises by a certain amount but decays slowly to a rest value until the next spike is received. This behavior can be expressed as follows:

$${\tau }_m\frac{d{V}_{mem}}{dt}=-\left(V_{mem}-V_{reset}\right)+{{\displaystyle \sum }}_i\delta \left(t-t_i\right)w_i$$

(1)

where V_mem is the membrane potential,$V_{reset}$ is the reset potential, $w_i$ is the synaptic weight for the i-th input,${\tau }_m$  is the membrane time constant, and $\delta \left(t-t_i\right)$ is the spiking event occurring at time instant $t_i$. As soon as V_mem crosses a threshold (V_th), the neuron emits a spike, which is transmitted to the next layer of neurons.

2.2. Skyrmion-Based LIF Neuron

Magnetic skyrmions, topologically protected particle-like spin textures, have been observed in ultrathin magnetic systems with breaking inversion symmetry and large spin–orbital coupling, which can be explained by the presence of the Dzyaloshinskii–Moriya Interaction (DMI) [26]:

$$H_{DM}=-D_{1,2}·\left(S_1\times S_2\right)$$

(2)

where H_DM is the Hamiltonian parameter, D_1,2 is the DMI vector, S₁ and S₂ are the spins of the two neighboring atoms. Recently, skyrmions in magnetic ultrathin films or multilayer systems have received intensive research interest [27]. To mimic the biological LIF neuron, it is important to represent the membrane potential with an analogy physical quantity concerning the skyrmion motion. According to the previous report [21], the LIF neuronal behavior could be practically described by the skyrmion motion on a pre-designed three-terminal nanotrack device as shown in Figure 2. More practical functionalities of the SNN system, for example, the winner-takes-all module, have also been explored [28].

2.3. Skyrmion-Based Synapse

Analog memory is one of the essential properties of synaptic devices. We may consider using magnetic domain walls (DW) [30] to realize multistage synaptic devices in the field of spintronics. However, DW has the characteristics of random pinning/depinning, at the same time, it requires a relatively high threshold current during movement, which will have a bad impact on the performance of the devices. This does not necessarily follow as skyrmions have particle-like and rigid-body characteristics [26], which allow the number of skyrmions to be increased in a certain area, promising to become a new generation of storage devices [17].

Here we propose a new type of skyrmionic synaptic device composed of a heavy metal (HM, e.g., Pt), a FM layer (e.g., Co), and an energy barrier, as shown in Figure 3b. The skyrmions move on the nanotrack formed by the FM layer and the HM layer, and DMI exists at their interface. The artificial energy barrier divides the nanotrack into pre-synapse and post-synapse areas, which has a higher PMA than FM. Figure 3 illustrates an analogy between the biological synapse (Figure 3a) and the skyrmion-based synapse (Figure 3b). When the received signals (impulses) of pre-neuron reaches a threshold, certain Ca²⁺ or Na⁺ channel open, and neurotransmitters are released into the biological synapse region. Then, the post-neuron will change its conductance when the ions are received. Similarly, the skyrmion-based synapse changes its conductance due to the skyrmion generation and migration process when the input stimulus signals are received. Therefore, the electric-current-controlled accumulation and dissipation of skyrmions can imitate the variations of synaptic behavior with the weights proportional to the number of skyrmions.

3. Proposed Architecture

All-Skyrmion SNN Architecture

In order to utilize the proposed skyrmionic devices, we construct a full-skyrmion subarray to generate the pattern recognition result. Figure 4 illustrates an example of the proposed full-skyrmion SNN subarray structure (3 × 3), which consists of the skyrmion-based synaptic array to store the synapse weight and the LIF neurons with a current amplifier connection. Herein, there are three pre-neurons (pre-N₁, pre-N₂ and pre-N₃, not shown in the figure) and three post-neurons (post-N₁, post-N₂ and post-N₃₎. The nine synapses were designed to connect the corresponding pre- and post-neurons through four switch transistors in each cell. For instance, the pre-synapse region of synapse S₁₁ was connected to pre-N₁ through transistors T₁ and T₂ while the post-synapse region was connected to post-N₁ through transistors T₃ and T₄. Thus, the synaptic weight was expressed by the number of skyrmions in S₁₁. The spiking current channel will not be closed until the post-neuron spike or a reset signal. The synaptic weights can modulate the spike voltage V_spike from the pre-neuron, which is then transmitted to the post-neuron via the current amplifier. It should be noted that the synaptic weight is constant during this process. Once the post-neuron spikes, the synaptic device shifts to the learning pattern, and the skyrmions are driven, causing the number of s skyrmions in the post-synapse region to change, as well as the synaptic weights. This designed synaptic array can also map convolutional and fully-connected layers of artificial CNNs and DNNs with spiking neurons and interconnecting synapses.

Based on the subarray structure, we have designed a full-skyrmion SNN engine as shown in Figure 5. Figure 5a shows the top-level skyrmion-based SNN architecture, which contains multiple processing units (PU), IO interface, pre-processing module, post-processing module, and global control units. At this level, the pre-processing module will accomplish the data caching and convert the analog data into a digital domain if necessary. Then the input data will be transferred to each PU to complete the operation with the weights which have been trained offline and mapped into the PU array through an H-tree method. With a group of partitioned PUs, the SNN engine could be able to hold the large network structure for different applications and take multiple input data to generate independent outputs simultaneously. After the operation, the firing spike will be collected by the post-processing module and transferred to the next layer. One should note that Figure 5b shows a PU containing multiple subarray units (SU) with PU buffer and accumulation and output buffer. Within a PU, the routers will receive the input data from the PU buffer, simultaneously making it possible to communicate among SUs and transfer partial sums from SUs to accumulation units.

4. Simulation and Discussion

In order to evaluate the feasibility of the proposed skyrmion SNN for pattern recognition tasks, a systematic device-circuit-architecture simulation was conducted.

4.1. Micromagnetic Simulation

To gain insight into the skyrmion motion and LIF behavior in the nanotrack, we used the OOMMF [31] software to conduct micromagnetic simulations by solving the Landau–Lifshitz–Gilbert (LLG) equation as (3):

$$\frac{dm}{dt}=-\gamma m\times h_{\mathrm{eff}}+\alpha \left(m\times \frac{dm}{dt}\right)-\frac{\gamma \hslash P{j}_d}{2{\mu }_{0}e{M}_s{t}_f}\left[m\times \left(m\times m_p\right)\right]$$

(3)

Table 1. Key parameters in simulation.

Parameter	Description	Value
MS	Sat. magnetization	580 kA/m
A	Exchange constant	15 pJ/m
D	DMI factor	3 mJ/m2
α	Gilbert damping factor	0.3
Ku0	Magnetic anisotropy	0.7 MJ/m3
P	Spin polarization	0.4
l × w	Length and width	300 nm × 80 nm

lists some key parameters in the simulation and shows their values. Gilbert damping $\alpha =0.3$, exchange stiffness $A=15\mathrm{pJ}/\mathrm{m}$, spin polarization $P=0.4$, saturation magnetization $M_s=580\mathrm{kA}/\mathrm{m}$, and DMI value $D=3\mathrm{mJ}/{\mathrm{m}}^2$. Furthermore, the PMA value of the nanotrack satisfies a linear relationship, i.e., $K_u\left(l_x\right)=K_{u0}+\Delta K_u\cdot l_x$, in which $K_{u0}=0.7\mathrm{MJ}/{\mathrm{m}}^3$, $\Delta K_u$ is the PMA increasing rate at $7.0\times {10}^{-4}\mathrm{MJ}/{\mathrm{m}}^3·\mathrm{nm}$, and $l_x$ is the relative distance from the nanotrack origin. References [21,22] give a more detailed description of the micromagnetic simulation.

The simulation results with square wave excitations was shown in Figure 6. The amplitude of the current density is referred to as the I_drive with the same frequency (T = 0.4 ns, duty ratio r = 0.5) selected at point O indicated as the red point in the top view of the structure in Figure 6. The skyrmion is initially nucleated at an origin site (X_c ≈ 40 nm) and then moves forward along the nanotrack. Under 8$J_0$, the skyrmion will overcome the repulsive force and move forward, which corresponds to the “integrate” process of the LIF neuron. During the interval of two contiguous excitation signals, the skyrmion will go backward, which corresponds to the “leaky” process of the LIF neuron model. Finally, since 8$J_0$ exceeds the skyrmion depinning current density, with the continuous arrival of the excitation signals, the skyrmion will arrive at the detection point C in about three periods and be detected by the read head, which corresponds to the “fire” process. However, as the current intensity decreased from 8$J_0$ to 5$J_0$, the time consumed to reach the detecting point increased. The skyrmion in the first track has reached the detecting point C while the other three are at 100 nm, 87 nm, and 60 nm, respectively. Specifically, as the I_drive dropped below 3$J_0$, the skyrmion may never be detected since the driving force and repulse force have reached an equilibrium. The results show that the skyrmion neuron can successfully emulate the LIF function of biological neurons.

4.2. System Simulation

In this section, we estimated the area, latency, and energy of our deep SNN prototype by deploying 8-layer VGG-8 on CIFAR-10 with 1000 selected images. Based on the device model, we developed a deep SNN hierarchical framework starting from device to array architecture with NeuroSim [32]. If readers are interested in or have doubts about how deep SNNs conduct supervised training, you can refer to [33], which has specific instructions. The pre-trained weights have been configured into the SUs in advance by importing the network structure config file. The detailed comparison with SRAM is shown in

Table 2. Validation performances for different devices *.

Device	Area (mm2)	Dynamic Energy (μJ)	Leakage Energy (μJ)	Latency (μs)	Energy Efficiency (TOPS/W)
Skyrmion SRAM	29.58	76.60	65.74	625.45	4.33
	55.76	174.23	230.32	726.57	1.52

* Data were calculated under 40 nm technology node and SU size of 32 × 32.

with numerical results including area, system throughput, computation time, and energy consumption. To maximize the utilization of computing resources, we analyze the detailed utilization of the proposed skyrmion subarray design in Figure 7a. The utilization rate will reach the highest value of 99.29% when the size of SU is 32 × 32. Compared to SRAM, the proposed skyrmion-based implementation is times smaller power. In addition, we also analyze the dynamic energy, latency, and leakage energy distribution on different layers. Results in Figure 7b–d show that Conv-2 consumes the most dynamic energy of 38%, the most latency of 59%, and the most leakage energy of 61% of the total. For the throughput performance, we use TOPS (Tera operations per second) to evaluate all the implementations. For energy efficiency, the skyrmion device achieves 4.33 TOPS/W, 2.85 times better than the SRAM. In area efficiency comparison, the skyrmion device is 2 times better than the CMOS-based implementation.

5. Conclusions

The energy and area overhead in large-scale SNN has motivated the utilization of magnetic skyrmion as promising information carriers to replace the electrons. In this paper, we proposed an all-skyrmion spiking deep neural network architecture to mimic the function of neurons and synapses for pattern recognition tasks. The synaptic weight can be changed by regulating the number of skyrmions with current and micromagnetic simulation to verify the LIF behavior of the proposed skyrmionic neuron. Moreover, we have evaluated the area, delay, and energy of the deep SNN prototype and compared it with SRAM in detail. The results show that our proposed skyrmion-based implementation outperforms SRAM with better energy and area efficiency. The result indicated that ultra-low current switching of skyrmionic devices has the potential for low-power-consumption application, suggesting new possibilities for exploiting it in deep SNN architectures. Although magnetic skyrmions have great application potential, many problems including material limitation and experimental detection must be solved before they can be used in practice. At present, skyrmion-based SNN is still in its infancy. Future research should give full play to the advantages of skyrmions, develop new SNN architectures with higher reliability and lower energy consumption, and find more suitable application scenarios.