Silicon Surface Nanostructuration with Symmetric Cathode Configurations for Photonic Devices

Abstract

The physical properties of porous silicon (PSi) can be adjusted to provide a better performance in optoelectronic devices. A controlled method commonly used to fabricate PSi is the anodization process, which employs platinum as a conventional cathode. Herein, we investigate the effect of replacing the Pt cathode with symmetric heavily doped silicon on the resulting surface structure on silicon substrates. The symmetric configuration is established when both anode and cathode are from the same material. Three different samples were anodized using both configurations and under different fabrication conditions. The results demonstrate the possibility to produce porous silicon structure using the heavily doped Si as alternative to the expensive Pt counter electrode. Furthermore the modified configuration offers the possibility of manufacturing large areas of nanostructured PSi without limitation of the counter electrode area and the applied current density. The formed porous structures using Si cathode have better uniformity, larger pore size, and lower number of interlinked and shallow holes than traditional methods. The porous structures fabricated with this configuration show broadband reduction in spectral reflectivity and changes in the schottky diode dark characteristics when compared with PSi fabricated with Pt conventional electrode.

1. Introduction

Besides bulk processing, the physicochemical properties of silicon can be customized for specific applications by altering its surface [1]. Porous silicon (PSi) is a highly adaptable material with diverse applications, especially in the biomedical and photonics fields [2,3]. Its utility stems from its ability to be easily adjusted to meet specific electrical, optical, and thermal requirements [4,5]. For instance, several sensing devices leverage the optical and electrical properties of PSi to detect variations in chemical and biological samples [6], including even minute changes in gas molecules through surface modifications [7].

In photonics, PSi is incorporated into gamma ray detectors [8], photonic crystals [9,10], and waveguides [11]. The characteristic photoluminescence and efficient light trapping capabilities of PSi make it ideal for use in next-generation solar cells and photodetectors [12,13,14,15].

There are several effective techniques for creating porous silicon, including metal-assisted chemical etching [16], reactive ion etching [17], the sulfur-template method [18], metal-assisted electrochemical etching [19], and electroless chemical etching [20]. Most of these methods rely on dry etching or electrochemical processing [1]. Dry etching requires a hard mask to define the pore structure, whereas electrochemical methods use hydrofluoric solutions and an external power source to drive the reaction [21]. Since the first discovery of PSi in 1950s [22], there is an intensive research efforts to investigate the effect of each parameter of the electrochemical process of silicon surface [23,24,25]. The electrochemical process can be fine-tuned by adjusting the etching current density (J), etching time (t), temperature, and electrolyte composition [3,23]. The main advantage of this process is the ability to produce porous silicon using a diluted electrolyte of hydrofluoric acid (HF) [23].

The parameters of the electrochemical process can be divided into two main categories, the electrical and chemical parameters [26]. The chemical part of the process include the mix of hydrofluoric acid (HF) with other solvents such as ethanol (ETOH) and dimethylformamide (DMF). The concentration and percent of each solvent are the main parameters for this mixture [27]. Focusing on the electrical parameters, we found that the anode and cathode type and their shapes greatly affect the current distribution on the substrate surface and result in diverse nano/micro structures [28,29]. In this aspect, the conventional electrochemical reaction setup has the following design: counter electrode (metal)/electrolyte/working electrode (substrate). If the substrate is from a poor conductive material, such as silicon, we apply an ohmic contact to enhance the electrochemical reaction. Then, the final setup becomes as follow: metal/electrolyte/substrate/metal. When applying this configuration to silicon substrates, the electrolyte typically consists of an HF solution. As a result, the cathode material must be an inert metal that can withstand this corrosive acid. This resulted in limited options for the cathode material, with platinum (Pt) as conventional choice [24,30]. Consequently, the fabrication on large scale is limited because of the high cost of Pt electrodes. Exploring alternatives for this crucial component of the electrochemical cell could enable scalable and cost-effective fabrication of these layers. Moreover, it could result in variations in the characteristics of the fabricated layers. Scaleable fabrication, cost-efficiency, and structural variations all have an impact on the physical properties of PSi and its potential applications.

Current work presents a cost-effective modification in the electrochemical etching process that can produce a large area nanostructured PSi layer with better uniformity. The main idea is to employ heavily doped silicon wafers as a counter electrode instead of expensive Pt wires to have a symmetric anode/cathode setup in the form: Al/Si/electrolyte/Si/Al. With this setup only silicon surface is exposed to the electrolyte through the holders aperture. With the electrical driven chemical etching the anode surface converted to nanostructure while maintain the cathode surface at minimum etching rate. Following the brief introduction, Section 2 provides detailed information about the fabrication setup and materials. In Section 3, we present the morphology, optical, and electrical analysis of the fabricated samples. While a general conclusions are summarized at the last section.

2. Materials and Methods

The porous layers were fabricated on the surface of one side polished boron-doped p-type crystalline silicon wafers (surface roughness of the order of 0.1 nm), with orientation <100>. The anodization method was employed to grow porous structures on the polished side, while the other side, coated with aluminum (Al) via electron beam evaporation, serves as the bottom contact. For Al evaporation, the base pressure was 1.25 × 10⁻⁵ mbar and the evaporation time was 4 min, resulting in 150 nm-thick Al thin films, measured by the machine thickness monitor. The Al thin films were subsequently annealed by rapid thermal processing (RTP) in nitrogen atmosphere for 5 min to turn the initial rectifying behavior into ohmic. The silicon samples with an area of 1.5 × 1.5 cm² were mounted in Teflon holder with a circular aperture of 1.23 cm². The electrolyte for each case is a mix from HF and ETOH or DMF. The samples properties and the anodization parameters are summarized in

Table 1. Summary of fabrication parameters.

Substrate Resistivity (${\mathit{\rho }}_{\mathit{s}}$)	Etching Solution	J (mA/cm2)	t (s)
S1 = 0.01–0.02 $\Omega$·cm	HF 48%: ETOH 99% (1:2)	80	14
S2 = 0.8–2 $\Omega$·cm	HF 48%: ETOH 99% (1:2)	20	100
S3 = 25–30 $\Omega$·cm	HF 48%: DMF 98% (1:6)	20	200

.

Before the etching process, the substrate was cleaned by immersing it in ethanol to remove any organic contamination, then rinsed with water and dried. The fabrication process of the experimental setup is schematically described in Figure 1. The intended samples were etched using the conventional Pt and heavily doped Si wafer (${\rho }_s$ = 0.01–0.02 Ω·cm) as counter electrodes. The geometry and electrode type has some effects on the fabricated structure. The geometry of Pt electrode is a wire with 1mm diameter, forming the following setup: Pt/electrolyte/Si/Al with none symmetric conductivity surfaces exposed to the electrolyte. While the heavily doped Si with the same area and holder aperture used in the second case form the following setup: Al/Si/electrolyte/Si/Al with symmetric conductivity surfaces exposed to the electrolyte. The anodization cell were controlled using potentiostat with constant current mode. Two etching current density values were used for both cell setups to form different nanostructured surface on silicon samples namely 20 mA/cm² and 80 mA/cm². The selection of the time and the etching current density depends on the resistivity of Si substrate [31,32,33,34]. In the case of low doped silicon (${\rho }_s$ = 25–30 Ω·cm) we used illumination with halogen lamp (60 W) through a window in the Teflon cell to facilitate the etching process by activating the carriers [34,35]. After the fabrication process, each sample was rinsed with ethanol, followed by deionized water and finally dried with a mild stream of dry nitrogen.

The morphology of the PSi layers was studied by field emission scanning electron microscope (FESEM- XL-40 FEG, Philips, Eindhoven, Netherlands). An energy dispersive spectroscopy X-ray analyzer (EDS, Inca X-sight 7558, Oxford Instruments, London, UK) coupled to the microscope was used to determine the elemental compositions of the samples. The Optical characterization in the UV-visible range (250–900 nm) was performed using a Jasco V-560 double-beam spectrophotometer equipped with an integrating sphere to avoid scattering losses. For insight comparison we select the samples with small pores sizes (S1) for the electrical characterization, An Au circular top contact was deposited using DC sputtering technique on the surface of the PSi layer. The deposition was performed in an argon atmosphere through a patterned mask. The deposition pressure was 2 × ${10}^{-2}$ mbar, and the plasma current was 20 mA, resulting in a thickness of ≈50 nm. The final structure of the fabricated Schottky devices is Al/Si/PSi/Au. The electrical characterization of this junction was carried out using a Bio- Logic SP-150 potentiostat with a scan rate of 5 mV/s and an applied potential in the range of +1.0 to −1.0 V. A homemade cell, which consisted of two movable copper probes with a diameter of 0.5 mm and a copper base (2 × 2 cm²), was utilized for the measurements. The measurements were conducted in a Faraday box to shield them from any external signals.

3. Results and Discussion

3.1. Morphology

It is imperative to note that the morphology of electrochemically etched PSi layers is highly reliant on the fabrication parameters, such as anodization current density, temperature, and HF concentration, among others. Here, we investigate an additional parameter that reveals diverse changes in the silicon surface structure, namely the cathode type. The new cathode configuration and the conventional Pt cathode configuration applied to three different substrate (silicon with different doping levels) to check the global and specific changes in the PSi samples in both setups. Comparison between PSi samples prepared on teh suface of S1 substrate using the Pt and Si electrodes are shown in Figure 2, highlighting the morphology and homogeneity of the nanstructured PSi layer.

As portrayed in Figure 2b for the Pt cathode case the pore size appears to be smaller than those in Figure 2d for the symmetric silicon cathode case. The size of PSi in this sample is quite small, therefore, further analysis of size and distribution is difficult and will not be accurate. More reasonable analysis for size distribution is performed on sample with larger pores size to provide quantitative analysis for pore size and distribution. The first samples S1 reveals in both setups a nanoporous silicon surface (see Figure 2) with quite small pore size in the range of 20–40 nm. It is worth noting that this type of heavily doped silicon is used in photodetectors, then nanoporous surface maybe benefit to confine light at short wavelengths at nanoscale. Although silicon cathode has a higher resistivity when compared with Pt, these images show the successful fabrication of PSi layers using both configurations. The next step is to check the effect of substrate type and electrolyte on the fabricated sample. In each step, we maintain consistent fabrication conditions across both setups for the purpose of comparison. While additional fabrication sets could reveal a range of diverse structures and morphologies, the three selected cases are sufficient to introduce the concept and examine the effects of the Si cathode type.

A quite interesting microstructure surface obtained for the silicon samples S2, namely microflakes and spongy structures (see Figure 3). At large scales (tens of microns) the surface of the sample produced using the Pt electrode looks as a sponge with randomly distributed large holes as in Figure 3a, once we down to the nanoscale a clear spongy surface appears with tiny holes of few nanometers (see Figure 3b,c). Different from this case, the sample produced with the symmetric Si cathode show a surface with microflakes on top as we can see in Figure 3d. At the nanoscale, a spongy surface is visible beneath the microflakes (see Figure 3e,f), resulting in a bilayer surface structure. Although both samples show some uniformity at the microscale, they appear quite random at the nanoscale. In general, porous silicon (PSi) is effective at trapping light, which leads to a reduction in reflectance [36]. Certainly, this microflake structure will lead to a further reduction in reflectivity, as confirmed in the final section of the optical characterization.

A comprehensive analysis of the pore size distribution was conducted for the samples fabricated on S3 substrate. The average pore size of these samples is approximately one micron, making it clear and straightforward to analyze. We used imageJ software (version 1.54g) to count the pore size and distribution in a total analysis area of 44 × 31 = 1396.11 $\mathsf{\mu }$m². The SEM image and their pore size distribution are shown in Figure 4. In Figure 4b, the pore size show a wide plateau and high dispersion in size of image in Figure 4a, indicating low uniformity. The total holes area 316.011 $\mathsf{\mu }$m², this reveals porosity of 22.6% with total number of holes as 707 mostly distributed in a plateau between 330–950 nm.

Another observation from this SEM image is the presence of a large number of shallow and interlinked holes. Moving to the micropores produced by the symmetric silicon cathode in Figure 4c, and its pore size analysis in Figure 4d, we can see that the total area of the holes is 344.3 $\mathsf{\mu }$m², that gives a porosity of 24.68%. Although the total number of holes (694 for this image) and porosity are not so different from the Pt sample, the size distribution is notably different where most of the hole diameters are concentrated around 829 nm. This indicate a more uniform distribution compared with the Pt sample. The number of shallow and interlinked holes is fewer for the symmetric cathode sample. In this third sample we continue to explore the potential of using a Si substrate as cathode in the fabrication of PSi layers and assess its impact on the pore size. As a conclusion, the morphology analysis reveals that using silicon as cathode produce a more uniform and larger pore size distribution, both for nanoscale and microscale sizes. Using certain fabrication parameters and sample type silicon cathode can produce bilayer structure with microflakes/spongy form.

It is important to examine the surface composition of the samples. To this end, we selected the S1 substrate samples for EDS analysis. The results shown in Figure 5a, for the Pt electrode sample and Figure 5b, for the Si electrode sample, where both reveal almost the same composition. Which indicates that we have only a structural modification rather composition changes. We thoroughly examined the morphology of the Si substrate used as a counter electrode after multiple uses in the etching process. The durability of the Si cathode is an important criteria to provide an effective alternative to the inert Pt electrode.

To the naked eye, the Si substrate appears unchanged before and after the anodization process. However, SEM image is a better tool to confirm the maintain of the substrate surface without critical damage. Figure 6 demonstrates the stability of the surface morphology of the used Si electrode. the SEM image for the silicon substrate before anodization in Figure 6a show a smooth surface without any nanofeatures, while that in Figure 6b for the substrate after anodization show a similar surface with some particulates on the surface. This nano roughness on the surface of Si substrate used as cathode can be a result of multiple insertions of the substrate into diluted HF electrolyte. This remarkable stability can be attributed to the minimal impact of the applied current density and short etching time on the Si electrode.

3.2. Optical and Electrical Properties

PSi layers are proposed for optoelectronic applications, so it is straightforward to examine the effect of the modification on the setup on the parameters of a semiconductor junctions. The simple form of these junctions is the ideal diode, for which the current and voltage are related using the following equation [37]:

$$I_D=I_0\left[ex{p}^{{\displaystyle \frac{qV}{n{K}_{B}T}}}-1\right]$$

(1)

where I_D is the dark current, I₀ is the reverse saturation current, n is the diode ideality factor, k_B is Boltzmann constant, and T is the absolute junction temperature. The ideal diode equation assumes that all recombination processes occur via band to band transitions or through traps in the bulk of the device. However, recombination could occur in other areas of the device, leading to losses in the overall performance of the diode. As such, a modified equation used for non-ideal diodes is given by the expression [37]:

$$I_D=I_0\left[ex{p}^{{\displaystyle \frac{qV}{n{K}_{B}T}}}-1\right]+{\displaystyle \frac{V-I{R}_s}{R_{sh}}}$$

(2)

Large values of Rs cause power to be dissipated in solar cells, while low Rsh leads to power losses by providing an alternate current path for the light-generated current. The current - voltage lines for junction of both samples produced by Pt and Si electrodes on S1 substrate are shown in Figure 7a, where the inset is a schematic of the fabricated schottky junctions. The fitting of these two lines to the non ideal diode equations reveals a slight differences in the diode characteristics in each case. The measured electrical parameters confirm that the fabricated junctions are suitable as Schottky diodes for use in optoelectronic devices.

A slight variation in the electrical parameters was observed between the samples prepared with Pt and Si counter electrodes. However, the ideality factor (n) is lower in the case of the device based on the Si electrode during the etching process of the PSi layer. This finding confirms the improvement in the homogeneity and uniformity of the fabricated PSi layers when using an asymmetric electrode, as confirmed by SEM analysis. All parameters are summarized in

Table 2. Schottky diode characteristics for samples fabricated using the two setups.

Samples-S1	I0 (mA)	n	Rs (k$\Omega$)	Rsh (k$\Omega$)
using Pt cathode	4.80 × 10−4	5.44	1.0	42.38
using Si cathode	2.15 × 10−4	4.79	1.08	42.82

. The optical and electrical properties of PSi layers change at different levels of porosity [38,39,40]. A detailed analysis of these characteristics established the correlation between morphology, porosity, and electrical properties of PSi layers anodized using a Pt electrode. As a conclusion a PSi layer consists of air, amorphous silicon, silicon nanocrystals, and silicon dioxide [41,42]. These components are greatly influenced by the structure and porosity of the fabricated layer. The SEM images (see Figure 2, Figure 3 and Figure 4) revealed that the pore size increases in the case of PSi layers fabricated using a symmetric Si electrode. This indicates that the porosity of PSi layers increases when a symmetric electrode is used when compared with samples fabricated using Pt electrode under the same anodization conditions. Consequently, the resulting current is reduced at the same applied voltage for sample S1 prepared using a symmetric Si cathode, as shown in Figure 7a. The decrease in the electrical conductivity at higher porosity is linked to the widening of the band gap of the PSi layer at higher porosity [43].

The porosity and size distribution of PSi layers have a significant impact on spectral reflectance of the samples [44], making it a popular choice for antireflective coatings in optoelectronic devices [2,45]. Reducing optical losses through reflection has a direct impact in improving the overall device performance with maintaing a good electrical conduction. In Figure 7b we can see a broadband reduction in the reflectivity of the sample produced by the Si symmetric cathode when compared with that fabricated using Pt electrode. Another interesting note is that the reflectance dips at the VIS-NIR region is blue shifted while that at the UV is red shifted. The reflectance dip at the UV region is attributed to the resonance effect in PSi and redshifts with the pore size increase [46,47]. The PSi layer consists of air, silicon, and silicon dioxide, forming a compact structure with an effective refractive index. This composition influences the resulting optical response and affects the shift in the interference pattern [48,49,50]. These two features are important when applying such structures in photodetecors and chemical sensors within these spectral ranges.

We did not observe any significant changes in the optical reflectance spectra due to the small diameters of the fabricated nanopores for sample S1. However, Figure 8 shows a broadband reduction in the optical reflectance for the symmetric Si electrode case of the PSi layer on sample S3. This decrease in optical reflectance is attributed to the higher porosity of the PSi layers fabricated by the Si electrode (24.7%) compared to the porosity of the PSi layer fabricated by the Pt electrode (22.6%), as mentioned in the morphology section (see Figure 4).

4. Conclusions

Nanostructuring silicon surface using modified anodization method produce several interesting morphologies that can find applications in many different fields. For example, it can be applied to the development of photonic or optoelectronics devices. Beside to the conventional anodization parameters namely, the applied current density, electrolyte composition, temperature and substrate type, we investigate another important parameter which is the cathode type. The symmetric anode/cathode setup leads to a more uniform and larger pore size distribution compared with structures produced by conventional techniques. Using certain fabrication conditions and substrate type, the Si symmetric cathode reveal bilayer microstructure composed of micro flakes top and spongy structure underneath. The modified setup reduces the number of shallow and interlinked holes that found in samples produced by conventional Pt cathode. The spectral reflectivity is lowered over the entire UV-VIS spectrum with a red shift to the UV reflectance dip and blue shift for the peaks at the VIS-NIR region when using Si cathode. The fabricated PSi structure incorporated in a Schottky diode of the form Al/Si/PSi/Au and the diode parameters were modified when using Si cathode, as for the example the reverse saturation current is reduced to its half value, also, the ideality factor was decreased.

Besides, to the morphology, optical, and electrical changes found in samples produced by the Si cathode the modification in the configuration allows the production of PSi structures on large scale at low cost compared with the conventional setup based on Pt cathode.