An Improved Fabrication Method for Van Der Pauw Mobility Measurement on GaN Epitaxy on Conductive and Non-Conductive Substrates

Abstract

A novel empirical method for fabricating Van der Pauw Hall test samples on GaN epitaxy is proposed and tested, which enables rapid preparation of Van der Pauw Hall test samples on both conductive and non-conductive substrates. Compared to traditional Van der Pauw Hall sample preparation, this approach eliminates the need for annealing to form Ohmic contacts, thereby facilitating more accurate measurement of the resistivity, Hall coefficient, majority carrier concentration, and mobility in semiconductor wafers, which may be subject to change after high-temperature annealing. This method is based on the use of specialized plasma dry-etched patterns to form the Ohmic electrodes, which reduces the metal–semiconductor contact barrier, allowing the tunneling current to dominate and thus forming Ohmic contacts. In the validation experiments, three different substrate materials for GaN-epi—silicon, sapphire, and silicon carbide—were selected for the preparation of the Van der Pauw Hall test samples, followed by testing and analysis to confirm the accuracy of the new test method. The measurement results for the electron mobility and carrier concentration on the sapphire and silicon carbide substrate samples were verified via the contactless RF reflectance mapping method, with an average difference only 4.0% and 7.0%, respectively, and a minimum of only 0.53% and 1.8%. The proposed fabrication method features a relatively simple structure, enabling rapid preparation and avoiding the damage and errors caused by high-temperature annealing processes. It shows great potential for industrial application on precise carrier property measurements, especially for GaN-epi on a conductive substrate.

1. Introduction

Hall effect measurement is a widely utilized technique for characterizing the electrical properties of semiconductor materials [1]. It meets the requirements for measuring key electrical performance parameters of most semiconductor materials, such as the Hall coefficient, resistivity, conductivity type, carrier concentration, mobility, and scattering parameters [2,3].

The essence of Hall effect measurement lies in the phenomenon where the charge carriers in a conductor or semiconductor experience deflection under the Lorentz force when an electric current flows perpendicular to an external magnetic field. When charged particles (electrons or holes) are confined within a solid material, this deflection leads to the accumulation of positive and negative charges in a direction perpendicular to both the current and the magnetic field, thereby generating an additional transverse electric field [4,5]. The resulting potential difference across the material, known as the Hall voltage, is measured along with the current and magnetic field to determine the carrier concentration, carrier type, and other electrical properties of the material [6]. These measurements are crucial for applications such as magnetic field sensing, material research, and electronic device design, providing essential analytical tools and data support. Currently, the common Hall testing methods include variable temperature Hall measurement, non-contact Hall measurement, and alternating current (AC) field Hall measurement [7,8,9].

Non-contact Hall measurement, which operates on the principle of coupling fixed-frequency microwaves with a specific waveguide network, enables rapid and accurate determination of sheet resistance and carrier mobility [10,11]. A key advantage of non-contact Hall measurement is that it is a non-destructive test method with the ability to perform multi-point testing across an entire wafer without the need for device fabrication or Ohmic contact formation [12,13]. However, non-contact Hall measurement is only applicable to highly resistive substrates and cannot be used to measure heteroepitaxial epitaxial layers on conductive substrates [14]. This is because the low resistivity of the conductive substrate itself can dramatically affect the test results of the epitaxial layer. Therefore, for GaN power devices grown on conductive silicon substrates, non-contact measurement methods are not applicable. Consequently, the most commonly used Hall testing method remains the contact-based Van der Pauw method [15].

The Van der Pauw method provides a high-accuracy measurement capacity, effectively eliminating the contact resistance effects and demonstrating broad applicability across diverse sample configurations. The method involves measuring the voltage changes under a constant magnetic field while varying the direction of the applied current to determine the sheet resistance and the Hall coefficient, from which the mobility is calculated [16,17]. The Van der Pauw method requires the following conditions [18]: electrodes must be placed at the perimeter of the sample, the sample must be homogeneous and of uniform thickness, and the sample must form a singly connected region without isolated holes. To minimize the computational errors, the entire wafer is often cut into flat, uniform pieces, and electrodes are fabricated at the four corners to form Ohmic contacts, which increases the complexity of the sample preparation. However, the Van der Pauw method is not without limitations. The sample needs to be diced into small pieces, and the thermoelectric potential accumulation caused by Joule heating may affect the measurement results [19,20].

An Ohmic contact is a low-resistance electrical junction between a metal and a semiconductor, characterized by a linear and symmetric current–voltage relationship, allowing current to flow freely in both directions with minimal voltage drop. It is essential to form an Ohmic contact in order to obtain accurate mobility and carrier density measurement data. However, for wide band-gap material such as GaN, annealing is the process necessary to form a good Ohmic contact. The choice of annealing temperature is critical, as it directly affects the performance of the Ohmic contacts and the property of GaN two-dimensional electron gas (2DEG). If the annealing temperature is too low, the diffusion rate of the atoms is insufficient to form a transition layer of adequate thickness and quality, resulting in a limited reduction in the contact resistance and suboptimal Ohmic contact performance. Conversely, if the annealing temperature is too high, it may degrade the AlGaN/GaN interface, thus degrading the quality of the 2DEG. The annealing temperature for Ohmic contacts is typically fine-tuned according to the composition of the electrode metal, while balancing metal contamination and contact performance. The conventional annealing temperature ranges from approximately 400 to 1000 °C, which enables better edge definition while ensuring contact performance. Moreover, excessive atomic diffusion during the high-temperature process may lead to the formation of undesirable compounds at the metal–semiconductor interface, which often exhibit poor electrical properties. This can increase the contact resistance or even degrade the metal–semiconductor interface, causing Ohmic contact failure [21,22,23,24]. Last but not least, conventional high-temperature annealing processes can introduce oxygen and nitrogen defects on the surface of AlGaN/GaN materials, leading to trap effects [25,26] that impact the original electron density and mobility of the 2DEG and lead to a large error in the characterization results. Therefore, developing a process that achieves Ohmic contacts without annealing is of significant research interest. Our new method totally eliminates the need for annealing, which simplifies the process and prevents possible material damage due to a high temperature.

In addition to the potential impact of annealing on the actual mobility of the material, traditional van der Pauw samples are typically not subjected to edge isolation during the preparation process [27]. This often introduces errors in the measurement of the GaN epitaxial layers on conductive substrates: since the samples need to be diced to meet testing requirements, the epitaxial film at the edges of the sample has a high probability of forming conductive paths with the substrate through cutting defects or debris particles. As a result, the measurement reproducibility of traditional sample preparation methods is poor.

In this study, a specialized photolithographic pattern was designed at the Ohmic contact regions to enhance the contact area between the Ti/Al electrode metal and the AlGaN/GaN layer, thereby achieving Ohmic contacts without the need for annealing. This approach successfully reduced the difficulty of Ohmic contact fabrication and avoided the defects and instabilities associated with conventional high-temperature annealing processes, enabling the realization of Ti/Al Ohmic contacts for GaN high-electron-mobility transistors (HEMTs) without annealing. Without undergoing annealing, excellent Ohmic contacts were achieved, meeting the requirements for engineering production testing. Additionally, isolation was implemented at the sample edges using dry etching, preventing conduction between the epitaxial film and the substrate at the edges and significantly improving the measurement reproducibility of the samples. This study systematically investigated and validated the feasibility of achieving Ohmic contacts using this structure on sapphire, silicon carbide, and silicon substrates. The results were verified through testing and analysis of the carrier concentration and mobility, sheet resistance, and microstructural characterization.

2. Materials and Methods

In this paper, the principle of the tunneling effect is primarily utilized to fabricate Ohmic contacts on GaN-epi wafers. When a metal contacts a semiconductor, a Schottky barrier forms at the interface due to the work function difference. Under high doping concentrations, the barrier width becomes sufficiently thin to enable a significant electron tunneling current. A schematic diagram of the band is shown in Figure 1. Furthermore, the etching process employed in this paper introduces substantial sidewall defects into the barrier layer, which facilitates additional tunneling pathways for electrons to access the 2DEG. This tunneling current can even surpass the thermionic emission current, becoming the dominant component of the total current. When the tunneling current predominates, the contact resistance can be significantly reduced. Consequently, when the semiconductor undergoes etching and heavy doping, its contact with the metal can form a near-ideal Ohmic contact.

Through the design of specialized photolithographic patterns, dry-etching processes, and optimization of the thin barrier layer, this study enhanced the tunneling contact area. By effectively reducing the metal–semiconductor contact barrier without the need for annealing, the field emission tunneling effect between the metal and the 2DEG is significantly strengthened, achieving high performance Ohmic contacts. Furthermore, during the fabrication process, edge isolation was achieved through dry etching, which addressed the issue of potential conduction between the epitaxial film and the substrate at the sample edges. This approach significantly enhanced the measurement reproducibility of the samples.

To validate the feasibility and stability of the novel Ohmic contact electrode fabrication method, identical epitaxial structures were prepared on three different substrates: Si, SiC, and sapphire. The epitaxial structure is illustrated in Figure 2a. The sample consists of a 12 mm × 12 mm square substrate, with 1 mm × 1 mm square Ohmic contacts fabricated at the designated positions. The AlGaN/GaN epitaxial layers were grown on these substrates using metal–organic chemical vapor deposition (MOCVD) by Suzhou Hanhua Semiconductor Co., Ltd. The epitaxial structure adopted a structure similar to that of Li et al.’s research [28], consisting of a GaN buffer layer, a 300 nm UID GaN channel, a 1 nm AlN intermediate layer, a 23 nm Al_0.2Ga_0.8N barrier layer, and a GaN cap layer. During the growth of the heterostructure, an additional approximately 1 nm AlN thin layer was grown between the GaN and AlGaN as a transition layer to reduce the interface roughness, suppress electron scattering effects at the heterojunction interface, and ultimately improve the mobility of the 2DEG. Subsequently, metal electrodes were fabricated on the epitaxial wafers to form Ohmic contacts. Optical microscope images of the metal electrodes are shown in Figure 2b,c.

Figure 3 illustrates the fabrication process for the Ohmic contacts in the AlGaN/GaN HEMTs. After cleaning the samples with N-methyl-2-pyrrolidone (NMP) at 70 °C, the epitaxial wafer surface was treated with hexamethyldisilazane (HMDS) to enhance adhesion. A 5214 positive photoresist was spin-coated onto the surface, followed by baking and exposure using a suitable photomask. The sample was then immersed in ZX-238 positive photoresist developer for 30 s, leaving the unexposed photoresist on the surface to form a mask. Dry etching was performed using Cl-based (Cl₂ + BCl₃) plasma to etch grooves approximately 100 nm deep into the exposed GaN-based epitaxial film, enabling direct contact between the electrodes and the 2DEG in the channel, while also achieving edge isolation. Finally, a negative photoresist was used, and after photolithography and development, a Ti/Al alloy with a thickness of 10–800 nm was evaporated under vacuum conditions at 150 °C and 6 × 10⁻⁴ Pa. Following fabrication and cleaning, the van der Pauw method with probe testing was employed to measure the sheet resistance, carrier concentration, and mobility of the semiconductor.

The microstructural characteristics of the anneal-free Ohmic contacts were investigated using scanning electron microscopy (SEM), as shown in Figure 4. It can be observed that a specialized photolithographic pattern was employed at the Ohmic electrodes, featuring an array of uniformly arranged small square holes with a length of 1 µm. By utilizing Cl-based plasma dry etching, grooves were etched into the exposed GaN-based epitaxial film, significantly increasing the sidewall area and enhancing the contact area between the Ti/Al electrode metal and the AlGaN/GaN layer. Additionally, the etched regions exhibited a 45°inclination angle, facilitating direct contact between the Ti/Al metal and the 2DEG. The SEM images of the metal–semiconductor interface in the Ohmic contact samples reveal deep diffusion of the metal into the semiconductor, forming discontinuous metal islands. The N vacancies formed by the reaction between Ti/Al and AlGaN/GaN create heavily doped regions near the metal islands, which are directly connected to the 2DEG channel of the material, establishing efficient current transport pathways.

The reaction between the Ti/Al metal and the AlGaN was limited, necessitating the etching of the AlGaN barrier layer to enhance the field emission tunneling effect. In conventional HEMT samples, the excessively thick barrier layer impedes the tunneling of electrons from the metal to the 2DEG channel, making it impossible to form Ohmic contacts without annealing. In contrast, etching enabled the barrier layer to be thinned down to an appropriate thickness in this study and the heavily doped regions formed by Ti/Al and AlGaN were in close proximity to the 2DEG channel. This allowed electrons to more easily tunnel from the metal into the 2DEG channel. Although metal diffusion into the semiconductor material is limited without annealing, the unique structural design differentiated itself from the traditional method by enabling the 2DEG to directly contact the source and drain metals through the GaN channel layer, which had a lower electron barrier, rather than through the wider band-gap AlGaN barrier. This reduced the metal–semiconductor contact barrier, allowing electrons to tunnel through the sidewalls of the metal–semiconductor interface. The design incorporates a large contact sidewall area, further enhanced by the etching angle, which significantly increases the contact area for tunneling between the metal and the 2DEG, thereby markedly strengthening the tunneling effect. Moreover, since the barrier layer was not entirely etched away, the material channel adjacent to the metal region maintained a high density of 2DEG. However, the partial etching of the 2DEG channel reduced the effective contact area for electron transport from the metal to the 2DEG channel, leading to a slight increase in contact resistance, as corroborated by the testing results.

3. Results and Discussion

3.1. Feasibility Analysis

Following the cleaning of the metallized AlGaN/GaN HEMT samples, Hall effect measurements were conducted on both the conventional and modified Van der Pauw samples using a Toho HL9900 system. The measurements were performed under controlled environmental conditions with the temperature maintained at approximately 300 K and the relative humidity ranging between 47% and 55%. The Toho HL9900 has a clear error range (±1%) in magnetic field strength, and the final measurement error is within 5%. Six samples from each group were selected from the same wafer, spanning from the edge to the center and back to the edge.

As presented in

Table 1. Improved and conventional Van der Pauw Hall measurement test results for samples with Si substrates.

Sample Number		Conventional Van Der Pauw Method			Improved Van Der Pauw Method			Rate
		Rs, ohm/sq Mob, cm2/V·s Ns, /cm2			Rs, ohm/sq Mob, cm2/V·s Ns, /cm2			Rs Mob Ns
Si	1	351.3	1.65 × 103	−1.074 × 1013	407.6	2.01 × 103	−7.610 × 1012	13.8%	17.9%	41.1%
	2	377.1	1.87 × 103	−8.867 × 1012	401.2	2.01 × 103	−7.761 × 1012	6.0%	7.0%	14.3%
	3	381.8	1.89 × 103	−8.647 × 1012	416.9	2.03 × 103	−7.382 × 1012	8.4%	6.9%	17.1%
	4	383.3	1.92 × 103	−8.481 × 1012	412.6	2.03 × 103	−7.482 × 1012	7.1%	5.4%	13.4%
	5	364.2	1.73 × 103	−9.920 × 1012	407.7	2.02 × 103	−7.595 × 1012	10.7%	14.4%	30.6%
	6	377.9	1.87 × 103	−8.784 × 1012	400.4	2.01 × 103	−7.785 × 1012	5.6%	7.0%	12.8%
Standard deviation		12.42	106.66	8.93 × 1011	6.39	9.83	1.56 × 1011

, the conventional Van der Pauw measurements yielded sheet resistance values ranging from 351.3 to 383.3 ohm/sq, with the mobility varying between 1.65 × 10³ and 1.92 × 10³ cm²/V·s, and the carrier concentration spanning 8.481 × 10¹² to 1.074 × 10¹³ cm⁻². Comparative analysis with the modified Van der Pauw sample showed an average decrease of 9.8% in mobility and an average increase of about 8.6% in sheet resistance, with sample “Si 1” exhibiting the most significant deviations of 17.9% and 13.8%, respectively. The modified samples demonstrate substantially improved parameter stability, as evidenced by their significantly reduced standard deviations. Specifically, the sheet resistance, mobility, and carrier concentration exhibit standard deviations of only 6.39, 9.83, and 1.56 × 10¹¹, respectively. These values represent a notable reduction compared to the conventional samples, which show substantially higher standard deviations of 12.42, 106.66, and 8.93 × 10¹¹. The standard deviation in the conventional Van der Pauw measurements primarily originates from two samples located at the wafer edge. This pronounced discrepancy may arise from multiple factors, including the non-uniform annealing temperature distribution and potential edge shorting induced by sample dicing. The markedly narrower data distribution indicates superior consistency in the improved samples. Notably, while maintaining superior average mobility of 2.02 × 10¹³ cm²/V·s and an average carrier concentration of 7.544 × 10¹² /cm², the modified structures showed an 21.5% reduction in the carrier concentration relative to the conventional samples.

Among the conventional samples, “Si 1” and “Si 5” demonstrate considerable fluctuations. The variation rates of the carrier concentration reach 41.1% and 30.6%, respectively, while the mobility decreases by 17.9% and 14.4%. These variation rates are significantly higher than those observed in the same batch of samples. The reduction in mobility is likely attributed to excessive annealing, which introduces a higher concentration of impurities and consequently degrades the quality of the 2DEG interface. Additionally, these samples are located at the periphery of the device, where the epitaxial structure may exhibit certain defects. These defects lead to the inferior electrical performance of the samples, resulting in lower mobility compared to that of the wafer center. Therefore, in routine analysis, data with excessively large discrepancies should be excluded to ensure the accuracy of the results. The improved samples, which were not subjected to annealing, effectively circumvent the potential errors introduced by the annealing process. Consequently, the measured data exhibit enhanced stability, with a significantly reduced range of variation and improved accuracy.

The primary reason for the decreased carrier concentration in the improved samples, as compared to the traditional samples, is that the conventional method, which involves annealing, artificially elevates the carrier concentration and reduces the sheet resistance. Thus, the true carrier concentration of the samples is more accurately reflected in the test results of the improved samples. The instability associated with annealing broadens the distribution range of the sheet resistance, mobility, and carrier concentration among the samples. This results in varying degrees of variation and significant performance degradation in some samples.

These findings indicate that the improved Van der Pauw method exhibits a narrower variation range and provides more accurate measurements of the sheet resistance, mobility, and carrier concentration compared to the traditional method. In traditional method testing, it is essential to screen and filter out samples with large individual errors to ensure the reliability of the measurement data. In contrast, the improved method can bypass this step, thereby enhancing the efficiency and accuracy of the analysis.

The modified Van der Pauw samples, fabricated without annealing, maintained high mobility while keeping the sheet resistance within an acceptable range. Most significantly, they preserved the sample stability and integrity, fulfilling the industrial requirements for rapid preparation and testing while preventing structural damage. The observed trade-off in the carrier concentration represents an acceptable compromise given the significant improvements in the measurement consistency and repeatability. Comparative Hall effect measurements between the conventional and modified Si substrate samples confirmed that the modified structure successfully forms functional Ohmic contacts on silicon substrates without requiring annealing.

3.2. Annealing Effect

This paper investigates the influence of annealing processes on epitaxial structures. The samples were placed in an N₂ environment and subjected to rapid thermal annealing at 800 °C for 60 s to simulate conventional semiconductor device annealing operations. A comparative analysis of the non-contact Hall measurement results before and after annealing is presented in Figure 5.

In the measurement results before annealing, the measured sheet resistance of the central region of the same sample is higher compared to the edge, with a maximum increase rate of 10.43%. Conversely, the measured mobility in the central region is lower relative to the edge, with a maximum reduction rate of 3.07%. The carrier concentration in the edge region also shows a slight decrease compared to the center, with a maximum reduction rate of 4.86%. The non-uniform distribution of mobility may be attributed to several factors. The density of the defect states in the material can influence the carrier mobility. A higher defect density increases the likelihood of carrier trapping during movement, leading to reduced mobility. Additionally, the non-uniform distribution of the defects within the material can cause spatial variations in the carrier mobility, potentially resulting in inconsistent performance in semiconductor devices. Annealing exacerbates the difference rate between samples. After annealing, the maximum increase in the sheet resistance in the central region compared to the edge is 20.4%, the maximum decrease in mobility is 5.1%, and the maximum increase in carrier concentration is 6.4%.

The data indicate that the minimum change in the value of the sheet resistance at the same point before and after annealing is 0.3%, while the maximum change is 7.0%. The smallest change occurs at the edge of the sample, while the largest change is observed at the center, with significant spatial variations in the rate of change. Overall, the sheet resistance demonstrates a decreasing trend. The mobility shows a minimum variation of 2.9% and a maximum variation of 3.4%. The overall trend is a decline, with more pronounced variations at the edges and non-uniform changes across different regions. The carrier concentration varies minimally by 2.3% and maximally by 7.1%, with both the smallest and largest changes occurring at the sample edges, displaying an overall increasing trend.

The annealing process positively affects the carrier concentration and sheet resistance, improving both the average and maximum carrier concentrations while reducing the sheet resistance values. However, a notable decrease in mobility is observed, adversely impacting the electrical properties of the material. This can be attributed to the annealing-induced repair of defects, rearrangement of impurity atoms, and dislocation realignment within the material, leading to an enhanced carrier concentration and reduced sheet resistance. Conversely, the degradation in mobility is associated with the deterioration of the 2DEG interface quality due to annealing.

Additionally, annealing results in broader mobility distribution, non-uniform variation amplitudes, excessive differences in certain localized regions, and performance degradation. This suggests that while annealing improves the contact properties of the sample, it may also introduce instability. Inhomogeneities within the material or the uneven effects of impurities introduced during annealing could lead to spatially non-uniform mobility variations, reducing the overall stability of the sample and potentially impacting the device performance in practical applications. Notably, the anomalous increase in mobility at certain edge points further supports this observation.

Therefore, in order to ensure the overall performance stability of semiconductor devices, it is necessary to design Hall test samples that do not require annealing. The improved fabrication method for Van der Pauw mobility measurement eliminates the need for annealing while achieving reliable Ohmic contact and maintaining measurement accuracy.

3.3. Accuracy Analysis

To verify the accuracy of the improved preparation method, SiC and sapphire substrates were prepared and measured for comparison. The measurement results, as summarized in

Table 2. Improved Van der Pauw Hall measurement and LEI test results for samples with SiC and sapphire substrates.

Sample Number		Improved Van Der Pauw Method			LEI			Rate
		Rs, ohm/sq Mob, cm2/V·s Ns, /cm2			Rs, ohm/sq Mob, cm2/V·s Ns, /cm2			Rs Mob Ns
Sap	1	385.4	1.80 × 103	−9.015 × 1012	336.4	1.83 × 103	−1.008 × 1013	14.6%	1.5%	10.6%
	2	372.9	1.87 × 103	−8.935 × 1012	339.1	1.86 × 103	−1.003 × 1013	10.0%	0.5%	11.0%
	3	385.7	1.66 × 103	−9.601 × 1012	328.8	1.85 × 103	−1.026 × 1013	17.3%	10.2%	6.4%
	4	365.4	1.87 × 103	−9.084 × 1012	325.3	1.86 × 103	−1.027 × 1013	12.3%	0.5%	11.6%
Standard deviation		9.95	98.99	3.01 × 1011	6.44	14.14	1.23 × 1011
SiC	1	352.1	2.03 × 103	−8.746 × 1012	313.3	2.08 × 103	−9.370 × 1012	12.4%	2.3%	6.7%
	2	341.4	1.93 × 103	−9.461 × 1012	310.5	2.07 × 103	−9.636 × 1012	10.0%	6.8%	1.8%
	3	354.9	1.98 × 103	−8.870 × 1012	316.0	2.10 × 103	−9.321 × 1012	12.3%	5.5%	4.8%
	4	351.7	1.96 × 103	−9.037 × 1012	323.9	2.07 × 103	−9.310 × 1012	8.6%	5.3%	2.9%
Standard deviation		5.92	42.03	3.12 × 1011	5.77	14.14	1.53 × 1011

, indicate that Ohmic contacts were successfully formed on the samples with SiC and sapphire substrates, all exhibiting mobilities of around 2000 cm²/V·s. The contactless RF reflectance mapping method may be affected by factors such as the temperature, humidity, and vibration, and the relative deviation of the test repeatability will not exceed 3%.

Considering that individual samples inherently exhibit minor deviations from the center to the edge, measurement discrepancies within 8%–10% compared to other methods used for the same purpose can generally be accepted as indicative of the accuracy of the measurements.

As shown in Table 2, for the sapphire substrate samples, the sheet resistance values range from a minimum of 365.4 ohm/sq to a maximum of 385.7 ohm/sq, showing an average increase of 13.5% compared to the non-contact Hall measurements. The mobility ranges from a minimum of 1.66 × 10³ cm²/V·s to a maximum of 1.87 × 10³ cm²/V·s, with a maximum decrease of only 1.5% compared to the non-contact Hall measurements, except for the “Sap 3” sample, which shows the most significant decrease rate of 10.2%. The carrier concentration ranges from a minimum of 8.935 × 10¹² /cm² to a maximum of 9.601 × 10¹² /cm², with a maximum decrease rate of 11.6% compared to the non-contact Hall measurements. Compared with the non-contact Hall measurements, the improved method exhibits standard deviations of 9.95, 98.99, and 3.01 × 10¹¹ for the sheet resistance, mobility, and carrier concentration, respectively. Although slightly higher than the LEI test results (6.44, 14.14, and 1.23 × 10¹¹), the data dispersion of the improved method remains acceptable when accounting for fabrication-related errors in metal electrode processing, the signal attenuation from the sample center to edge, and the intrinsic measurement variability of the LEI test.

The significant discrepancies in the mobility and sheet resistance measurements for the “Sap 3” sample are likely due to the excessive carrier concentration, which causes a decrease in mobility. The N vacancies formed by the reaction between Ti/Al and AlGaN/GaN create heavily doped regions near the metal islands, and the high doping concentration and increased number of metal islands contribute to the mobility reduction. Furthermore, as sample “Sap 3” is located at the edge of the epitaxial wafer, this edge position may further amplify these measurement variations. Factors such as poor electrode contact, material contamination, and issues in the photolithography and etching processes may also lead to anomalies in the mobility and carrier concentration data. Therefore, samples with significant errors can be disregarded. Excluding the sample with significant errors, the mobility decreases by an average of only 0.8%, the carrier concentration decreases by 9.6%, and the sheet resistance increases by 12.3%, confirming that this structure forms effective and accurate Ohmic contacts on sapphire substrates.

For the silicon carbide (SiC) substrate samples, the sheet resistance values range from a minimum of 341.4 ohm/sq to a maximum of 354.9 ohm/sq, showing an average increase of 10.0% compared to the non-contact Hall measurements. The mobility ranges from a minimum of 1.93 × 10³ cm²/V·s to a maximum of 2.03 × 10³ cm²/V·s, with a minimum decrease rate of only 2.3% compared to the non-contact Hall measurements. The carrier concentration ranges from a minimum of 8.764 × 10¹² /cm² to a maximum of 9.461 × 10¹² /cm², with a minimum decrease rate of 1.8%. It is noted that sample “SiC 2” exhibits a significantly higher carrier concentration compared to the non-contact Hall measurement results. This is likely due to an excessive doping concentration. The mobility decreases by an average of 5.0%, the carrier concentration decreases by 4.1%, and the sheet resistance increases by 10.8%. Notably, the standard deviations of these parameters also exhibit excellent agreement across measurements, further confirming that this structure forms effective and accurate Ohmic contacts on SiC substrates.

The results demonstrate that effective Ohmic contacts have been successfully established on both the SiC and Sapphire substrates. When compared with the LEI test results, the discrepancies are maintained within an acceptable range. This confirms the accuracy and effectiveness of the proposed method.

3.4. TLM Characterization

In this experiment, the contact performance of the Ohmic contacts on semiconductor materials was characterized using the transmission line model (TLM). By measuring the resistance between the Ohmic contacts at different spacings, the linear relationship between RT and d was obtained, and the values of RC and LT were extracted. Prior to testing, metal electrodes with spacings of 10/15/20/25/30 µm were fabricated on the device, with electrode dimensions of 1000 µm × 200 µm. The IV curves (current–voltage curves) were measured by sequentially probing adjacent electrodes, as shown in Figure 6.

The corresponding resistances were obtained through calculation. In Figure 6, the horizontal coordinate represents the spacing d between different TLM test electrodes, while the vertical coordinate shows the corresponding total resistance. Linear fitting was performed on the scatter plot, and the fitting equation was subsequently used to calculate the contact resistance and specific contact resistivity, yielding values of 320.53 ohm·mm and 1.856 × 10⁻² ohm·cm², respectively. The sheet resistance of the material was determined to be 53 ohm/sq. Since the TLM method extracts the contact resistivity and specific contact resistance through linear regression analysis, with inherent measurement uncertainty below 5%, five replicate tests were performed on identical samples to evaluate the measurement accuracy. The results showed a maximum deviation of 8% and a standard deviation of 4.48.

Although the specific contact resistivity is significantly higher compared to the annealed Ohmic electrodes, indicating poorer contact performance, the primary reason is the absence of annealing, which prevents the formation of effective large-area heavy doping between the metal and the semiconductor. Additionally, over-etching of the AlGaN barrier layer contributes to the degradation of contact performance. The partial etching of the 2DEG channel reduces the effective contact area for electron transport from the metal to the 2DEG channel, leading to an increase in contact resistance. In subsequent experiments, the contact resistance performance can be improved by adjusting the barrier layer thickness and optimizing the etching process parameters.

However, considering that the primary purpose of this structure is to form Ohmic contacts without annealing for preparing Van der Pauw samples on conductive substrates to measure the Hall effect, this method facilitates rapid sample preparation and measurement during industrial production. Excluding process variations and the inaccuracy of the measurement methods, the carrier concentration, mobility, and sheet resistance of the tested samples deviate by only 5% from the non-contact Hall measurement results, which aligns with our expectations.

Based on the experimental results, it can be concluded that the anneal-free Ohmic contacts have a minimal impact on the overall device performance. Compared with the traditional van der Waals Hall measurement results, the improved preparation method can achieve better mobility and more stable and accurate measurement results. Although the new anneal-free Ohmic contact fabrication method introduces some errors compared to non-contact Hall measurements, this simplified approach eliminates the need for annealing, avoids potential device damage, and enables rapid measurement of the electron mobility and carrier concentration on conductive substrates. This ensures the continuity and integrity of the device, mitigating the risk of errors caused by metal lateral diffusion during annealing in actual production. By maintaining high mobility while simplifying the process and improving the efficiency of device testing and production, as shown in

Table 3. Comparison of the advantages and disadvantages of three methods.

Method	Advantages	Disadvantages
Conventional Van der Pauw method	Broad applicability	Destructive Annealing error Complex process Poor reproducibility
Improved Van der Pauw method	Broad applicability Excellent reproducibility No annealing required	High contact resistance
Contactless RF reflectance mapping method	Non-destructive Fast testing No Ohmic contacts needed	Fails on conductive substrates

, this method is an ideal approach for preparing Van der Pauw Hall test samples.

4. Conclusions

This study proposes and experimentally validates a novel empirical approach for fabricating Van der Pauw–Hall test samples on GaN epitaxial layers. Three distinct substrate materials—silicon (Si), sapphire, and silicon carbide (SiC)—were selected for the fabrication and subsequent characterization of the Van der Pauw–Hall test structures to verify the formation of optimal Ohmic contacts. Comparative analysis with conventional Van der Pauw measurements confirmed the measurement stability on the conductive substrates, while benchmarking against the non-contact Hall test results validated the accuracy on the non-conductive substrates. These results strongly demonstrate the broad applicability of this method.

The experimental results demonstrate that the modified Hall samples exhibit significantly enhanced parameter stability. The standard deviations of the sheet resistance, mobility, and carrier concentration are substantially lower than those of the conventional samples, indicating superior measurement reproducibility. The tightly clustered data distribution further confirms the improved consistency in the electrical properties. The measured mobility and carrier concentration demonstrate exceptional concordance with the LEI measurements, exhibiting mean deviations of merely 4.0% and 7.0%, respectively, with the peak agreement reaching remarkable precision levels of 0.5% and 1.8% discrepancy. This rigorous quantitative validation conclusively establishes the methodological reliability.

The proposed fabrication method features a simplified structure that eliminates annealing-induced errors while delivering superior electrical performance and stability. This approach enables rapid sample preparation for testing, maintaining the measurement discrepancies within 8%–10% compared to conventional methods while achieving comparable accuracy to alternative techniques developed for this purpose.

Furthermore, we systematically investigated the detrimental effects of annealing on the device performance, particularly its negative impact on the electrical characteristics and overall stability. The new method was found to produce elevated contact resistance (320.53 ohm·mm) and specific contact resistivity (1.856 × 10⁻² ohm·cm²), indicating that this method cannot entirely replace conventional high-temperature annealing processes. Future research should focus on optimizing the Ohmic contact electrode design through this approach to reduce the annealing temperature requirements while enhancing the sample stability. This methodology shows considerable promise for industrial applications and as a technique complementary to classical Van der Pauw measurement approaches.