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Field-Programmable Gate Array (FPGA) and Microprocessor Systems

A special issue of Applied Sciences (ISSN 2076-3417). This special issue belongs to the section "Electrical, Electronics and Communications Engineering".

Deadline for manuscript submissions: closed (20 February 2023) | Viewed by 2239

Special Issue Editor


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Guest Editor
Division of Digital Systems, Silesian University of Technology, 44-100 Gliwice, Poland
Interests: computer science; cyber-physical systems; FPGA; logic synthesis; CPLD; technology mapping
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

The development of digital technology in recent years has resulted in an increase in the complexity of circuits and the computing efficiency of modern digital devices. After taking into account the clear inclination to miniaturization and the reduction in power consumption, it is possible to indicate novel application areas for these devices, such as the Internet of Things (IoT) or cyber-physical systems (CPS).

In the case of FPGA devices, their considerable logical resources allow for the implementation of complex digital systems. Of course, the key is to provide effective multilevel synthesis algorithms that take into account optimization processes at all its levels (decomposition, technological mapping or high-level synthesis).

In the case of microprocessor systems, the key is the development of appropriate system architectures as well as the provision of effective programming methods.

The present Special Issue aims to present research results concerning aspects of FPGA-oriented synthesis (from specification to circuit verification) and the broadly understood methodology of designing microprocessor systems. Application works presenting author research results regarding the implementation of microprocessor systems or FPGA devices in dedicated applications (e.g., motor control, PLC, medical applications, IoT, etc.) are also welcome.

In this short introduction, only the outline of issues related to FPGA and microprocessor systems is presented, which, in the general case, is much wider. I encourage authors who identify their work with this title to submit their to this Special Issue, even if some issues are not explicitly mentioned herein.

Dr. Marcin Kubica
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Applied Sciences is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • logic synthesis
  • decomposition
  • technology mapping
  • computer-aided design
  • Petri net-based systems
  • FPGA
  • CPLD
  • programmable logic controller (PLC)
  • cyber-physical systems (CPS)
  • cyber-physical synthesis
  • microprocessor
  • microprocessor systems
  • microcontroller

Published Papers (1 paper)

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Research

22 pages, 778 KiB  
Article
Adapting the GACT-X Aligner to Accelerate Minimap2 in an FPGA Cloud Instance
by Carolina Teng, Renan Weege Achjian, Jiang Chau Wang and Fernando Josepetti Fonseca
Appl. Sci. 2023, 13(7), 4385; https://doi.org/10.3390/app13074385 - 30 Mar 2023
Cited by 2 | Viewed by 1849
Abstract
In genomic analysis, long reads are an emerging type of data processed by assembly algorithms to recover the complete genome sample. They are, on average, one or two orders of magnitude longer than short reads from the previous generation, which provides important advantages [...] Read more.
In genomic analysis, long reads are an emerging type of data processed by assembly algorithms to recover the complete genome sample. They are, on average, one or two orders of magnitude longer than short reads from the previous generation, which provides important advantages in information quality. However, longer sequences bring new challenges to computer processing, undermining the performance of assembly algorithms developed for short reads. This issue is amplified by the exponential growth of genetic data generation and by the slowdown of transistor technology progress, illustrated by Moore’s Law. Minimap2 is the current state-of-the-art long-read assembler and takes dozens of CPU hours to assemble a human genome with clinical standard coverage. One of its bottlenecks, the alignment stage, has not been successfully accelerated on FPGAs in the literature. GACT-X is an alignment algorithm developed for FPGA implementation, suitable for any size input sequence. In this work, GACT-X was adapted to work as the aligner of Minimap2, and these are integrated and implemented in an FPGA cloud platform. The measurements for accuracy and speed-up are presented for three different datasets in different combinations of numbers of kernels and threads. The integrated solution’s performance limitations due to data transfer are also analyzed and discussed. Full article
(This article belongs to the Special Issue Field-Programmable Gate Array (FPGA) and Microprocessor Systems)
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