Discrete Event Dynamic Systems and Applications

A special issue of Mathematics (ISSN 2227-7390). This special issue belongs to the section "Engineering Mathematics".

Deadline for manuscript submissions: 5 March 2025 | Viewed by 430

Special Issue Editors


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Guest Editor
GREAH—EA3220 (Groupe de Recherche en Electrotechnique et Automatique du Havre), Université Le Havre Normandie, 76600 Le Havre, France
Interests: discrete event system; supervisory control; formal method; security analysis

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Guest Editor
GREAH—EA3220 (Groupe de Recherche en Electrotechnique et Automatique du Havre), Université Le Havre Normandie, 76600 Le Havre, France
Interests: discrete event systems; formal methods; artificial intelligence; cyber–physical systems
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Special Issue Information

Dear Colleagues,

In recent years, cyber–physical systems have been widely used in the fields of intelligent manufacturing, power systems, logistics management, healthcare systems, intelligent transportation systems, robotics and computer communication networks. At a certain technical abstraction level, these systems have the characteristics of networked discrete event dynamic systems (DEDSs). Under the formal framework, studying cyber–physical systems from the perspective of networked DEDSs is the key means to solve their technical application problems. Such systems are usually constructed and operated in a distributed mode with communication networks. On one hand, the use of communication networks enhances the capability and intelligence of DEDS information processing; on the other hand, it increases the risk of the system facing external cyber attacks.

The aim of this Special Issue is to collect the latest advances in modeling (such as automata, timed automata, probabilistic automata, Petri nets, Markov models, Queues, max-plus algebras), security analysis, control and optimization, performance evaluation, and applications of DEDSs. Interested authors are welcome to share their academic results and practical experiences to address these challenging issues in the field.

Prof. Dr. Gaiyun Liu
Prof. Dr. Dimitri Lefebvre
Guest Editors

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Keywords

  • discrete event dynamic system
  • formal method
  • property verification
  • networked control system
  • cyber security
  • system control
  • optimization and scheduling
  • distributed system
  • system reconfiguration
  • stochastic process and uncertainty
  • timing aspects in DEDS and hybrid systems
  • cyber–physical system
  • artificial intelligence in discrete event dynamic system
  • applications of discrete event dynamic system

Published Papers (1 paper)

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Research

20 pages, 3401 KiB  
Article
Wafer Delay Minimization in Scheduling Single-Arm Cluster Tools with Two-Space Process Modules
by Chengyu Zou, Siwei Zhang, Shan Zeng, Lei Gu and Jie Li
Mathematics 2024, 12(12), 1783; https://doi.org/10.3390/math12121783 - 7 Jun 2024
Viewed by 252
Abstract
In semiconductor manufacturing, multi-space process modules (PMs) are adopted in some cluster tools for wafer processing. With multi-space PMs, a PM can have multiple wafers concurrently. Also, the internal chamber in a PM should rotate to make the robot able to load/unload a [...] Read more.
In semiconductor manufacturing, multi-space process modules (PMs) are adopted in some cluster tools for wafer processing. With multi-space PMs, a PM can have multiple wafers concurrently. Also, the internal chamber in a PM should rotate to make the robot able to load/unload a wafer into/from a space in the PM. This means that the wafer staying time in PMs is affected by both the rotation operations of the internal chambers of PMs and the robot tasks. Thus, minimizing the wafer delay time is quite challenging. In this work, for cluster tools with single-arm robots and two-space PMs, efforts are made for wafer delay minimization in scheduling the tools. Specifically, a two-wafer backward strategy is presented to operate the tools in a steady state. Then, the workloads of each processing step and the robot are analyzed. Further, to find optimal schedules with the objective of minimizing the total wafer delay time, efficient algorithms are established. Finally, case studies show that the wafer delay time at some steps can be totally eliminated by the proposed method. In the meantime, in all cases, the proposed method can work well in reducing the total wafer delay time at all steps. Full article
(This article belongs to the Special Issue Discrete Event Dynamic Systems and Applications)
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