Advanced Interconnect and Packaging, 3rd Edition
A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "E：Engineering and Technology".
Deadline for manuscript submissions: 30 May 2025 | Viewed by 272
Special Issue Editors
Interests: interconnect; packaging; TSV; 3-D IC
Special Issues, Collections and Topics in MDPI journals
Special Issue Information
Dear Colleagues,
Unlike transistors, the continuous downscaling of the feature size in CMOS technology leads to a dramatic rise in interconnect resistivity and the degradation of the concomitant performance. At nanoscale technology nodes, interconnect delay and reliability are the major bottlenecks faced by modern integrated circuits. In order to resolve these interconnect problems, various technologies such as airgap, nanocarbon, optical, and through-silicon via (TSV) have been proposed and investigated. For example, by virtue of TSV technology, dies can be stacked to enhance the integration density. More importantly, 3D integration and packaging also offer the most promising platform via which to implement “More-than-Moore” technologies, providing heterogenous materials and technologies on a single chip.
This Special Issue seeks to showcase research papers, communications, and review articles on novel developments in advanced interconnect and packaging, namely the design, modeling, fabrication, and reliability assessment of emerging interconnect and packaging technologies.
We look forward to receiving your submissions!
Prof. Dr. Wensheng Zhao
Dr. Dawei Wang
Guest Editors
Manuscript Submission Information
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Keywords
- interconnect
- on-chip interconnect
- through-silicon via (TSV)
- transmission line
- advanced packaging
- 3D integrated circuits and microsystems
- antenna in packaging (AiP)
- integrated passive device (IPD)
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Related Special Issues
- Advanced Interconnect and Packaging in Micromachines (18 articles)
- Advanced Interconnect and Packaging, 2nd Edition in Micromachines (8 articles)
