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20 pages, 2421 KB

Open AccessArticle

Insulation Monitoring and Fault Diagnosis Technology of Cross-Bonded Metal-Sheathed Cable

by Chunming Wei, Dewen Zhang, Chao Xu, Long Tan, Zhongzhi Qu and Bo Zhu

Energies 2026, 19(3), 698; https://doi.org/10.3390/en19030698 - 28 Jan 2026

Viewed by 376

For addressing the challenge that cross-interconnection of metal sheaths in long-distance high-voltage cables complicates the monitoring of cable insulation faults, it is proposed a fault diagnosis scheme based on resistive current, dielectric loss factor, and sheath current. The voltage and current signals at [...] Read more.

For addressing the challenge that cross-interconnection of metal sheaths in long-distance high-voltage cables complicates the monitoring of cable insulation faults, it is proposed a fault diagnosis scheme based on resistive current, dielectric loss factor, and sheath current. The voltage and current signals at both ends of the cable are collected, as well as the current signals at the outlet of the grounding box and the transposition box. By establishing an equivalent model of the cross-connected cable, the calculation method for fault diagnosis is derived, and an implementation scheme for fault diagnosis is provided. The insulation monitoring method proposed in this paper is simulated and verified using MATLAB/Simulink software, with simulations conducted to investigate four typical faults: cable insulation fault, sheath open-circuit fault, transposition box immersion short-circuit fault, and cable intermediate-joint breakdown fault. The circuit model of the cross-connected unit is established in the laboratory to verify the method proposed in this paper. The results show that the simulation results are consistent with the test results, and the fault types can be correctly reflected, which verifies the correctness and effectiveness of the insulation monitoring method. Full article

(This article belongs to the Section F1: Electrical Power System)

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9 pages, 1407 KB

Open AccessArticle

Integration of Self-Assembled Monolayers for Cobalt/Porous Low-k Interconnects

by Yi-Lung Cheng, Joe Kao, Hao-Wei Zhang, Bo-Jie Liao, Giin-Shan Chen and Jau-Shiung Fang

Coatings 2024, 14(9), 1162; https://doi.org/10.3390/coatings14091162 - 9 Sep 2024

Viewed by 1999

Abstract

The integration of self-assembled monolayers (SAM) into cobalt (Co)/porous low-dielectric-constant (low-k) dielectric interconnects is studied in terms of electrical characteristics and reliability in this work. Experimental results indicated that SAM derived from 3-aminopropyltrimethoxysilane (APTMS) improved breakdown field, time-dependent dielectric breakdown, and adhesion for [...] Read more.

The integration of self-assembled monolayers (SAM) into cobalt (Co)/porous low-dielectric-constant (low-k) dielectric interconnects is studied in terms of electrical characteristics and reliability in this work. Experimental results indicated that SAM derived from 3-aminopropyltrimethoxysilane (APTMS) improved breakdown field, time-dependent dielectric breakdown, and adhesion for Co/porous low-k integrated interconnects. However, the improvement magnitude was not large as compared to SAM in the Cu/porous low-k integration. Therefore, the integration of SAM into Co/porous low-k interconnects has a positive effect; however, in order to further promote the efficiency of SAM for Co/porous low-k interconnects, the option of precursors for the growth of SAM is required. Full article

(This article belongs to the Section Surface Engineering for Energy Harvesting, Conversion, and Storage)

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12 pages, 2556 KB

Open AccessArticle

Comparison of Cobalt Integration with Various Dielectric Materials under Thermal and Electrical Stress

by Yi-Lung Cheng, Hong-Chang Huang, Wei-Fan Peng, Giin-Shan Chen and Jau-Shiung Fang

Coatings 2023, 13(10), 1818; https://doi.org/10.3390/coatings13101818 - 23 Oct 2023

Cited by 3 | Viewed by 2284

Abstract

Cobalt (Co) is proposed to replace copper (Cu) as a conductor in the back-end-of-line (BEOL) interconnects of integrated circuits. In this study, the electric characteristics and reliability of the integration of Co with various dielectric films (SiO₂, dense, and porous low- [...] Read more.

Cobalt (Co) is proposed to replace copper (Cu) as a conductor in the back-end-of-line (BEOL) interconnects of integrated circuits. In this study, the electric characteristics and reliability of the integration of Co with various dielectric films (SiO₂, dense, and porous low-k SiOCH films) under thermal and electrical stress were compared. Thermal annealing repaired sputtering-Co-deposition-induced damage to the dielectric film but reduced the breakdown field and time-dependence-dielectric-breakdown (TDDB) times due to the diffusion of Co atoms. After annealing, the SiO₂ film had the largest reductions in the breakdown field, TDDB failure time, and electric field acceleration factor, indicating that the diffusion of Co atoms dominates in the oxygen-rich surface. Under electrical stress, the drift of Co atoms favors the porous low-k film with the assistance of porosity. As a result, a barrier is required for Co metallization. To achieve barrier-free or barrier-less processing in Co metallization, the dense low-k film is the best option to integrate with Co. Full article

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13 pages, 3238 KB

Open AccessArticle

Comparison of Self-Assembled Monolayers Using 3-Aminopropyltrimethoxysilane and Decyltrimethoxysilane in Vapor Phase for Porous SiOCH Dielectrics

by Yi-Lung Cheng, Joe Kao, Hao-Wei Zhang and Chih-Yen Lee

Coatings 2023, 13(3), 507; https://doi.org/10.3390/coatings13030507 - 24 Feb 2023

Cited by 4 | Viewed by 2987

Abstract

Self-assembled monolayers (SAMs) are the emerging materials to act as barriers in the back-end-of-line interconnects for advanced technological nodes. In this study, SAMs were formed on the porous SiOCH (p-SiOCH) films by using different precursors: 3-Aminopropyltrimethoxysilane (APTMS) or decyltrimethoxysilane (DTMOS), in the vapor [...] Read more.

Self-assembled monolayers (SAMs) are the emerging materials to act as barriers in the back-end-of-line interconnects for advanced technological nodes. In this study, SAMs were formed on the porous SiOCH (p-SiOCH) films by using different precursors: 3-Aminopropyltrimethoxysilane (APTMS) or decyltrimethoxysilane (DTMOS), in the vapor phase. Effects of SAMs precursors on the electrical characteristics and reliability of p-SiOCH films were characterized and compared. Experimental results indicated that both SAMs derived from APTMS and DTMOS enhanced the breakdown field and time-dependent dielectric breakdown, provided Cu barrier capacity, and promoted adhesion with Cu. In particular, APTMS-SAMs had a larger improvement, but a larger increase in the dielectric constant was observed as compared to DTMOS-SAMs. Therefore, SAMs derived from APTMS are a promising candidate for sub-nanometer barrier application for advanced interconnects. Full article

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19 pages, 3520 KB

Open AccessReview

Recent Trends in Copper Metallization

by Hyung-Woo Kim

Electronics 2022, 11(18), 2914; https://doi.org/10.3390/electronics11182914 - 14 Sep 2022

Cited by 46 | Viewed by 27115

Abstract

The Cu/low-k damascene process was introduced to alleviate the increase in the RC delay of Al/SiO₂ interconnects, but now that the technology generation has reached 1× nm or lower, a number of limitations have become apparent. Due to the integration limit of [...] Read more.

The Cu/low-k damascene process was introduced to alleviate the increase in the RC delay of Al/SiO₂ interconnects, but now that the technology generation has reached 1× nm or lower, a number of limitations have become apparent. Due to the integration limit of low-k materials, the increase in the RC delay due to scaling can only be suppressed through metallization. As a result, various metallization methods have been proposed, including traditional barrier/liner thickness scaling, and new materials and integration schemes have been developed. This paper introduces these methods and summarizes the recent trends in metallization. It also includes a brief introduction to the Cu damascene process, an explanation of why the low-k approach faces limitations, and a discussion of the measures of reliability (electromigration and time-dependent dielectric breakdown) that are essential for all validation schemes. Full article

(This article belongs to the Special Issue Advanced CMOS Devices and Applications)

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10 pages, 3607 KB

Open AccessArticle

Comparison of Self-Assembled Monolayers on SiO₂ and Porous SiOCH Dielectrics by Decyltrimethoxysilane Vapor Treatment

by Yi-Lung Cheng, Wei-Fan Peng, Chih-Yen Lee, Giin-Shan Chen and Jau-Shiung Fang

Coatings 2022, 12(7), 926; https://doi.org/10.3390/coatings12070926 - 30 Jun 2022

Cited by 1 | Viewed by 2388

Abstract

Self-assembled monolayers (SAMs) are emerging as materials that are candidates of barriers used in back-end-of–line interconnects of integrated circuits for future generations. In this study, SAMs were formed on the SiO₂ and porous SiOCH (p-SiOCH) films by using decyltrimethoxysilane (DTMOS) precursor in [...] Read more.

Self-assembled monolayers (SAMs) are emerging as materials that are candidates of barriers used in back-end-of–line interconnects of integrated circuits for future generations. In this study, SAMs were formed on the SiO₂ and porous SiOCH (p-SiOCH) films by using decyltrimethoxysilane (DTMOS) precursor in vapor phase at a temperature of 100 °C. The effects of the formation of SAMs at the surfaces of SiO₂ and p-SiOCH films on the electrical characteristics were characterized and compared. With O₂ plasma irradiation, SAMs could successfully form on both SiO₂ and p-SiOCH films, thereby enhancing the adhesion and dielectric breakdown field. In the p-SiOCH films, SAMs sealed the surface pores and had higher coverage, promoting the effectiveness of the Cu barrier. In the Cu/porous low-k integrated interconnects for advanced technological nodes, therefore, SAMs are promising emerging materials acting as a barrier and adhesive. On the other hand, for SiO₂ films, SAMs weakened the barrier; however, they can act as an interfacial adhesion enhancer. Full article

(This article belongs to the Special Issue Plasma Processing and Thin Film Deposition)

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16 pages, 4162 KB

Open AccessFeature PaperArticle

Automatic Optimization of Gas Insulated Components Based on the Streamer Inception Criterion

by Francesco Lucchini, Nicolò Marconato and Paolo Bettini

Electronics 2021, 10(18), 2280; https://doi.org/10.3390/electronics10182280 - 17 Sep 2021

Cited by 5 | Viewed by 3280

Abstract

Gas insulated transmission lines (GILs) are used in electrical systems mainly for power transmission and High Voltage substation interconnection. In this paper, we focus on the development of complex numerical tools for the optimization of gas insulated HVDC components by the estimation of [...] Read more.

Gas insulated transmission lines (GILs) are used in electrical systems mainly for power transmission and High Voltage substation interconnection. In this paper, we focus on the development of complex numerical tools for the optimization of gas insulated HVDC components by the estimation of realistic electric field distribution and the voltage holding of the designed geometry. In particular, the paper aims at describing the correct modelling approach suitable to study high voltage components in DC, considering the nonlinear behaviour characterizing the electrical conductivity of solid and gas insulators. The simulated field distribution is then adopted to estimate the voltage holding of the dielectric gas, with a convenient engineering technique, based on the streamer criterion. These two tools are integrated in an automatic optimization package developed in COMSOL^® and MATLAB^®, with the purpose of adjusting the critical geometry features, suffering from excessive electrical stress and possibly giving rise to electrical breakdown, in order to guide the designer towards a robust solution. Full article

(This article belongs to the Topic Advances in Energy Market and Power System Modelling and Optimization)

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12 pages, 6364 KB

Open AccessArticle

In-Situ Repair Plasma-Induced Damage and Cap Dielectric Barrier for Porous Low-Dielectric-Constant Materials by HMDS Plasma Treatment

by Chih-Yen Lee, Chi-Yang Yan and Yi-Lung Cheng

Coatings 2021, 11(3), 314; https://doi.org/10.3390/coatings11030314 - 9 Mar 2021

Cited by 15 | Viewed by 4976

Abstract

Plasma damage and metal ion penetration are critical issues for porous low-dielectric-constant (low-k) materials used in the back-end-of-line interconnects. This study proposed a novel process with in-situ repairing plasma-induced damage and capping a barrier for porous low-k materials by Hexamethyldisilazane [...] Read more.

Plasma damage and metal ion penetration are critical issues for porous low-dielectric-constant (low-k) materials used in the back-end-of-line interconnects. This study proposed a novel process with in-situ repairing plasma-induced damage and capping a barrier for porous low-k materials by Hexamethyldisilazane (HDMS) plasma treatment. For a plasma-damaged porous low-k material, its surface hydrophilic state was transformed to hydrophobic state by HDMS plasma treatment, revealing that damage was repaired. Simultaneously, a dielectric film was capped onto the porous low-k material, and displayed better barrier capability against Cu migration. Additionally, the breakdown reliability of the stacked dielectric was enhanced by the means of HDMS plasma treatment. The optimized HDMS plasma treatment time was found to be 10 s. Therefore, this proposed HDMS plasma treatment processing is a promising technique for highly applicable low-k material used for advanced technology nodes. Full article

(This article belongs to the Section High-Energy Beam Surface Engineering and Coatings)

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11 pages, 2317 KB

Open AccessArticle

Electrical Characteristics and Reliability of Nitrogen-Stuffed Porous Low-k SiOCH/Mn₂O_3−xN/Cu Integration

by Yi-Lung Cheng, Yu-Lu Lin, Chih-Yen Lee, Giin-Shan Chen and Jau-Shiung Fang

Molecules 2019, 24(21), 3882; https://doi.org/10.3390/molecules24213882 - 28 Oct 2019

Cited by 8 | Viewed by 3197

Abstract

In our previous study, a novel barrier processing on a porous low-dielectric constant (low-k) film was developed: an ultrathin Mn oxide on a nitrogen-stuffed porous carbon-doped organosilica film (p-SiOCH(N)) as a barrier of the Cu film was fabricated. To form a [...] Read more.

In our previous study, a novel barrier processing on a porous low-dielectric constant (low-k) film was developed: an ultrathin Mn oxide on a nitrogen-stuffed porous carbon-doped organosilica film (p-SiOCH(N)) as a barrier of the Cu film was fabricated. To form a better barrier Mn₂O_3−xN film, additional annealing at 450 °C was implemented. In this study, the electrical characteristics and reliability of this integrated Cu/Mn₂O_3−xN/p-SiOCH(N)/Si structure were investigated. The proposed Cu/Mn₂O_3−xN/p-SiOCH(N)/Si capacitors exhibited poor dielectric breakdown characteristics in the as-fabricated stage, although, less degradation was found after thermal stress. Moreover, its time-dependence-dielectric-breakdown electric-field acceleration factor slightly increased after thermal stress, leading to a larger dielectric lifetime in a low electric-field as compared to other metal-insulator-silicon (MIS) capacitors. Furthermore, its Cu barrier ability under electrical or thermal stress was improved. As a consequence, the proposed Cu/Mn₂O_3−xN/p-SiCOH(N) scheme is promising integrity for back-end-of-line interconnects. Full article

(This article belongs to the Special Issue Advances in Porous Materials)

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13 pages, 4859 KB

Open AccessArticle

Study on Insulation Breakdown Characteristics of Printed Circuit Board under Continuous Square Impulse Voltage

by Quan Zhou, Mingqian Wen, Taotao Xiong, Tianyan Jiang, Ming Zhou, Xi Ouyang and Lai Xing

Energies 2018, 11(11), 2908; https://doi.org/10.3390/en11112908 - 25 Oct 2018

Cited by 14 | Viewed by 5475

Abstract

The widely distributed interconnects in printed circuit boards (PCBs) easily couple with high voltage under the action of electromagnetic pulses, which leads to insulation failure. In this study, the dielectric breakdown characteristics of four typical PCBs are studied under continuous square impulse voltage [...] Read more.

The widely distributed interconnects in printed circuit boards (PCBs) easily couple with high voltage under the action of electromagnetic pulses, which leads to insulation failure. In this study, the dielectric breakdown characteristics of four typical PCBs are studied under continuous square impulse voltage conditions. First, the electric field distribution in the four electrode models is simulated with the ANSYS software (ANSYS Maxwell 17.0). Electric field simulation results show the weak area of electric field distribution. On this basis, the possible breakdown patterns of PCB are analyzed. Second, the influence of factors, such as temperature, pulse duty ratio, interconnect insulation distance, and air pressure, on PCB breakdown voltage is studied through a breakdown test on the PCBs. Results show that the discharge between the single-layer electrodes of the PCBs is surface discharge, and the breakdown is that of a “gas–solid composite medium”. Meanwhile, the breakdown of a double-layer PCB is solid breakdown. Finally, scanning electron microscopy (SEM) produced by Tescan (Brno, Czech Republic) is performed to study the carbonization channel after PCB breakdown. SEM results reveal that the PCB carbonization channel is influenced by temperature and pressure in varying degrees. Full article

(This article belongs to the Section F: Electrical Engineering)

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24 pages, 301 KB

Open AccessReview

Time Dependent Dielectric Breakdown in Copper Low-k Interconnects: Mechanisms and Reliability Models

by Terence K.S. Wong

Materials 2012, 5(9), 1602-1625; https://doi.org/10.3390/ma5091602 - 12 Sep 2012

Cited by 58 | Viewed by 15825

Abstract

The time dependent dielectric breakdown phenomenon in copper low-k damascene interconnects for ultra large-scale integration is reviewed. The loss of insulation between neighboring interconnects represents an emerging back end-of-the-line reliability issue that is not fully understood. After describing the main dielectric leakage mechanisms [...] Read more.

The time dependent dielectric breakdown phenomenon in copper low-k damascene interconnects for ultra large-scale integration is reviewed. The loss of insulation between neighboring interconnects represents an emerging back end-of-the-line reliability issue that is not fully understood. After describing the main dielectric leakage mechanisms in low-k materials (Poole-Frenkel and Schottky emission), the major dielectric reliability models that had appeared in the literature are discussed, namely: the Lloyd model, 1/E model, thermochemical E model, E^1/2 models, E² model and the Haase model. These models can be broadly categorized into those that consider only intrinsic breakdown (Lloyd, 1/E, E and Haase) and those that take into account copper migration in low-k materials (E^1/2, E²). For each model, the physical assumptions and the proposed breakdown mechanism will be discussed, together with the quantitative relationship predicting the time to breakdown and supporting experimental data. Experimental attempts on validation of dielectric reliability models using data obtained from low field stressing are briefly discussed. The phenomenon of soft breakdown, which often precedes hard breakdown in porous ultra low-k materials, is highlighted for future research. Full article

(This article belongs to the Special Issue Low k Dielectic Materials)

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