1. Introduction
Power electronic converters are electronic circuits that transform energy characteristics, such as voltage and current, to support applications in renewable energy, electric vehicles, industrial systems, and more [
1]. Specifically, the Zeta converter is a versatile topology that combines the step-down feature of a Buck converter with the step-up capability of a Boost converter. This allows it to regulate output voltage levels while maintaining low ripple, thanks to the inductor’s placement at the output [
2].
The Zeta converter has been tested in various renewable energy applications, such as permanent magnet wind turbines (wind lens) [
3], photovoltaic systems for maximum power extraction using an MPPT algorithm [
4], and electric vehicles for battery charging systems [
5,
6]. Its key characteristics—output voltage polarity matching the input voltage, ease of voltage regulation, and a smooth output current with low voltage ripple, allowing the use of smaller capacitors [
7]—make it more efficient compared to other topologies like the Buck–Boost.
The Zeta converter is typically controlled using different techniques, including PID controllers [
8,
9], current-mode controllers [
10,
11], and sliding-mode controllers [
12]. PID controllers rely on small-signal models, making them vulnerable to high-frequency instability issues. Current-mode controllers use a dual-loop structure, where both loops must be tuned in a way that ensures the overall system’s stability [
13]. Sliding-mode control is widely used for its robustness and simplicity but has drawbacks such as chattering and switching frequency constraints. Other control techniques include switching control algorithms [
14], which require the converter to operate strictly in continuous conduction mode. Given that the Zeta converter is a fourth-order, nonlinear system, designing a robust control strategy that ensures stability across a wide operating range, maintains a fixed switching frequency, and achieves low ripple operation is of great interest for various applications.
A promising approach to addressing the complexity of the Zeta converter is feedback linearization (FBL) control, which compensates for nonlinearities, simplifies controller design, and stabilizes the system over a broad operating range [
15]. This technique has been successfully implemented in a Boost converter with a constant power load (CPL) [
16], achieving noise immunity and a global pole independent of load conditions. In [
17], FBL was applied to a multilevel converter, reducing voltage ripple and incorporating a neural network for controller parameter tuning. Other studies propose FBL control for Boost converters, such as integrating inner and outer control loops for power factor correction [
18] or using it for current tracking as part of a genetic algorithm for fault-tolerant control [
19]. However, this technique has not yet been implemented in the Zeta converter. Finally, to test the system’s robustness against large parameter variations, and considering that the averaged model included only two topologies, a synchronous Zeta converter (ZETAs) was used, allowing current to flow in both directions. In the ZETAs converter, the diode is replaced by a secondary switch synchronized with the main controlled switch [
20,
21,
22,
23]. This topology increases the converter’s efficiency by eliminating the diode’s voltage drop, a particularly desirable feature in step-down applications. However, if the system is ensured to operate in CCM, the more widely accepted Zeta converter structure can be used, which includes only one MOSFET, allowing power to be supplied from the voltage source.
In this paper, we propose the use of feedback linearization (FBL) in a synchronous Zeta converter. The feedback linearization control strategy offers clear advantages over traditional methods. The first step is to derive the averaged model of the converter, incorporating its nonlinear characteristics. The controller is then designed to cancel these nonlinearities, ensuring stable dynamics and regulated output voltage. Once the linearization expression is obtained, an external PI loop is included to improve damping and reduce steady-state error. The control scheme operates in a cycle-by-cycle computation structure, where the duty cycle is updated at the beginning of each period based on measured state variables. This allows operation at a fixed switching frequency without introducing undesired harmonics, making the approach suitable for digital or hybrid implementations. To prevent abrupt changes in state variables during the duty cycle update, centered pulse-width modulation (CPWM) is used [
24]. Consequently, system stability is analyzed from a switched system perspective [
25,
26], enabling the identification of high-frequency instabilities that are not visible in the averaged model.
Beyond the theoretical development, this work addresses several practical aspects of implementation. The study demonstrates the robustness of the FBL approach under digital control, evaluates the system’s performance under variations in load resistance and reference voltage, and analyzes stability boundaries using a parametric sweep. The impact of the sampling period is explicitly examined, as both very small and very large values can destabilize the system. The choice of PWM scheme is also shown to be critical, with trailing- or leading-edge modulation potentially causing instability. A comparative analysis is carried out between the averaged and switched models, revealing significant differences in stability ranges. Additionally, the effect of input voltage variations on the robustness of the switched system is studied, along with how the proposed control strategy mitigates this issue.
While FBL has been widely applied in other types of converters [
27,
28,
29,
30], but, to the best of the authors’ knowledge, it has not yet been applied to the Zeta converter. This is likely due to the fact that its implementation is not straightforward, requiring a detailed analysis of the switching scheme and sampling period—issues that are specifically addressed in this work.
The paper is organized as follows.
Section 2 presents the mathematical model that describes the dynamics of the Zeta converter, along with the equations of the averaged model.
Section 3 introduces and applies the feedback linearization technique to the Zeta converter, analyzing the stability of its internal dynamics.
Section 4 details the three components that govern the controller: the control law responsible for linearization, the one that induces the system dynamics, and the one that regulates steady-state and transient errors. Furthermore,
Section 5 presents the stability analysis of the switched system. This is particularly relevant because the model and control scheme used for implementation differ significantly from the model on which the controller was originally designed.
Section 6 showcases the main results of the paper, evaluating the system’s response to different disturbances—such as load variations and voltage reference changes—demonstrating its robust performance across a wide range of operating conditions. Finally,
Section 7 provides concluding remarks and highlights open problems for future research.
2. Mathematical Model of the Zeta Converter
The synchronous Zeta converter is depicted in
Figure 1 and is described by the state vector
, where
represents the current flowing through inductor 1,
is the current flowing through the inductor 2, and
and
are the voltages across capacitors 1 and 2, respectively. The parameters of the system are the capacitances
and
of the capacitors, the inductances
and
of the inductors, the load resistance
R, and the internal resistance of the first inductor,
. The input voltage to the converter is given by
and the output voltage
. Switches
u and
are synchronized in such a way that, whenever
(OFF position), then
(ON position) and vice-versa.
In Equation (
1), the vector valued functions
defining the dynamics are
State averaging is a widely used tool for analyzing switched systems, as it provides a single equation where the operation point can be easily analyzed using linear or nonlinear continuous-time systems tools. State-space averaging applied over Equations (
1)–(
3) leads to the averaged representation of the system:
where
with
being the duty cycle. Unless otherwise stated, the values of the parameters used for the Zeta converter throughout the paper are those reported in
Table 1.
4. Controller Design
We begin this section by writing the control signal in Equation (
14) in a more suggestive way:
The first component
is the term that linearizes the output dynamics, which we have found to be
Now, the second term
will be given by two components. The first one induces the desired dynamics in the voltage (
), and the second one consists of a PI controller (
), ensuring that the output voltage tends to the steady-state with small-amplitude ripple, defined according to the design parameters. Thus, the signal
from Expression (
25) is given by
The desired dynamics in the voltage are set to follow a second-order equation with two distinct real poles. Thus, the signal
is given by
The constants
s
−1 and
s
−2 are chosen so that the poles of the linearized system are located at
and
. Faster poles would induce oscillations in the output, while placing the poles closer to the origin would slow down the system’s response. Finally, defining the state variable
with dynamics
, the PI controller takes the form
The PI places a pole at the origin and a zero. In this case, the zero is placed at , which implies that the integrator’s time constant is s.
Since the linearized part corresponds to a stable second-order system, and the PI controller adds a pole at the origin and a zero in the left-half plane, a basic root locus analysis suggests that the closed-loop system will remain stable. The constants
s
−2 and
s
−3 were selected to provide an appropriate response according to the design criteria. Smaller values of
result in a slower response, while larger values may lead to oscillations.
Figure 3 shows a block diagram of the closed-loop system.
5. Dynamic Analysis of the Switched Controlled System
So far we have leveraged the continuous nature of the state-space averaging to design a controller based on input–output linearization. The next question is at what extent a discrete, switched version of the controller behaves in the same way as the continuous counterpart, not only in the similarity of the trajectories, but also on the stability conditions. To address this question, we resort to the stability analysis of the switched system.
An important remark should be made at this point: the discrete implementation measures the state of the system at the beginning of the cycle at time
t and calculates the duty cycle
d given by Equations (
14) and (
27). The value of
d is only updated at the next sampling period
. For this reason, the value sampled at the beginning should be representative of the averaged states over the whole period; hence, we choose a centered PWM implementation for the MOSFET.
Now, for mathematical convenience, we rewrite the vector fields
and
of the Zeta converter in matrix form as
with
The map that takes an arbitrary state at the
n-th (
) cycle to the
(
) can be constructed as
where we have made
The fixed point
in Equation (
34) needs to be implicitly solved by setting
Furthermore, the linear stability of the fixed point is given by the linearization of the map
Here, the partial derivatives of
are
and the expressions for the matrix derivatives are
Finally, the gradient vector is
The eigenvalues
of the matrix
in Equation (
38) are the so-called Floquet multipliers and determine the stability of the fixed-point solution of the map by guaranteeing
.
The stability analysis of the switched system is shown in
Figure 4A. For this figure, we have made use of the same parameters used in
Figure 2A for comparison effects. First, it is worth noticing that, since we are now working on a discrete map, the stability is lost via the magnitude of the largest Floquet multiplier crossing the unit circle. Interestingly, the values of
where stability is lost are consistently shifted towards larger values compared with the averaged model. This suggests that, by means of the digital implementation, the stability margin is noticeably increased. The inset of the figure shows also that the bifurcation occurring at instability is a Neimark–Sacker type, where two complex conjugate multipliers cross the unit circle. To see whether the stability margin keeps increasing at larger sampling periods
T, we computed the critical
as a function of
at different values of
T, as it can be seen in
Figure 4B. Indeed, we see that the general trend is that increasing
T reduces the value of
, effectively increasing the stability margin. However, this trend eventually reverses, as can be seen for the curve corresponding to
s. At around
V,
rapidly increases, implying a loss in the stabilty margin compared with smaller sampling periods. Also, as expected, as
T decreases, the switched system approaches to the
predicted by the averaged model (see the
s curve).
Next, we proceeded to compare the time evolution of the averaged and the switched system under a stable scenario. The results are shown in
Figure 5. Panels A to D show the state variables using
,
V,
V, and, for the switched system,
s. The figures show that, while the currents in the switched system oscillate quite largely due to the fast current response to the ON / OFF signal of the MOSFET, both systems evolve similarly on average, a behavior better visualized in the voltages across capacitors. Here, we can also see a slight difference in the transient response, which seems to be faster in the averaged model than the switched one.
Figure 5E depicts the evolution of the duty cycle
d, revealing a steady-state solution at around
, which coincides with the expected duty cycle calculation
. Finally,
Figure 5F plots the error percentage with respect to the reference value. In the inset of the figure, it can be observed that, while the linearized system’s error goes to zero as expected from the continuous dynamics and the effect of the PI controller, the error in the digital system remains quite low, with steady-state oscillations smaller than 0.5%.
To better understand the importance of using a centered PWM, we show in
Figure 6 the comparison between the linearized model and the digital one in a small window spanning two consecutive cycles, using
as a representative state variable. In this figure, one can see that sampling the state variables using a centered PWM guarantees that the value of the current sampled in the switched system at the beginning of the cycle (vertical dashed lines) coincides with the value of the current in the linearized system that we have used to construct the control signal. Using a trailing or edging PWM would lead to sampled values far from the averaged one across the cycle, leading to instabilities.
6. Results
In this section, we validate the performance of the controlled system under different scenarios using PSIM. The parameters of the Power Converter have been selected in such a way that the input voltage can vary in the interval [9 V, 14 V], and the output voltage is V. The commutation frequency is set to 20 kHz (s), which produces 0.4% error in the output. The load resistance is set at , which is equivalent to 80 W of power. The ripple under these conditions is 0.1 .
As previously discussed in
Section 5, we use a centered PWM, as the sampled variables in this scheme are more representative of their averaged values as required by the state averaging. We have verified that using trailing- or leading-edge modulation renders digital systems unstable.
Figure 7 shows the system’s behavior at the operating point. As expected, the system regulates with an error below 0.4% and reaches stability within 0.012 s.
Although FBL control is known to exhibit limited robustness against parameter variations, the inclusion of a PI controller in the design improves the system’s robustness to load and input voltage disturbances.
Figure 8 shows the system’s response when the reference voltage and load resistance change as follows. Until
s, the system evolves from rest to the operating point under the designed parameters. At
s, the values change to
and
V. At
s, the values are updated to
and
V, and, finally, at
s, the parameters are changed again to
and
V. The duty cycle graph shows that the system gradually converges to the desired value.
On the other hand, while the system remains stable for different values of
(see
Section 5), it has low robustness against variations in this parameter. However, since a digital control strategy is used and the system computes the duty cycle based on measured data at each instant
, the input voltage
can be fed into the controller, improving its robustness to changes in this parameter.
7. Conclusions and Future Work
In this work, we extensively analyzed the dynamics of the synchronous Zeta converter and its robustness under a control strategy based on input–output feedback linearization. By leveraging state-space averaging, we derived a nonlinear control law that effectively regulates the output voltage while ensuring the stability of the internal dynamics. However, as with any averaging approach, this method assumes that the switching frequency is sufficiently high relative to the system dynamics, which may limit its accuracy in capturing fast-scale instabilities such as period doubling and subharmonic oscillations that arise in practical implementations. For this reason the proposed controller was implemented in a digital system using a centered pulse-width modulation (PWM) scheme to ensure accurate duty cycle updates. Through detailed dynamical analysis, numerical simulations, and software-based validation using PSIM, we evaluated the performance of the controlled system and its sensitivity to various design parameters. Notably, in the digital implementation, we observed important differences in the stability properties of the averaged and switched models, showing the impact of discrete-time control and switching effects on system behavior.
One of the key findings of this study is that the digital implementation of the controller does not function properly when using trailing- or leading-edge PWM schemes, highlighting the importance of selecting an appropriate switching strategy. Additionally, our analysis demonstrated that the digitally controlled system exhibits greater robustness compared to the averaged model. Specifically, we found that increasing the sampling period improves stability margins, but only up to a certain threshold, beyond which the trend reverses, indicating the existence of an optimal sampling interval. Furthermore, we showed that, as the sampling period T decreases, the digital system increasingly resembles the state-averaged model, confirming the consistency of the proposed control approach.
Another crucial aspect of stability in the linearized system was the influence of the internal resistance of the inductor . Our results indicate that this resistance plays a fundamental role in ensuring stable operation, and its impact should be carefully considered in practical implementations. Despite these constraints, the controlled Zeta converter exhibited well-behaved dynamics and demonstrated robustness to variations in both load resistance and reference voltage. However, the system was found to be less resilient to changes in the input voltage . This limitation suggests that incorporating as an additional input to the digital controller could enhance adaptability, allowing real-time compensation for input fluctuations and further improving system performance.
Future research could explore adaptive control strategies that explicitly incorporate variations in input voltage to enhance robustness. Additionally, extending the analysis to multi-phase Zeta converters or integrating machine learning-based control techniques could provide new insights into optimizing performance under highly dynamic conditions. Another important direction is the study of how to appropriately select the sampling period T. As shown in this work, the relationship between T and stability is not monotonic, especially for large values of T, where the system no longer follows a predictable degradation pattern. This makes it difficult to establish a general rule for T selection, suggesting that future work should address this challenge using more advanced discrete-time analysis tools or optimization methods. Experimental validation on hardware platforms would also be a valuable step toward the practical implementation and further refinement of the proposed control approach.