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Article

Multi-Mode Lithium-Ion Battery Balancing Circuit Based on Forward Converter with Resonant Reset

School of Integrated Circuit Science and Engineering, Tianjin University of Technology, Tianjin 300382, China
*
Author to whom correspondence should be addressed.
Appl. Sci. 2023, 13(18), 10430; https://doi.org/10.3390/app131810430
Submission received: 3 August 2023 / Revised: 29 August 2023 / Accepted: 5 September 2023 / Published: 18 September 2023
(This article belongs to the Special Issue Advanced Integrated Circuits and Devices)

Abstract

:
A multi-mode active balancing circuit based on a forward converter with resonant reset is proposed to deal with unbalanced states of lithium-ion battery packs. The balancing circuit utilizes the forward converter, enabling high-power balancing. SPST relays are selected to constitute the switching matrix, and the proposed balancing circuit completes the connection of serial battery clusters to the main circuit by controlling the SPST relays, realizing the Multi-Cell-to-Multi-Cell (MC2MC) balancing method. An “adaptive selection mode based on the state of high energy battery” balancing strategy is proposed. The proposed balancing strategy allows the proposed balancing circuit to have multiple balancing modes, flexible balancing paths, and switching between different balancing processes in real time, significantly improving the balancing speed. The inherent LC resonant reset structure of the forward converter is employed to achieve MOSFET zero-voltage switching (ZVS). To optimize the balancing performance, the circuit model is built and the balancing parameters in the circuit are analyzed. An experiment with an eight-cell lithium-ion battery pack was performed to verify the balancing effect of the proposed circuit, and comparison with a typical balancing circuit was carried out. Experimental results show that the proposed balancing circuit has a faster balancing speed.

1. Introduction

At present, lithium-ion batteries are widely used in electric vehicles (EVs), aerospace, and energy storage systems [1,2,3] because of their high energy density, high power density, lack of memory effect, low self-discharge, and long service life [4,5,6]. However, due to variations in manufacturing tolerances, operating temperatures, and aging levels, inevitable differences exist among cells in terms of electrical parameters such as internal resistance and capacity [7]. As the number of charge/discharge cycles increases, these differences also increase, resulting in inconsistency of cells. This inconsistency can lead to battery over-charging or over-discharging, which can range from a decrease in the effective capacity and lifespan of the battery pack to severe safety incidents such as fire outbreaks and explosions. State of health (SOH) and battery balancing techniques are exploited to eliminate the aforementioned safety hazards. SOH is usually utilized in the diagnosis of lithium-ion battery health conditions. This technique allows for the screening of lithium-ion batteries with health faults and ensures proper operation of the whole battery pack. Consequently, its diagnostic results always depend on highly reliable mathematical models and analysis methods. The mathematical models and analytical methods proposed in [8,9,10] can be applied to SOH to improve the reliability and accuracy of its diagnostic results. For healthy lithium-ion batteries, battery balancing techniques are usually employed to address the inconsistency of cells in the battery pack [11,12].
Typically, battery balancing techniques are divided into two main categories: passive balancing (also called dissipative balancing) and active balancing (also called non-dissipative balancing) [13]. Passive balancing usually connects a resistor in parallel with a cell to dissipate excess energy in the cell. The advantages of this balancing method include simple circuit structure, low circuit cost, and lack of requirement of complex control strategies, but the thermal management problem caused by energy consumption is the main drawback of this method [14,15]. Active balancing uses active circuits to transfer energy from a high-energy cell to a low-energy cell. It is important to mention that active balancing and its circuits are now widely applied in PV to address the adverse effects of partial shading conditions (PSCs) on series-connected PV modules/submodules, removing the obstacles to maximum power extraction [16,17,18,19]. According to the path of energy transfer during balancing, active balancing can be further divided into the following categories: Adjacent Cell-to-Cell (AC2C), Direct Cell-to-Cell (DC2C), Cell-to-Pack (C2P), Pack-to-Cell (P2C), Any Cell-to Any Cell (AC2AC), and Multicell-to-Multicell (MC2MC) [20].
The characteristic of Adjacent Cell-to-Cell (AC2C) is the transfer of energy by setting balancing main circuits between adjacent cells [21,22,23,24]. The advantage of this approach is that the whole balancing circuit can be controlled using an easy approach, and the balancing process has high reliability. However, when the cells involved in balancing are located far apart, the balancing energy needs to be sequentially transferred through multiple balancing main circuits, resulting in slow balancing speed and energy loss during the balancing process, thereby reducing the balancing efficiency. To address the drawbacks of AC2C, Direct Cell-to-Cell (DC2C) is studied in [25,26,27]. Compared to AC2C, DC2C typically requires only a single universal circuit for balancing, simplifying the structural design of the balancing circuit and reducing cost. In addition, since the balancing energy can be directly transferred between any two cells, DC2C addresses the problem present in AC2C where the energy transfer efficiency is low when the cells being equalized are located far apart, thus improving balancing efficiency. However, the disadvantage of DC2C is also obvious: only two cells can be balanced at a time, which means that when a larger number of cells are involved in the balancing process, the other cells have to wait, resulting in longer balancing time.
Cell-to-Pack (C2P), as shown in [28,29,30], involves transferring energy from a cell to the whole battery pack. When there are few cells with high power, the C2P balancing method can improve balancing. However, the balancing speed of this method is very slow when there is only one cell with low power in the pack. In contrast to C2P, Pack-to-Cell (P2C), as shown in [31,32], refers to the transfer of energy from the whole battery pack to a cell. This approach enhances balancing speed when there are fewer cells with low power. Like C2P, the balancing speed of P2C is also very slow when there is only one cell with high power in the battery pack. Furthermore, C2P and P2C will suffer from external energy loss due to the unrelated cells in the battery pack being charged or discharged.
Any Cell-to-Any Cell (AC2AC), as shown in [33,34,35], can realize transmission of energy between any cells. The advantage of this approach is that any cell within the battery pack can participate in the balancing process and transfer energy to the target cell, thereby improving balancing efficiency and reducing unnecessary energy loss. However, each cell needs to be equipped with a balancing main circuit to implement this method. Although the circuit is scalable, it can easily lead to complexities and high cost. Furthermore, modular design can also result in inevitable parameter variations among the balancing main circuits. For example, Shang et al. [33] used a multi-winding transformer as the balancing main circuit, which offers the advantages of small size and low cost. However, ensuring the consistency of each winding’s parameter is challenging. Zhou et al. [34] used switched capacitors to implement AC2AC, leading to lower complexity and ease of scalability. However, the massive use of capacitors and MOSFETs in the circuit leads to parameter variations among the components and increased cost. In [35], Altemose et al. used a resonant reset forward converter to achieve balancing. This type of forward converter has a simple structure and achieves demagnetization through LC resonance between the excitation inductance on the primary side of the converter and the capacitors connected in parallel to the MOSFETs. Additionally, this circuit features low design complexity and ease of scalability. However, the widespread use of forward converters increases circuit cost and mismatch issues can arise due to variations in the inductance values of the converter and resonant capacitance of the resonant capacitor in practice. In addition, AC2AC balancing is typically performed automatically based on the voltage (or SOC) of each cell within the battery pack. This results in a dispersed energy transfer during the balancing process, leading to longer balancing times.
Compared with the aforementioned balancing methods, Multi-Cell-to-Multi-Cell (MC2MC) [36,37,38] not only allows multiple cells to participate in a single balancing process for energy transfer, but also enables energy transfer between battery clusters. The concentration of energy transfer during the balancing process enhances balancing speed and reduces energy losses during the transfer. The circuit structure of MC2MC is typically composed of a common balancing main circuit and a switch matrix. Shang et al. [36] proposed a balancing circuit based on a matrix LC resonant converter (MLCC) balancing circuit, which consists of an LC resonant converter and a relay matrix. This balancing circuit features a simple circuit structure and low cost. Luo. X et al. [37] proposed a balancing circuit based on a bipolar-resonant LC converter (BRLCC), which utilizes an LC resonant converter as the balancing main circuit and introduces a symmetrical switch matrix composed of bidirectional MOSFETs, further simplifying the structure of the switch matrix. Luo. S et al. [38] proposed a balancing circuit based on a Buck-Boost converter, which simplifies the structure of the switch matrix through cell grouping. However, the LC resonant converters used in [36,37,38] often require bulky magnetic components and high-voltage switches when applied to balance high-voltage and large-capacity battery packs [39]. Additionally, the use of numerous MOSFETs in the switch matrix in [37] not only requires complex driver circuits, increasing circuit costs, but also adds complexity to circuit control. Although the structure of the switch matrix is simplified in [38], there is a possibility of circuit malfunction when cells within the same group are involved in balancing, indicating a lower robustness of the circuit.
In general, the MC2MC balancing circuits proposed so far have improved balancing speed, but there is still room for optimizing balancing power, circuit cost, design, and control. Compared with the aforementioned converters, transformer-based balancing circuits offer advantages such as simplified control and easy isolation [39].
In this article, a lithium-ion battery active balancing circuit based on a forward converter with resonant reset and a relay matrix is proposed. The MC2MC balancing method is realized by the proposed balancing circuit. The balancing main circuit utilizes the forward converter. It has a simple control method and enables high-power balancing. Compared to the switching matrix consisting of a MOSFET, the switching matrix consisting of relay is easier to drive and control. As a result, the costs of the balancing circuit are reduced.
The contributions of this paper are as follows: The proposed balancing circuit based on a forward converter with resonant reset is an improvement and optimization of the work presented in [35], while also referencing the switch matrix proposed in [36] for circuit design. These works simplify the structure of the balancing circuit and increase the balancing power. Furthermore, an “adaptive selection mode based on the state of high energy battery” balancing strategy is proposed. This strategy provides the proposed balancing circuit with multiple balancing modes and flexible balancing paths to deal with unbalancing states, thereby improving the balancing speed.
The remaining sections of this paper are organized as follows. Section 2 presents the balancing circuit structure and operating principle of the proposed topology, along with parameter analysis. Section 3 verifies the proposed balancing circuit through simulation of a six-cell battery circuit and analyzes the balancing performance. Section 4 introduces the “adaptive selection model based on the state of high energy battery” balancing strategy. Section 5 describes the experimental setup, where an eight-cell battery pack configuration is selected to validate the effectiveness of the proposed balancing circuit and strategy. The discussion and comparison of the balancing circuit is presented in Section 6. Finally, Section 7 provides the conclusions of this paper.

2. Balancing Circuit

2.1. Circuit Structure

Two forward converters with resonant reset and relay matrix are used for the design of the balancing circuit in this paper. The balancing circuit structure having n cells is shown in Figure 1. The balancing main circuit is improved by [35]. The modular bi-directional forward converters with resonant reset in [35] are improved via the use of two forward converters connected by energy transmission lines. Therefore, the structure of the proposed balancing circuit is symmetrical. By controlling the switching matrix, high-energy batteries and low-energy batteries will be connected to the ports on both sides for energy balancing in the form of cells or clusters. To simplify the control of the balancing circuit, the left side of the balancing main circuit is set as the access port of the high-energy cells; this is also called the energy-sending side. The positive and the negative terminals of the high-energy cells and ports are connected by S11~S1n and S21~S2n, respectively. The right side of the balancing main circuit is set as the access port of the low-energy cells; this also is called the energy-receiving side. The positive and the negative terminals of the low-energy cells and ports are connected by S41~S4n and S31~S3n, respectively. Considering the design of the drive circuit and the voltage stress of the components, SPST relays are selected for the switching matrix, while the 74HC595 is used as its main drive component.
The balancing main circuit consists of two forward converters with resonant reset and driver circuits. The LC resonant circuit is composed of the primary side excitation inductor of the forward converter and the capacitor, and the forward converter is reset during LC resonance. To reduce the MOSFET switching loss, ZVS is achieved by this structure during resonance. Because no MOSFET drive circuit scheme is given in ref. [35], this paper shows a specific MOSFET drive circuit design: the UCC27524 chip is used for signal driving and the level conversion is completed by the filter capacitor, pull-up resistor, and voltage regulator diode. Therefore, the conduction of MOSFETs is ensured normally. Furthermore, by adjusting the turn ratio of the converters, the larger power transmission of the balancing main circuit is obtained.

2.2. Operation Principle

MC2MC is the balancing approach of this circuit, and it can be divided into two modes: n-cell-to-n-cell (n ≥ 1) and n-cell-to-(n−1)-cell (n ≥ 2). In this section, the operation principle of the balancing main circuit is introduced using a six-cell battery pack as an example.
Mode-1 (n-cell-to-n-cell): This mode is presented as an example of a three-cell-to-three-cell balancing. Assuming B4, B5, B6 are high-energy cells and B1, B2, B3 are low-energy cells, as shown in Figure 2, currently, the balancing process is as follows: S16 and S24 are closed to connect the energy-sending side. S31 and S43 are closed to connect the energy-receiving side. Currently, a voltage difference is produced on the energy transmission line of the balancing main circuit by voltage mapping of two primary side inductors of the forward converters. The transferred current will transmit energy from high-energy cells to low-energy cells.
Mode-2 (n-cell-to-(n-1)-cell): This mode is described by three-cell-to-two-cell balancing as an example. Assume that B4, B5, and B6 are high-energy cells and B1 and B2 are low-energy cells, as shown in Figure 3. The balancing process currently is as follows: S16 and S24 are closed to connect the energy-sending side. S31 and S42 are closed to connect the energy-receiving side. For now, a voltage difference is produced on the energy transmission line of the balancing main circuit by voltage mapping of two primary side inductors of the forward converters. The transferred current will transmit energy from high-energy cells to low-energy cells.

2.3. Circuit Analysis

Figure 4 shows the equivalent circuit of the balancing main circuit in Figure 1. In Figure 4, ignoring the internal resistors of MOSFETs, the internal resistor of the primary and secondary side coils of the forward converter is expressed by RT1a, RT2a, RT1b, and RT2b. The output resistors of the forward converters are represented by Ro1 and Ro2; UH and UL denote the voltage of the high-energy cell and the voltage of the low-energy cell, respectively. The excitation inductors of the primary side of the forward converter are reflected by Lm1 and Lm2. Cr1 and Cr2 denote the resonant capacitors.
Because the balancing main circuit is symmetrical, operational waveforms of one forward converter during one cycle are shown in Figure 5. According to the different balancing model, they are divided into Figure 5a,b. The voltage of the high- energy cells and the low-energy cells is represented by UB, and the current of the primary side circuit of the forward converter is reflected by ia. The balancing process in one switching cycle is divided into five steps as follows.
For the convenience of analysis, resistance parameters in Figure 4 will be replaced by RTa, RTb, and Ro.
Stage1 [t0~t1]: At t0, the MOSFETs are turned on. The transformer’s secondary side maps out N times the primary side voltage, and the transmission current is produced on the energy transmission line. N times transmission currents are generated in the primary side coil of the forward converters, and the currents of the excitation inductors Lm1 and Lm2 increase at the slopes of d i L m 1 d t and d i L m 2 d t . At t0~t1, the voltages mapped out on the secondary side of the two forward converters are presented as follows:
U T 1 b = N U T 1 a = N ( U L + N R T a I T R A N S ) U T 2 b = N U T 1 b = N ( U H N R T a I T R A N S )
where N = N 2 N 1 is the inverse of the forward converter turns ratio, and the expression of the transmission current is:
I T R A N S = U T 2 b U T 1 b 2 ( R T b + R o )
Combining (1) and (2), the final equation of the transmission current is:
I T R A N S = N ( U H U L ) 2 ( N 2 R T a + R T b + R o )
Thus, the average current of energy transfer during one switching cycle is achieved by:
I A V G = 0 T o n t I T R A N S d t T S
Substituting in T o n = D T S , IAVG can be expressed as:
I A V G = D I T R A N S = D N ( U H U L ) 2 ( N 2 R T a + R T b + R o )
Therefore, the primary side currents iT1a, iT2a of the forward converter are presented as:
i T 1 a = N I T R A N S = N 2 ( U H U L ) 2 ( N 2 R T a + R T b + R o ) i T 2 a = N I T R A N S = N 2 ( U H U L ) 2 ( N 2 R T a + R T b + R o )
and the secondary side currents iT1b, iT2b are expressed as:
i T 1 b = I T R A N S = N ( U H U L ) 2 ( N 2 R T a + R T b + R o ) i T 2 b = I T R A N S = N ( U H U L ) 2 ( N 2 R T a + R T b + R o )
At t0, the excitation currents iLm1 and iLm2 of the forward converters can be calculated by (8):
i L m 1 ( t ) = t 0 t t U L d t L m 1 i L m 2 ( t ) = t 0 t t U H d t L m 2
According to (6) to (8), at t0, i1 and i2 in the two primary circuits can be deduced, respectively, as:
i 1 ( t ) = i L m 1 ( t ) + i T 1 a = ( t t 0 ) U L L m 1 - N 2 ( U H U L ) 2 ( N 2 R T a + R T b + R o ) i 2 ( t ) = i L m 2 ( t ) + i T 2 a = ( t t 0 ) U H L m 2 + N 2 ( U H U L ) 2 ( N 2 R T a + R T b + R o )
At t1, the excitation currents iLm1 and iLm2 of the forward converters can be calculated by (10):
i L m 1 ( t 1 ) = ( t 1 t 0 ) U L L m 1 = D T S U L L m 1 i L m 2 ( t 1 ) = ( t 1 t 0 ) U H L m 2 = D T S U H L m 2
According to (9) and (10), at t1, i1 and i2 in the two primary circuits can be deduced, respectively, as:
i 1 ( t 1 ) = i L m 1 ( t 1 ) + i T 1 a = 2 D T S U L ( N 2 R T a + R T b + R o ) N 2 L m 1 ( U H U L ) 2 L m 1 ( N 2 R T a + R T b + R o ) i 2 ( t 1 ) = i L m 2 ( t 1 ) + i T 2 a = 2 D T S U H ( N 2 R T a + R T b + R o ) N 2 L m 2 ( U H U L ) 2 L m 2 ( N 2 R T a + R T b + R o )
Stage 2 [t1~t2]: At t1, MOSFETs are turned off, Lm and Cr begin to resonate, and the circuit enters the resonant state. Because the voltage added to the excitation inductor is still positive at this time, the excitation currents iLm1 and iLm2 will continue to increase. Charges are accumulated on the resonant capacitors Cr1 and Cr2, respectively, and the resonant capacitors are charged. At t2, the resonant capacitors Cr1 and Cr2 are charged to the voltage of cells UH and UL, differently, and the voltage drops across the excitation inductors are zero. iLm1 and iLm2 reach the maximum values of iLm1 (max) and iLm2 (max), respectively.
Thus, the relationship between resonant current and resonant voltage in the balancing circuit at t1 can be expressed by (12) and (13):
U L = L m 1 d i L m 1 ( t ) d t + U C r 1 ( t ) U H = L m 2 d i L m 2 ( t ) d t + U C r 2 ( t )
i L m 1 ( t ) = C r 1 d U C r 1 ( t ) d t i L m 2 ( t ) = C r 2 d U C r 2 ( t ) d t
From (12) and (13), resonant current and resonant voltage are respectively calculated using:
U C r 1 ( t ) = U L U L cos t t 1 L m 1 C r 1 + i L m 1 ( t 1 ) L m 1 C r 1 sin t t 1 L m 1 C r 1 U C r 2 ( t ) = U H U H cos t t 1 L m 2 C r 2 + i L m 2 ( t 1 ) L m 2 C r 2 sin t t 1 L m 2 C r 2
i L m 1 ( t ) = i L m 1 ( t 1 ) cos t t 1 L m 1 C r 1 + U L C r 1 L m 1 sin t t 1 L m 1 C r 1 i L m 2 ( t ) = i L m 2 ( t 1 ) cos t t 1 L m 2 C r 2 + U H C r 2 L m 2 sin t t 1 L m 2 C r 2
Stage 3 [t2~t3]: At t2, Cr1 and Cr2 continue to charge by Lm1 and Lm2. At the same time, UCr1 and UCr2 reach their maximum values UCr1 (max) and UCr2 (max) at t3, while iLm1 and iLm2 decrease to zero to achieve a magnetic reset.
Resonant current and resonant voltage at t2 can be expressed as:
U C r 1 ( t ) = U L + i L m 1 ( t 2 ) L m 1 C r 1 sin t t 2 L m 1 C r 1 U C r 2 ( t ) = U H + i L m 2 ( t 2 ) L m 2 C r 2 sin t t 2 L m 2 C r 2
i L m 1 ( t ) = i L m 1 ( t 2 ) cos t t 2 L m 1 C r 1 i L m 2 ( t ) = i L m 2 ( t 2 ) cos t t 2 L m 2 C r 2
Stage 4 [t3~t4]: At t3, the resonant capacitors Cr1 and Cr2 are discharged, the excitation inductors Lm1 and Lm2 are stored, and the excitation currents iLm1 and iLm2 are increased in the reverse direction.
The expressions of the resonant current and the resonant voltage are expressed as:
U C r 1 ( t ) = U L + [ U C r 1 ( t 3 ) U L ] cos t t 3 L m 1 C r 1 U C r 2 ( t ) = U H + [ U C r 2 ( t 3 ) U H ] cos t t 3 L m 2 C r 2
i L m 1 ( t ) = C r 1 L m 1 [ U C r 1 ( t 3 ) U L ] sin t t 3 L m 1 C r 1 i L m 2 ( t ) = C r 2 L m 2 [ U C r 2 ( t 3 ) U H ] sin t t 3 L m 2 C r 2
Stage 5 [t4~t5]: At t4, the resonant capacitors Cr1 and Cr2 discharge again to UH and UL, and the excitation currents iLm1 and iLm2 reach the reverse maximum iLm1 (max) and iLm2 (max). At t5, the resonant capacitor discharges to zero, at which point MOSFETs are opened again with ZVS and the balancing circuit enters the next stage of balancing.
In this stage, the resonant current and the resonant voltage are calculated by:
U C r 1 ( t ) = U L + i L m 1 ( t 4 ) L m 1 C r 1 sin t t 4 L m 1 C r 1 U C r 2 ( t ) = U H + i L m 2 ( t 4 ) L m 2 C r 2 sin t t 4 L m 2 C r 2
i L m 1 ( t ) = i L m 1 ( t 4 ) cos t t 4 L m 1 C r 1 i L m 2 ( t ) = i L m 2 ( t 4 ) cos t t 4 L m 2 C r 2

2.4. ZVS Analysis

According to Figure 5, when the turn-off time of the MOSFETs’ conduction equals the resonant capacitors’ charging and discharging time, the voltage of the MOSFETs at the time of turn-on and turn-off is zero; then, ZVS can be achieved. During the turn-off time of the MOSFETs, the charging and discharging waveforms of the capacitor are symmetrical and the balancing parameters are the same. Thus, Lm1 = Lm2 and Cr1 = Cr2 are replaced by Lm and Cr, respectively.
In Figure 4a, Q1 and Q2 are controlled by the same clock; therefore, they have the same duration. The duration time of each stage can be obtained from (14) to (21):
t 2 t 1 = arccot L m i L m ( t 1 ) C r U B L m C r t 3 t 2 = π 2 L m C r t 4 t 3 = π 2 L m C r t 5 t 4 = arcsin C r U B L m i L m ( t 4 ) L m C r
where iLm(t) replaces iLm1(t) and iLm2(t), and UB replaces UH and UL.
According to (22), the following relationship can be obtained:
t 3 t 2 = t 4 t 3 = π 2 L m C r
Therefore, Tr in Figure 5 can be calculated by:
T r = π L m C r
According to (23), when t2 − t1 and t5 − t4 satisfy (25), ZVS can be realized normally in Toff:
t 2 t 1 = t 5 t 4
We assume that:
α 1 = arccot L m i L m ( t 1 ) C r U B α 2 = arcsin C r U B L m i L m ( t 4 )
If and only if α1 and α2 satisfy the following equation, (25) is true:
α 1 = α 2 = 13 π 45
According to (23) and (27), Tc can be calculated by:
T c = 26 π 45 L m C r
From Figure 5, it can be seen that:
T off = T c + T r = 71 π 45 L m C r
The duty cycle of the balancing circuit to realize ZVS can be expressed as:
D = 1 T o f f T S = 1 71 π L m C r 45 T S
In summary, the duty cycle of the MOSFETs to realize ZVS at any switching cycle TS can be calculated by (30).

3. Analysis and Verification

3.1. Verification

A simulation balancing circuit model was built in Saber to verify the function of the proposed balancing circuit and the duty cycle of the ZVS of the implemented MOSFETs analyzed in Section 2. The circuit parameters are selected as shown in Table 1; the voltages of the high-energy cells involved in balancing are set to 3.92 V and the voltages of the low-energy cells are set to 3.72 V.

3.1.1. Verification of Balancing Circuit

The waveform diagrams of the proposed balancing circuit simulation are given in Figure 6. Figure 6a,b shows waveforms of one-cell-to-one-cell balancing mode in Ts = 40 μs and Ts = 50 μs, respectively. Figure 6c,d shows waveforms of two-cell-to-one-cell balancing mode in Ts = 40 μs and Ts = 50 μs, respectively. These waveforms illustrate that the function of the proposed balancing circuit is reasonable.

3.1.2. Verification of ZVS

ZVS is verified in three-cell-to-three-cell balancing mode. Table 2 shows theoretical values of the duty cycle calculated from Equation (30) and simulation values of the duty cycle at different switching periods.
Table 2 illustrates that in both the theoretical and calculated values, when TS is increased, the duty cycle is increased. The main reason for the error between the theoretical and simulated values in Table 2 is the time step setting of the simulation.

3.2. Analysis of Balancing Performance

In the case of MOSFETs accomplishing ZVS, at t1, the power of the primary circuit at the energy-sending side is set to Pin and the power of the primary circuit at the energy-receiving side is set to Pout. According to expressions (11), Pin and Pout are obtained:
P i n = 0 T o n i 2 ( t ) U H d t T S = U H [ 2 D T S U H ( N 2 R T a + R T b + R o ) + N 2 L m 2 ( U H U L ) ] 2 T S L m 2 ( N 2 R T a + R T b + R o )
P o u t = 0 T o n i 1 ( t ) U L d t T S = U L [ 2 D T S U L ( N 2 R T a + R T b + R o ) + N 2 L m 1 ( U H U L ) ] 2 T S L m 1 ( N 2 R T a + R T b + R o )
The efficiency of the balancing circuit is obtained by (31) and (32) as:
η = P o u t P i n = 0 T o n i 1 ( t ) U L d t T S 0 T o n i 2 ( t ) U H d t T S = U L [ 2 D T S U L ( N 2 R T a + R T b + R o ) + N 2 L m 1 ( U H U L ) ] U H [ 2 D T S U H ( N 2 R T a + R T b + R o ) + N 2 L m 2 ( U H U L ) ]

3.3. Influencing Factors of Balancing Performance

The quality of the balancing circuit is usually judged by balancing efficiency and balancing time. The relevant parameters in (33) for the effects of balancing efficiency are analyzed in this paper. From (3)–(5), (31), and (32), when a certain quantity of charges is transferred to the target cells, the average current will be larger, and the transfer power will be higher if the transfer current is larger, meaning the balancing time will be shorter. Therefore, the relationship between the relevant parameters in (31) and (32) and the balancing time is also analyzed in this paper.
To analyze the relevant parameters in terms of the influence of balancing performance, a six-cell simulation balancing circuit was built in MATLAB/Simulink. The balancing circuit simulation parameters were set according to Table 1, and the voltage of the high-energy cells and the voltage of the low-energy cells involved in balancing were set according to Section 3.1.

3.3.1. Effect of Converter Turn Ratios

According to (31)–(33), balancing performances are impacted by the forward converter turn ratio. In this section, the three turn ratios are analyzed for different cases. The three-cell-to-three-cell balancing mode is chosen and the switching period is selected as TS = 40 μs to develop the circuit simulation. The relationships between different converter turn ratios and balancing performances are shown in Figure 7.
From Figure 7, when the turn ratios are enlarged, the input power Pin and output power Pout of the balancing main circuit are increased, and the balancing time is shortened. However, the balancing efficiency is not affected. In principle, the turn ratio of the forward converter should be set larger to achieve higher power energy transmission. However, when the turn ratio of the forward converters iare enlarged, the voltage error of the cells is increased. Therefore, with high-power balancing, more moderate turn ratios are set. Based on the data in Figure 7, the turn ratio of the forward converters is chosen to be 1:2 in this paper.

3.3.2. Effect of Switching Cycles

According to analysis of (31)–(33), balancing performances are influenced by the switching period and duty cycle. As can be seen from Table 2, duty cycles have a positive relationship with switching periods. Therefore, the effect of the switching periods on the balancing performances is only discussed in this section. In addition to setting the associated voltages of cells and balancing circuit parameters, all relevant balancing modes are simulated and analyzed in this section.
The relationships between the switching period and balancing performances are shown in Figure 8. In Figure 8a,b, for any balancing mode, when the switching period is increased, Pin and Pout are increased. Figure 8c shows that for any balancing model, balancing efficiency is less influenced by the change in the switching period. From Figure 8d, balancing time and switching period are inversely related in any balancing mode. In summary, increasing the switching period has less effect on the balancing efficiency, but Pin and Pout are enlarged by this increase. Then, the balancing time is shortened, helping to improve the balancing speed.

3.3.3. Effect of Output Resistances

The three-cell-to-three-cell balancing mode with Ro1 = Ro2 = 1 Ω and Ro1 = Ro2 = 5 Ω is selected for simulation to study the relationships between output resistors and balance performances. The results are shown in Figure 9.
According to Figure 9a,b, when the switching cycles are the same, Pin and Pout corresponding to the balancing circuit are decreased by the increase in the output resistances. Figure 9c shows that changing the output resistors leads to a smaller effect on the balancing efficiency for the same switching period. Figure 9d, for the same switching cycle, the longer balancing time results from larger output resistances. In summary, smaller output resistances help to increase Pin and Pout, and a shorter balancing time and faster balancing speed will be obtained.

3.3.4. Effect of Balancing Modes

Compared with the traditional AC2AC balancing, a variety of different balancing model switching types can be achieved by the MC2MC balancing in this paper. Because the number of cells connected to the balancing main circuit varies for different balancing modes, different voltage differences in the balancing main circuit and different balancing effects are obtained. Therefore, it is necessary to explore the effect of different voltage differences on the balancing performances. A switching period of TS = 40 μs is chosen to simulate the relevant balancing models. The relationship between various voltage differences and balancing performances is shown in Figure 10.
According to Figure 10, the balancing efficiency of the n-cell-to-n-cell mode is higher than that of the n-cell-to-(n-1)-cell mode, and the balancing time of the n-cell-to-(n-1)-cell mode is shorter than that of the n-cell-to-n-cell mode. This conclusion illustrates that the best effect of the balancing efficiency is ensured by the proposed balancing circuit performing the n-cell-to-n-cell balancing mode, and the best effect of the balancing speed is ensured by the circuit performing the n-cell-to-(n-1)-cell balancing mode.

4. Balancing Strategy

Based on the analysis of Section 3, to take full advantage of this balancing circuit, an “adaptive selection mode based on the state of high energy battery” balancing strategy is proposed. In this strategy, suitable balancing modes of the balancing system are selected after matching the number of high-energy cell clusters to the number of low-energy cell clusters. Uref1 and Uref2 are two key parameters in the process and are set in the balancing strategy according to the circuit operation requirements. The execution flow of the balancing strategy is shown in Figure 11. The balancing strategy is divided into five main steps:
(1)
The voltage of each cell in the battery pack is measured. Umax and Umin are found by the measured voltages. Then the numbers of cells of Umax and Umin are recorded.
(2)
(Umax − Umin) is calculated and compared with Uref1. If (Umax − Umin) > Uref1, the balancing circuit is activated. If (Umax − Umin) ≤ Uref1, the system is stopped to enter the balancing operation.
(3)
When the balancing system is controlled to enter the balancing state, Uavg is calculated, and (Ui − Uavg) is calculated with Ui. Then (Ui − Uavg) is compared with Uref2. If (Ui − Uavg) ≥ Uref2, the cell is identified as a high-energy cell. If (Ui − Uavg) ≤ −Uref2, the cell is identified as a low-energy cell.
(4)
The numbers of high-energy cells and low-energy cells involved in balancing are counted, and their numbers are noted as a and b. The balancing mode is selected according to the result of the comparison of a and b.
(5)
After completing the above operations, the balancing system enters a waiting state, and the next cycle is entered by the balancing system.
Figure 11. The process of the proposed balancing strategy.
Figure 11. The process of the proposed balancing strategy.
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In this paper, Uref1 and Uref2 are set to 0.05 V and 0.01 V, respectively.

5. Experiments and Analysis

In this section, the following points are covered: The photographs of the prototype and experimental platform are shown first. Second, the key parameters are presented. These are important. Third, the verification waveforms of the prototype at Ts = 40 μs and Ts = 50 μs are shown to illustrate the feasibility of the proposed balancing circuit. Finally, experimental results are presented while the key experimental metrics are compared with [35] to verify the advantages of the proposed balancing circuit.

5.1. Experimental Parameters

Photographs of the experiment prototype and the experiment platform are shown in Figure 12. The parameters of the balancing experiment are shown in Table 3. In the balancing experimental system, firstly, the voltages of cells are sampled and sent to STM32 by the voltage sampling circuit. These data are processed and uploaded to the host computer by the main control program. Based on the determination of the processed data, the associated relays are closed by the main program controlling the 74 HC595, and the balancing process of the system is entered.

5.2. Prototype Verification

To verify the balancing circuit, the verification waveforms are shown in Figure 13 for one-cell-to-one-cell and two-cell-to-one-cell modes in switching periods of 40 μs and 50 μs, respectively. Figure 13 shows that both the waveform analysis and the function of the proposed balancing circuit are reasonable. Figure 13 shows that ZVS in all switching periods is achieved by the MOSFETs, and the duty cycles of achieving ZVS are 66% and 73%. They satisfy the relationship of the duty cycle increasing with the switching period in Section 3. They are in general agreement with the theoretical calculations in Table 2, and the correctness of (30) is proven.

5.3. Experimental Results

According to the conclusion in Section 3, TS = 50 μs is chosen as the switching period of the MOSFETs in the experiment since different switching periods of MOSFETs have a small effect on the balancing efficiency, but a large effect on the balancing speed.
The balancing experiment of an eight-cell lithium-ion battery pack under charging with 1A is performed. Initial voltages are UB1 = 2.951 V, UB2 = 2.898 V, UB3 = 2.841 V, UB4 = 2.865 V, UB5 = 2.921 V, UB6 = 3.678 V, UB7 = 3.663 V, and UB8 = 3.435 V, and the balancing result is shown in Figure 14. The comparison of the balancing result with the balancing circuit in [35] is shown in Table 4.
As shown in Figure 14 and Table 4, the balancing time to reach the maximum voltage difference of 0.05 V in the balancing circuit of [35] is about 7250 s. In contrast, only 1260 s is taken to reach the maximum voltage difference of 0.042 V, and the balancing time is increased by 82.5%. Finally, in the proposed balancing circuit, all voltages of the cells converge to 3.151~3.193 V and the maximum efficiency of the proposed balancing circuit is about 83.31%. Therefore, a good balancing effect is demonstrated by the proposed balancing circuit.

6. Discussion

This section systematically evaluates the balancing circuits in terms of their size, cost, balancing speed, and switch driving. Assuming a battery pack is composed of n cells, the component requirements for different balancing circuits are shown in Table 5.
To provide a more detailed comparison of different balancing circuits, a battery pack of eight cells is selected for analysis in Table 5. The component prices were referenced from [30], where the approximate unit prices for each component are as follows: M (MOSFET, USD 0.2), D (Diode, USD 0.15), L (Inductor, USD 0.6), C (Capacitor, USD 0.2), RE (Relay, USD 0.2), T (Transformer, USD 1), DR (Switch Driver IC, USD 0.8).
According to the comparisons in Table 5 and Table 6, the SC circuit in [24] needs 2n MOSFETs to switch, and it requires n-1 capacitors and inductors for ZCS, resulting in a larger circuit size Although each switch is configured with a driver IC, the control of each switch group is achieved through a pair of complementary PWM signals, simplifying the overall driving scheme. However, the inclusion of numerous driver ICs, MOSFETs, inductors, and capacitors significantly increases the cost of the balancing circuit. Furthermore, the AC2C balancing approach employed by this circuit leads to long balancing time and slower speed, which remains its major drawback.
The LCSR circuit utilized in [26] results in a significant reduction in the size of the balancing circuit and enables ZCS, thus reducing switching loss. However, the use of bipolar switches in the switch matrix of the circuit still requires many MOSFETs to be implemented, which increases the complexity of the driver design. Although only one inductor and capacitor are needed, the adoption of bipolar switches still requires a large number of driver ICs, resulting in relatively high cost. In addition, this circuit achieves DC2C balancing, which is faster than AC2C, but the overall balancing speed is generally moderate.
In [30], C2P balancing is achieved by multi-winding flyback converters. Although a certain number of MOSFETs and ICs are needed to be switches and drivers, no additional inductor and capacitor are required in this circuit. As a result, the circuit structure is simple, and the design of the drive scheme is easy. Therefore, the circuit has low cost and a small size. However, this balancing circuit requires a longer balancing time and the balancing speed is moderate.
In [35], the modularized forward converter with resonant reset introduces size and cost issues for the circuit. It achieves AC2AC balancing, but the energy transfer is more dispersed, resulting in a longer balancing time for the circuit. In terms of switch driving, the adoption of phase-locked loop control simplifies the design of the driving scheme.
Like [26], the HBLC circuit in ref. [37] only uses one inductor and capacitor. It has a smaller size and reduces switch losses by achieving ZCS. However, the extensive use of bipolar switches and the implementation of MC2MC balancing make the design of switch driving more challenging, resulting in higher cost. Although the circuit achieves shorter balancing time through MC2MC balancing, further reduction in balancing time would require lager inductors and capacitors, leading to an increase in the size of the circuit.
Based on the comparisons above, the balancing circuit proposed in this paper has a fast balancing speed and a simple structure of balancing the main circuit. Additionally, the ZVS of MOSFETs is realized by using the inherent LC structures of the converters and the switching losses are reduced. Moreover, the use of fewer MOSFETs simplifies the design of switch driving, as it only requires a single UCC27524 chip. Consequently, the proposed circuit has a lower cost. However, the large number of relays employed leads to the large size of the proposed balancing circuit, which is the significant limitation of this balancing circuit.

7. Conclusions

A symmetrical lithium-ion battery active balancing circuit based on a forward converter with resonant reset is proposed in this paper, and an “adaptive selection mode based on the state of high energy battery” balancing strategy is proposed. As a result of this balancing method, the lithium-ion batteries have greater balancing power and faster balancing speed during balancing. The following conclusions can be drawn:
  • The proposed balancing circuit utilizes a forward converter to achieve high-power balancing.
  • A switching matrix consisting of an SPST relay realizes the MC2MC (Multi-Cell-to-Multi-Cell)) balancing method, simplifies the structure of the balancing circuit, makes the circuit easier to drive and control, and reduces the cost of the balancing circuit.
  • The proposed balancing strategy allows the balancing circuit to have both n-cell-to-n-cell and n-cell-to-(n-1)-cell balancing modes and provides a flexible transmission path for energy.
  • An experiment with an eight-cell lithium-ion battery pack was performed. The experiment result at 1260 s shows that the proposed method has a fast balancing speed, and the comparison with [31] shows that the balancing time in the proposed method is reduced by about 82.5%. Moreover, the maximum balancing efficiency of the proposed method is about 83.31%. Consequently, the proposed method has a good balancing performance.
In the proposed method, the switching matrix consisting of the SPST relay is easy to drive and control; however, this results in the balancing circuit having a large size. This is the most significant limitation of the proposed method. In the future, a key work of the MC2MC balancing circuit will be to study the switching matrix having a simple drive method and smaller size.

Author Contributions

Conceptualization, Y.Z. and K.L.; Methodology, Y.Z. and K.L.; Software, Y.Z.; Validation, K.L.; Formal analysis, Y.Z. and K.L.; Data curation, Y.Z. and Q.W.; Writing—original draft, Y.Z.; Writing—review & editing, K.L.; Visualization, Y.Z., Q.W. and J.M.; Supervision, K.L.; Project administration, K.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

The research data in this paper are presented in the manuscript in the form of graphs or tables, which can be viewed in the manuscript.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Proposed balancing circuit.
Figure 1. Proposed balancing circuit.
Applsci 13 10430 g001
Figure 2. Three-cell-to-three-cell balancing.
Figure 2. Three-cell-to-three-cell balancing.
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Figure 3. Three-cell-to-two-cell balancing.
Figure 3. Three-cell-to-two-cell balancing.
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Figure 4. Equivalent circuit and current-flow paths: (a) equivalent circuit, (b) Stage 1, (c) Stage 2, (d) Stage 3, (e) Stage 4, (f) Stage 5.
Figure 4. Equivalent circuit and current-flow paths: (a) equivalent circuit, (b) Stage 1, (c) Stage 2, (d) Stage 3, (e) Stage 4, (f) Stage 5.
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Figure 5. Operational waveforms of the balancing main circuit voltage and current: (a) n-cell-to-n-cell balancing mode, (b) n-cell-to-(n-1)-cell balancing mode.
Figure 5. Operational waveforms of the balancing main circuit voltage and current: (a) n-cell-to-n-cell balancing mode, (b) n-cell-to-(n-1)-cell balancing mode.
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Figure 6. Simulation waveforms of balancing circuit: (a,b) one-cell-to-one-cell balancing mode, Ts = 40 μs, Ts = 50 μs, (c,d) two-cell-to-one-cell balancing mode, Ts = 40 μs, Ts = 50 μs.
Figure 6. Simulation waveforms of balancing circuit: (a,b) one-cell-to-one-cell balancing mode, Ts = 40 μs, Ts = 50 μs, (c,d) two-cell-to-one-cell balancing mode, Ts = 40 μs, Ts = 50 μs.
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Figure 7. Effect of converter turns ratios on balancing performances: (a) input powers and output powers, (b) balancing efficiencies and balancing times.
Figure 7. Effect of converter turns ratios on balancing performances: (a) input powers and output powers, (b) balancing efficiencies and balancing times.
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Figure 8. Effect of switching cycles on performances in different balancing mode: (a) input powers, (b) output powers, (c) balancing efficiencies, (d) balancing times.
Figure 8. Effect of switching cycles on performances in different balancing mode: (a) input powers, (b) output powers, (c) balancing efficiencies, (d) balancing times.
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Figure 9. Effect of output resistances on balancing performances: (a) input powers, (b) output powers, (c) balancing efficiencies, (d) balancing times.
Figure 9. Effect of output resistances on balancing performances: (a) input powers, (b) output powers, (c) balancing efficiencies, (d) balancing times.
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Figure 10. Balancing performances of different balancing modes.
Figure 10. Balancing performances of different balancing modes.
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Figure 12. Experiment prototype and experiment platform: (a) prototype front side, (b) prototype back side, (c) experiment platform.
Figure 12. Experiment prototype and experiment platform: (a) prototype front side, (b) prototype back side, (c) experiment platform.
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Figure 13. Verification waveforms of balancing circuit: (a,b) one-cell-to-one-cell balancing mode TS = 40 μs, TS = 50 μs, (c,d) two-cell-to-one-cell balancing mode TS = 40 μs, TS = 50 μs.
Figure 13. Verification waveforms of balancing circuit: (a,b) one-cell-to-one-cell balancing mode TS = 40 μs, TS = 50 μs, (c,d) two-cell-to-one-cell balancing mode TS = 40 μs, TS = 50 μs.
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Figure 14. Experimental result of battery balancing under charging with 1A.
Figure 14. Experimental result of battery balancing under charging with 1A.
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Table 1. Simulation circuit parameters.
Table 1. Simulation circuit parameters.
ParametersValues
Lm1 Lm280 μH
Cr1 Cr2100 nF
Ro1 Ro21 Ω
RT1a RT2a/RT1b RT2b0.36 Ω/3 Ω
TS25 μs 30 μs 35 μs 40 μs 45 μs 50 μs
Table 2. The duty cycle of MOSFETs to achieve ZVS in different switching cycles.
Table 2. The duty cycle of MOSFETs to achieve ZVS in different switching cycles.
TS/μsTheory/%Simulation/%
254455
305364
356070
406575
456978
507280
Table 3. The parameters of the experiment.
Table 3. The parameters of the experiment.
ComponentParameter
Rated capacity3.2 Ah
MOSFET SPN2054
MOSFET driverUCC27524
Relay driver74HC595
MCU controllerSTM32
Transformer inductance/turn ratio80 μH/1:2
Resonant capacitor100 nF
Output resistance1 Ω
Switch period/duty cycle50 μs/73%
Table 4. Comparison of balancing results.
Table 4. Comparison of balancing results.
Balancing CircuitBalancing Time/sBalancing Voltage/V
Balancing Circuit in ref. [35]72503.533–3.58
Proposed Balancing Circuit12603.151–3.193
Table 5. Components of balancing circuits for n cells.
Table 5. Components of balancing circuits for n cells.
Balancing CircuitTypeComponent
MDLCRETDR
SC circuit [24]AC2C2n0n-1n-1002n
LCSR circuit [26]DC2C2n + 1041100n + 5
Flyback circuit [30]C2Pn + 2n + 20001n + 2
Forward circuit [35]AC2ACnn0n0nn
BRLC circuit [37]MC2MC4(n + 1)411002(n + 1)
Proposed circuitMC2MC22044n2n/2 + 1
Table 6. Comparisons for 8 cells battery pack.
Table 6. Comparisons for 8 cells battery pack.
Balancing CircuitTypeSizeCost (USD)SpeedDrive
SC circuit [24]AC2CLarge21.6Very HighPoorGood
LCSR circuit [26]DC2CSmall17HighNormalPoor
Flyback circuit [30]C2PSmall9.3Very LowNormalGood
Forward circuit [35]AC2ACMedium18.8HighNormalGood
BRLC circuit [37]MC2MCSmall23Very HighGoodPoor
Proposed circuitMC2MCLarge13.9LowExcellentExcellent
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Zong, Y.; Li, K.; Wang, Q.; Meng, J. Multi-Mode Lithium-Ion Battery Balancing Circuit Based on Forward Converter with Resonant Reset. Appl. Sci. 2023, 13, 10430. https://doi.org/10.3390/app131810430

AMA Style

Zong Y, Li K, Wang Q, Meng J. Multi-Mode Lithium-Ion Battery Balancing Circuit Based on Forward Converter with Resonant Reset. Applied Sciences. 2023; 13(18):10430. https://doi.org/10.3390/app131810430

Chicago/Turabian Style

Zong, Yanliang, Kun Li, Qing Wang, and Jiaheng Meng. 2023. "Multi-Mode Lithium-Ion Battery Balancing Circuit Based on Forward Converter with Resonant Reset" Applied Sciences 13, no. 18: 10430. https://doi.org/10.3390/app131810430

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