Recent Advances in CMOS Integrated Circuits

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: closed (15 July 2024) | Viewed by 590

Special Issue Editors

School of Geophysics and Information Technology, China University of Geosciences, Beijing 100083, China
Interests: integrated circuit; signal processing; LDO; Low-power; power management; CMOS technology

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Guest Editor
School of Geophysics and Information Technology, China University of Geosciences, Beijing 100083, China
Interests: integrated circuit; signal processing; LDO; Low-power; power management; CMOS technology

Special Issue Information

Dear Colleagues,

Low-voltage and low-power design of integrated circuits have become a hot topic in the field of microelectronics. Driven by the strong market demand, low-voltage low-power IC technology has been greatly developed. With the rapid development of science and technology, various electronic products have penetrated people's daily lives and brought great convenience to people. With the development of various electronic devices in the direction of miniaturization, integration, and intelligence, people have higher requirements for the power management chip as the heart of electronic devices. However, most traditional designs are difficult to meet the strict requirements of various performance indicators of different equipment. For example, the operational amplifier is expected to have high input impedance, low input offset, low input noise, high gain, high speed, low output resistance, and other characteristics, but the actual amplifier has trouble achieving an ideal degree on multiple indicators at the same time. Therefore, the demand for different types of new and high-performance amplifier circuits and power management modules is increasing exponentially.

This Special Issue will propose and discuss the progress of CMOS integrated circuits. The Special Issue will introduce the scientific status of the most relevant issues in integrated circuits and find new effective concepts and designs in the field of integrated circuits. The Special Issue will make contributions to circuit design and signal processing research in academic and industrial fields. We invite investigators to submit original research articles to this Special Issue.

Potential submission topics include but are not limited to the following:

  • CMOS circuit
  • Low dropout regulators
  • low-power design of integrated circuits

Dr. Xiao Zhao
Dr. Jinfeng Yan
Guest Editors

Manuscript Submission Information

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Keywords

  • signal processing
  • LDO
  • low-power
  • power management
  • CMOS technology

Published Papers (1 paper)

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Research

11 pages, 3296 KiB  
Article
Fully Tunable Analog Biquadratic Filter for Low-Power Auditory Signal Processing in CMOS Technologies
by Waldemar Jendernalik and Jacek Jakusz
Electronics 2024, 13(16), 3132; https://doi.org/10.3390/electronics13163132 - 7 Aug 2024
Viewed by 213
Abstract
A novel Gm-C structure of a second-order continuous-time filter is proposed that allows for the independent control of the filter’s natural frequency (ω0) and quality factor (Q). The structure consists of two capacitors and four transconductors. Two transconductors [...] Read more.
A novel Gm-C structure of a second-order continuous-time filter is proposed that allows for the independent control of the filter’s natural frequency (ω0) and quality factor (Q). The structure consists of two capacitors and four transconductors. Two transconductors together with the capacitors form a lossless second-order circuit with tunable ω0. The other two transconductors form a variable gain amplifier (VGA) which realizes an adjustable loss and thereby adjustable Q. The proposed solution can be used to implement low-voltage and low-power tunable front-end filter banks for fully integrated CMOS cochlear implants and edge intelligence accelerators. An example filter bank powered by 0.5 V and consuming 40 nW of power per single filter is designed and simulated using a 180 nm CMOS process. Circuitries for the adaptive control of transistor bias at a reduced supply voltage are proposed. The ω0 and Q control circuitries are also proposed: a delay-locked loop (DLL)-based system for fine ω0 tuning and a binary-weighted current mirror for Q adjustment. The proposed solution allows for the independent regulation of ω0 and Q within the ranges of 0.25–8 kHz and 1–14, respectively, with a relative tolerance of up to 5% across a filter bank. Full article
(This article belongs to the Special Issue Recent Advances in CMOS Integrated Circuits)
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