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Keywords = Silvaco TCAD

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10 pages, 1855 KB  
Article
TCAD Design and Optimization of In0.20Ga0.80N/In0.35Ga0.65N Quantum-Dot Intermediate-Band Solar Cells
by Salaheddine Amezzoug, Haddou El Ghazi and Walid Belaid
Crystals 2025, 15(8), 693; https://doi.org/10.3390/cryst15080693 - 30 Jul 2025
Viewed by 450
Abstract
Intermediate-band photovoltaics promise single-junction efficiencies that exceed the Shockley and Queisser limit, yet viable material platforms and device geometries remain under debate. Here, we perform comprehensive two-dimensional device-scale simulations using Silvaco Atlas TCAD to analyze p-i-n In0.20Ga0.80N solar cells [...] Read more.
Intermediate-band photovoltaics promise single-junction efficiencies that exceed the Shockley and Queisser limit, yet viable material platforms and device geometries remain under debate. Here, we perform comprehensive two-dimensional device-scale simulations using Silvaco Atlas TCAD to analyze p-i-n In0.20Ga0.80N solar cells in which the intermediate band is supplied by In0.35Ga0.65N quantum dots located inside the intrinsic layer. Quantum-dot diameters from 1 nm to 10 nm and areal densities up to 116 dots per period are evaluated under AM 1.5G, one-sun illumination at 300 K. The baseline pn junction achieves a simulated power-conversion efficiency of 33.9%. The incorporation of a single 1 nm quantum-dot layer dramatically increases efficiency to 48.1%, driven by a 35% enhancement in short-circuit current density while maintaining open-circuit voltage stability. Further increases in dot density continue to boost current but with diminishing benefit; the highest efficiency recorded, 49.4% at 116 dots, is only 1.4 percentage points above the 40-dot configuration. The improvements originate from two-step sub-band-gap absorption mediated by the quantum dots and from enhanced carrier collection in a widened depletion region. These results define a practical design window centred on approximately 1 nm dots and about 40 dots per period, balancing substantial efficiency gains with manageable structural complexity and providing concrete targets for epitaxial implementation. Full article
(This article belongs to the Section Materials for Energy Applications)
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18 pages, 3036 KB  
Article
Modelling and Simulation of a New π-Gate AlGaN/GaN HEMT with High Voltage Withstand and High RF Performance
by Jun Yao, Xianyun Liu, Chenglong Lu, Di Yang and Wulong Yuan
Electronics 2025, 14(15), 2947; https://doi.org/10.3390/electronics14152947 - 24 Jul 2025
Viewed by 449
Abstract
Aiming at the problems of low withstand voltage and poor RF performance of traditional HEMT devices, a new AlGaN/GaN high electron mobility transistor device with a π-gate (NπGS HEMT) is designed in this paper. The new structure incorporates a π-gate design along with [...] Read more.
Aiming at the problems of low withstand voltage and poor RF performance of traditional HEMT devices, a new AlGaN/GaN high electron mobility transistor device with a π-gate (NπGS HEMT) is designed in this paper. The new structure incorporates a π-gate design along with a PN-junction field plate and an AlGaN back-barrier layer. The device is modeled and simulated in Silvaco TCAD 2015 software and compared with traditional t-gate HEMT devices. The results show that the NπGS HEMT has a significant improvement in various characteristics. The new structure has a higher peak transconductance of 336 mS·mm−1, which is 13% higher than that of the traditional HEMT structure. In terms of output characteristics, the new structure has a higher saturation drain current of 0.188 A/mm. The new structure improves the RF performance of the device with a higher maximum cutoff frequency of about 839 GHz. The device also has a better performance in terms of voltage withstand, exhibiting a higher breakdown voltage of 1817 V. These results show that the proposed new structure could be useful for future research on high voltage withstand and high RF HEMT devices. Full article
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18 pages, 5521 KB  
Article
Design and TCAD Simulation of GaN P-i-N Diode with Multi-Drift-Layer and Field-Plate Termination Structures
by Zhibo Yang, Guanyu Wang, Yifei Wang, Pandi Mao and Bo Ye
Micromachines 2025, 16(8), 839; https://doi.org/10.3390/mi16080839 - 22 Jul 2025
Viewed by 493
Abstract
Vertical GaN P-i-N diodes exhibit excellent high-voltage performance, fast switching speed, and low conduction losses, making them highly attractive for power applications. However, their breakdown voltage is severely constrained by electric field crowding at device edges. Using silvaco tcad (2019) tools, this work [...] Read more.
Vertical GaN P-i-N diodes exhibit excellent high-voltage performance, fast switching speed, and low conduction losses, making them highly attractive for power applications. However, their breakdown voltage is severely constrained by electric field crowding at device edges. Using silvaco tcad (2019) tools, this work systematically evaluates multiple edge termination techniques, including deep-etched mesa, beveled mesa, and field-plate configurations with both vertical and inclined mesa structures. We present an optimized multi-drift-layer GaN P-i-N diode incorporating field-plate termination and analyze its electrical performance in detail. This study covers forward conduction characteristics including on-state voltage, on-resistance, and their temperature dependence, reverse breakdown behavior examining voltage capability and electric field distribution under different temperatures, and switching performance addressing both forward recovery phenomena, i.e., voltage overshoot and carrier injection dynamics, and reverse recovery characteristics including peak current and recovery time. The comprehensive analysis offers practical design guidelines for developing high-performance GaN power devices. Full article
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13 pages, 1463 KB  
Article
Weak-Light-Enhanced AlGaN/GaN UV Phototransistors with a Buried p-GaN Structure
by Haiping Wang, Feiyu Zhang, Xuzhi Zhao, Haifan You, Zhan Ma, Jiandong Ye, Hai Lu, Rong Zhang, Youdou Zheng and Dunjun Chen
Electronics 2025, 14(10), 2076; https://doi.org/10.3390/electronics14102076 - 20 May 2025
Cited by 1 | Viewed by 508
Abstract
We propose a novel ultraviolet (UV) phototransistor (PT) architecture based on an AlGaN/GaN high electron mobility transistor (HEMT) with a buried p-GaN layer. In the dark, the polarization-induced two-dimensional electron gas (2DEG) at the AlGaN/GaN heterojunction interface is depleted by the buried p-GaN [...] Read more.
We propose a novel ultraviolet (UV) phototransistor (PT) architecture based on an AlGaN/GaN high electron mobility transistor (HEMT) with a buried p-GaN layer. In the dark, the polarization-induced two-dimensional electron gas (2DEG) at the AlGaN/GaN heterojunction interface is depleted by the buried p-GaN and the conduction channel is closed. Under UV illumination, the depletion region shrinks to just beneath the AlGaN/GaN interface and the 2DEG recovers. The retraction distance of the depletion region during device turn-on operation is comparable to the thickness of the AlGaN barrier layer, which is an order of magnitude smaller than that in the conventional p-GaN/AlGaN/GaN PT, whose retraction distance spans the entire GaN channel layer. Consequently, the proposed device demonstrates significantly enhanced weak-light detection capability and improved switching speed. Silvaco Atlas simulations reveal that under a weak UV intensity of 100 nW/cm2, the proposed device achieves a photocurrent density of 1.68 × 10−3 mA/mm, responsivity of 8.41 × 105 A/W, photo-to-dark-current ratio of 2.0 × 108, UV-to-visible rejection ratio exceeding 108, detectivity above 1 × 1019 cm·Hz1/2/W, and response time of 0.41/0.41 ns. The electron concentration distributions, conduction band variations, and 2DEG recovery behaviors in both the conventional and novel structures under dark and weak UV illumination are investigated in depth via simulations. Full article
(This article belongs to the Special Issue Advances in Semiconductor GaN and Applications)
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16 pages, 2805 KB  
Article
Numerical Investigation of Perovskite/Silicon Heterojunction Tandem Solar Cell with a Dual-Functional Layer of MoOX
by Tian-Yu Lu, Jin Wang and Xiao-Dong Feng
Materials 2025, 18(7), 1438; https://doi.org/10.3390/ma18071438 - 24 Mar 2025
Viewed by 591
Abstract
This study proposed a novel perovskite/silicon heterojunction (SHJ) tandem device structure without an interlayer, represented as ITO/NiO/perovskite/SnO2/MoOX/i-a-Si:H/n-c-Si/i-a-Si:H/n-a-Si:H/Ag, which was investigated by Silvaco TCAD software. The recombination layer in this structure comprises the carrier transport layers of SnO2 and [...] Read more.
This study proposed a novel perovskite/silicon heterojunction (SHJ) tandem device structure without an interlayer, represented as ITO/NiO/perovskite/SnO2/MoOX/i-a-Si:H/n-c-Si/i-a-Si:H/n-a-Si:H/Ag, which was investigated by Silvaco TCAD software. The recombination layer in this structure comprises the carrier transport layers of SnO2 and MoOX, where MoOX serves dual functions, acting as the emitter for the SHJ bottom cell and as part of the recombination layer in the tandem cell. First, the effects of different recombination layers are analyzed, and the SnO2/MoOX layer demonstrates the best performance. Then, we systematically investigated the impact of the carrier concentration, interface defect density, thicknesses of the SnO2/MoOX layer, different hole transport layers (HTLs) for the top cell, absorption layer thicknesses, and perovskite defect density on device performance. The optimal carrier concentration in the recombination layer should exceed 5 × 1019 cm−3, the interface defect density should be below 1 × 1016 cm−2, and the thicknesses of SnO2/MoOX should be kept at 20 nm/20 nm. CuSCN has been found to be the optimal HTL for the top cell. When the silicon absorption layer is 200 μm, the perovskite layer thickness is 470 nm, and the defect density of the perovskite layer is 1011 cm−3, the planar structure can achieve the best performance of 32.56%. Finally, we studied the effect of surface texturing on the SHJ bottom cell, achieving a power conversion efficiency of 35.31% for the tandem cell. Our simulation results suggest that the simplified perovskite/SHJ tandem solar cell with a dual-functional MoOX layer has the potential to provide a viable pathway for developing high-efficiency tandem devices. Full article
(This article belongs to the Special Issue Recent Advances in Semiconductors for Solar Cell Devices)
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22 pages, 6345 KB  
Article
Modeling and Optimization of Enhanced High-Efficiency InGaP/GaAs Tandem Solar Cells Without Anti-Reflective Coating
by Ikram Zidani, Zouaoui Bensaad, Nadji Hadroug, Abdellah Kouzou, Ahmed Hafaifa, Jose Rodriguez and Mohamed Abdelrahem
Appl. Sci. 2025, 15(7), 3520; https://doi.org/10.3390/app15073520 - 24 Mar 2025
Cited by 1 | Viewed by 988
Abstract
Modern multi-junction solar cell technology offers a pathway to achieving consistent and high photovoltaic conversion efficiencies through enhanced solar spectrum absorption. Indeed, during the last years, the industries of solar cells have focused on optimizing device structures, utilizing both robust and delicate materials [...] Read more.
Modern multi-junction solar cell technology offers a pathway to achieving consistent and high photovoltaic conversion efficiencies through enhanced solar spectrum absorption. Indeed, during the last years, the industries of solar cells have focused on optimizing device structures, utilizing both robust and delicate materials to maximize their performances. This paper presents the modeling and optimization of the electrical and structural properties of high-efficiency InGaP/GaAs double-junction solar cells, specifically without employing an anti-reflective coating. This developed structure has been achieved by introducing a buffer layer in the lower layer and incorporating an upper back surface field layer into the investigated cell structure. Furthermore, the optimization conducted in this paper using Silvaco-Atlas software (version 2018) under the AM1.5G spectrum reveals that the proposed InGaP/GaAs tandem cell configuration exhibits significant performance, reaching conversion efficiency of 41.585%. It can be said that this adapted structure yields a short-circuit current density of 21.65 mA/cm2, an open-circuit voltage of 2.319 V, and a filling factor of 84.001%. Whereas this newly optimized structure demonstrates its effectiveness in enhancing solar cell efficiency performance, presenting highly promising results with potential significance for the devices’ optical and electrical properties. Full article
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13 pages, 2157 KB  
Article
Nonvolatile Organic Floating-Gate Memory Using N2200 as Charge-Trapping Layer
by Wenting Zhang, Junliang Shang, Shuang Li, Hu Liu, Mengqi Ma and Dongping Ma
Appl. Sci. 2025, 15(5), 2278; https://doi.org/10.3390/app15052278 - 20 Feb 2025
Viewed by 839
Abstract
In this work, floating-gate organic field-effect transistor memory using the n-type semiconductor poly-{[N,N′-bis(2-octyldodecyl) naphthalene-1,4,5,8-bis (dicarbo- ximide)-2,6-dili]-alt-5,5′-(2,2′-bithiophene)} (N2200) as a charge-trapping layer is presented. With the assistance of a technology computer-aided design (TCAD) tool (Silvaco-Atlas), the storage characteristics of the device are numerically simulated [...] Read more.
In this work, floating-gate organic field-effect transistor memory using the n-type semiconductor poly-{[N,N′-bis(2-octyldodecyl) naphthalene-1,4,5,8-bis (dicarbo- ximide)-2,6-dili]-alt-5,5′-(2,2′-bithiophene)} (N2200) as a charge-trapping layer is presented. With the assistance of a technology computer-aided design (TCAD) tool (Silvaco-Atlas), the storage characteristics of the device are numerically simulated by using the carrier injection and Fower–Nordheim (FN) tunneling models. The shift in the transfer characteristic curves and the charge-trapping mechanism after programming/erasing (P/E) operations under different P/E voltages and different pulse operation times are discussed. The impacts of different thicknesses of the tunneling layer on storage characteristics are also analyzed. The results show that the memory window with a tunneling layer thickness of 8 nm is 16.1 V under the P/E voltage of ±45 V, 5 s. After 1000 cycle tests, the memory shows good fatigue resistance, and the read current on/off ratio reaches 103. Full article
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13 pages, 3458 KB  
Article
TCAD-Based Analysis on the Impact of AlN Interlayer in Normally-off AlGaN/GaN MISHEMTs with Buried p-Region
by Saleem Hamady, Bilal Beydoun and Frédéric Morancho
Electronics 2025, 14(2), 313; https://doi.org/10.3390/electronics14020313 - 14 Jan 2025
Viewed by 1629
Abstract
With the growing demand for more efficient power conversion and silicon reaching its theoretical limit, wide bandgap semiconductor devices are emerging as a potential solution. For instance, Gallium Nitride (GaN)-based high-electron-mobility transistors (HEMTs) are getting more attention, and several structures for the normally [...] Read more.
With the growing demand for more efficient power conversion and silicon reaching its theoretical limit, wide bandgap semiconductor devices are emerging as a potential solution. For instance, Gallium Nitride (GaN)-based high-electron-mobility transistors (HEMTs) are getting more attention, and several structures for the normally off operation have been proposed. Adding an AlN interlayer in conventional AlGaN/GaN normally on HEMT structures is known to enhance the current density. In this work, the effect of an AlN interlayer in the normally off AlGaN/GaN MISHEMT with a buried p-region was investigated using a TCAD simulation from Silvaco. The added AlN interlayer increases the two-dimensional electron gas density, requiring a higher p-doping concentration to achieve the same threshold voltage. The simulation results show that the overall effect is a reduction in the device’s current density and peak transconductance by 21.83% and 44.4%, respectively. Further analysis of the current profile shows that because of the buried p-region and at high gate voltages, the current flows near the AlGaN/GaN interface and along the insulator/AlGaN interface. Adding an AlN interface blocks the migration of channel electrons to the insulator/AlGaN interface, resulting in a lower current density. Full article
(This article belongs to the Section Semiconductor Devices)
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10 pages, 3244 KB  
Article
Study on Electrical and Temperature Characteristics of β-Ga2O3-Based Diodes Controlled by Varying Anode Work Function
by Yunlong He, Baisong Sheng, Xiaoli Lu, Guran Chen, Peng Liu, Ying Zhou, Xichen Wang, Weiwei Chen, Lei Wang, Jun Yang, Xuefeng Zheng, Xiaohua Ma and Yue Hao
Nanomaterials 2024, 14(24), 2035; https://doi.org/10.3390/nano14242035 - 18 Dec 2024
Viewed by 1141
Abstract
This study systematically investigates the effects of anode metals (Ti/Au and Ni/Au) with different work functions on the electrical and temperature characteristics of β-Ga2O3-based Schottky barrier diodes (SBDs), junction barrier Schottky diodes (JBSDs) and P-N diodes (PNDs), utilizing Silvaco [...] Read more.
This study systematically investigates the effects of anode metals (Ti/Au and Ni/Au) with different work functions on the electrical and temperature characteristics of β-Ga2O3-based Schottky barrier diodes (SBDs), junction barrier Schottky diodes (JBSDs) and P-N diodes (PNDs), utilizing Silvaco TCAD simulation software, device fabrication and comparative analysis. From the perspective of transport characteristics, it is observed that the SBD exhibits a lower turn-on voltage and a higher current density. Notably, the Von of the Ti/Au anode SBD is merely 0.2 V, which is the lowest recorded value in the existing literature. The Von and current trend of two types of PNDs are nearly consistent, confirming that the contact between Ti/Au or Ni/Au and NiOx is ohmic. A theoretical derivation reveals the basic principles of the different contact resistances and current variations. With the combination of SBD and PND, the Von, current density, and variation rate of the JBSD lie between those of the SBD and PND. In terms of temperature characteristics, all diodes can work well at 200 °C, with both current density and Von showing a decreasing trend as the temperature increases. Among them, the PND with a Ni/Au anode exhibits the best thermal stability, with reductions in Von and current density of 8.20% and 25.31%, respectively, while the SBD with a Ti/Au anode shows the poorest performance, with reductions of 98.56% and 30.73%. Finally, the reverse breakdown (BV) characteristics of all six devices are tested. The average BV values for the PND with Ti/Au and Ni/Au anodes reach 1575 V and 1550 V, respectively. Moreover, although the Von of the JBSD decreases to 0.24 V, its average BV is approximately 220 V. This work could provide valuable insights for the future application of β-Ga2O3-based diodes in high-power and low-power consumption systems. Full article
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12 pages, 11779 KB  
Communication
Normally-Off Trench-Gated AlGaN/GaN Current Aperture Vertical Electron Transistor with Double Superjunction
by Jong-Uk Kim, Do-Yeon Park, Byeong-Jun Park and Sung-Ho Hahm
Technologies 2024, 12(12), 262; https://doi.org/10.3390/technologies12120262 - 16 Dec 2024
Viewed by 2245
Abstract
This study proposes an AlGaN/GaN current aperture vertical electron transistor (CAVET) featuring a double superjunction (SJ) to enhance breakdown voltage (BV) and investigates its electrical characteristics via technology computer-aided design (TCAD) Silvaco Atlas simulation. An additional p-pillar was formed beneath the gate [...] Read more.
This study proposes an AlGaN/GaN current aperture vertical electron transistor (CAVET) featuring a double superjunction (SJ) to enhance breakdown voltage (BV) and investigates its electrical characteristics via technology computer-aided design (TCAD) Silvaco Atlas simulation. An additional p-pillar was formed beneath the gate current blocking layer to create a lateral depletion region that provided a high off-state breakdown voltage. To address the tradeoff between the drain current and off-state breakdown voltage, the key design parameters were carefully optimized. The proposed device exhibited a higher off-state breakdown voltage (2933 V) than the device with a single SJ (2786 V), although the specific on-resistance of the proposed method (1.29 mΩ·cm−2) was slightly higher than that of the single SJ device (1.17 mΩ·cm−2). In addition, the reverse transfer capacitance was improved by 15.6% in the proposed device. Full article
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8 pages, 2434 KB  
Article
Mitigating Pass Gate Effect in Buried Channel Array Transistors Through Buried Oxide Integration: Addressing Interference Phenomenon Between Word Lines
by Yeongmyeong Cho, Yeon-Seok Kim and Min-Woo Kwon
Appl. Sci. 2024, 14(22), 10348; https://doi.org/10.3390/app142210348 - 11 Nov 2024
Cited by 1 | Viewed by 1882
Abstract
As semiconductor devices become smaller, their performance and integration density improve, but new negative effects emerge due to the reduced distance between structures. In DRAM, these effects can lead to data loss or require additional refresh cycles, causing performance degradation. Specifically, in the [...] Read more.
As semiconductor devices become smaller, their performance and integration density improve, but new negative effects emerge due to the reduced distance between structures. In DRAM, these effects can lead to data loss or require additional refresh cycles, causing performance degradation. Specifically, in the 6F2 DRAM structure, activating a word line (WL) lowers the energy barrier of adjacent WLs, leading to the Pass Gate Effect (PGE). This study investigates the use of buried oxide beneath the WL to mitigate the PGE through simulation. Using SILVACO TCAD, we analyzed the impact of varying the size and position of the buried oxide on the PGE. The results showed that increasing the oxide size or reducing the distance to the WL effectively reduced the PGE. However, the presence of interface traps, which increase with the addition of buried oxide, was found to exacerbate the PGE, indicating that minimizing interface traps is crucial when incorporating buried oxide. Full article
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25 pages, 9496 KB  
Article
Enhancing Multi-Junction Solar Cell Performance: Advanced Predictive Modeling and Cutting-Edge CIGS Integration Techniques
by Zakarya Ziani, Moustafa Yassine Mahdad, Mohammed Zakaria Bessenouci, Mohammed Chakib Sekkal and Nacera Ghellai
Energies 2024, 17(18), 4669; https://doi.org/10.3390/en17184669 - 19 Sep 2024
Cited by 3 | Viewed by 2421
Abstract
Historically, multi-junction solar cells have evolved to capture a broader spectrum of sunlight, significantly enhancing efficiency beyond conventional solar technologies. In this study, we utilized Silvaco TCAD tools to optimize a five-junction solar cell composed of AlInP, AlGaInP, AlGaInAs, GaInP, GaAs, InGaAs, and [...] Read more.
Historically, multi-junction solar cells have evolved to capture a broader spectrum of sunlight, significantly enhancing efficiency beyond conventional solar technologies. In this study, we utilized Silvaco TCAD tools to optimize a five-junction solar cell composed of AlInP, AlGaInP, AlGaInAs, GaInP, GaAs, InGaAs, and Ge, drawing on advancements documented in the literature. Our research focused on optimizing these cells through sophisticated statistical modeling and material innovation, particularly examining the relationship between layer thickness and electrical yield under one sun illumination. Employing III-V tandem solar cells, renowned for their superior efficiency in converting sunlight to electricity, we applied advanced statistical models to a reference solar cell configured with predefined layer thicknesses. Our analysis revealed significant positive correlations between layer thickness and electrical performance, with correlation coefficients (R2 values) impressively ranging from 0.86 to 0.96 across different regions. This detailed statistical insight led to an improvement in overall cell efficiency to 44.2. A key innovation in our approach was replacing the traditional germanium (Ge) substrate with Copper Indium Gallium Selenide (CIGS), known for its adjustable bandgap and superior absorption of long-wavelength photons. This strategic modification not only broadened the absorption spectrum but also elevated the overall cell efficiency to 47%. Additionally, the optimization process involved simulations using predictive profilers and Silvaco Atlas tools, which systematically assessed various configurations for their spectral absorption and current–voltage characteristics, further enhancing the cell’s performance. These findings underscore the critical role of precise material engineering and sophisticated statistical analyses in advancing solar cell technology, setting new efficiency benchmarks, and driving further developments in the field. Full article
(This article belongs to the Section D1: Advanced Energy Materials)
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21 pages, 8000 KB  
Article
Investigation of SiC MOSFET Body Diode Reverse Recovery and Snappy Recovery Conditions
by Giuseppe Pennisi, Mario Pulvirenti, Luciano Salvo, Angelo Giuseppe Sciacca, Salvatore Cascino, Antonio Laudani, Nunzio Salerno and Santi Agatino Rizzo
Energies 2024, 17(11), 2651; https://doi.org/10.3390/en17112651 - 30 May 2024
Cited by 3 | Viewed by 4670
Abstract
This paper investigates the behavior of SiC MOSFETs body diode reverse recovery as a function of different operating conditions. The knowledge of their effects is crucial to properly designing and driving power converters based on SiC devices, in order to optimize the MOSFETs [...] Read more.
This paper investigates the behavior of SiC MOSFETs body diode reverse recovery as a function of different operating conditions. The knowledge of their effects is crucial to properly designing and driving power converters based on SiC devices, in order to optimize the MOSFETs commutations aiming at improving efficiency. Indeed, reverse recovery is a part of the switching transient, but it has a significant role due to its impact on recovery energy and charge. The set of different operating conditions has been properly chosen to prevent or force the snappy recovery of the device under testing. The experimental results and specific software simulations have revealed phenomena unknown in the literature. More specifically, the analysis of the reverse recovery charge, Qrr, revealed two unexpected phenomena at high temperatures: it decreased with increasing gate voltage; the higher the device threshold, the higher the Qrr. TCAD-Silvaco (ATLAS v. 5.29.0.C) simulations have shown that this is due to a displacement current flowing in the drift region due to the output capacitance voltage variation during commutation. From the analysis of the snappy recovery, it has emerged that there is a minimum forward current slope, below which the reverse recovery cannot be snappy, even for a high current level. Once this current slope is reached, Qrr varies with the forward current only. Full article
(This article belongs to the Section F3: Power Electronics)
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11 pages, 4882 KB  
Article
Modulation of Diamond PN Junction Diode with Double-Layered n-Type Diamond by Using TCAD Simulation
by Caoyuan Mu, Genzhuang Li, Xianyi Lv, Qiliang Wang, Hongdong Li, Liuan Li and Guangtian Zou
Electronics 2024, 13(9), 1703; https://doi.org/10.3390/electronics13091703 - 28 Apr 2024
Viewed by 2068
Abstract
This study proposed a novel double-layer junction termination structure for vertical diamond-based PN junction diodes (PND). The effects of the geometry and doping concentration of the junction termination structure on the PNDs’ electrical properties are investigated using Silvaco TCAD software (Version 5.0.10.R). It [...] Read more.
This study proposed a novel double-layer junction termination structure for vertical diamond-based PN junction diodes (PND). The effects of the geometry and doping concentration of the junction termination structure on the PNDs’ electrical properties are investigated using Silvaco TCAD software (Version 5.0.10.R). It demonstrates that the electric performances of PND with a single n-type diamond layer are sensitive to the doping concentration and electrode location of the n-type diamond. To further suppress the electric field crowding and obtain a better balance between breakdown voltage and on-resistance, a double-layer junction termination structure is introduced and evaluated, yielding significantly improved electronic performances. Those results provide some useful thoughts for the design of vertical diamond PND devices. Full article
(This article belongs to the Special Issue Recent Advances in Wide Bandgap Semiconductors)
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10 pages, 2340 KB  
Article
Enhancing the Carrier Mobility and Bias Stability in Metal–Oxide Thin Film Transistors with Bilayer InSnO/a-InGaZnO Heterojunction Structure
by Xiaoming Huang, Chen Chen, Fei Sun, Xinlei Chen, Weizong Xu and Lin Li
Micromachines 2024, 15(4), 512; https://doi.org/10.3390/mi15040512 - 11 Apr 2024
Cited by 3 | Viewed by 2720
Abstract
In this study, the electrical performance and bias stability of InSnO/a-InGaZnO (ITO/a-IGZO) heterojunction thin-film transistors (TFTs) are investigated. Compared to a-IGZO TFTs, the mobility (µFE) and bias stability of ITO/a-IGZO heterojunction TFTs are enhanced. The band alignment of the ITO/a-IGZO [...] Read more.
In this study, the electrical performance and bias stability of InSnO/a-InGaZnO (ITO/a-IGZO) heterojunction thin-film transistors (TFTs) are investigated. Compared to a-IGZO TFTs, the mobility (µFE) and bias stability of ITO/a-IGZO heterojunction TFTs are enhanced. The band alignment of the ITO/a-IGZO heterojunction is analyzed by using X-ray photoelectron spectroscopy (XPS). A conduction band offset (∆EC) of 0.5 eV is observed in the ITO/a-IGZO heterojunction, resulting in electron accumulation in the formed potential well. Meanwhile, the ∆EC of the ITO/a-IGZO heterojunction can be modulated by nitrogen doping ITO (ITON), which can affect the carrier confinement and transport properties at the ITO/a-IGZO heterojunction interface. Moreover, the carrier concentration distribution at the ITO/a-IGZO heterointerface is extracted by means of TCAD silvaco 2018 simulation, which is beneficial for enhancing the electrical performance of ITO/a-IGZO heterojunction TFTs. Full article
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