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Memristors for Neuromorphic Circuits and Artificial Intelligence Applications

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A special issue of Materials (ISSN 1996-1944). This special issue belongs to the section "Electronic Materials".

Deadline for manuscript submissions: closed (30 November 2019) | Viewed by 63790

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Prof. Dr. Jordi Suñé

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Departament d’Enginyeria Electrònica, Universitat Autònoma de Barcelona, 08193 Cerdanyola del Vallès, Spain
Interests: resistive switching; memristors; neuromorphics; reliability; oxide electronics; non-volatile memories; electro-ionic devices; neural networks

Special Issue Information

Dear Colleagues,

Machine learning is impacting our society in every corner. This is the artificial intelligence (AI) revolution. From medical to automotive application, from preventive maintenance to global climate forecasting and prevention, from the management of emergencies to the prevention of terrorist attacks, deep-learning-based AI is continuously penetrating our daily lives. AI is a pervasive technology that, presently is mainly implemented in software. However, the solid-state nanoelectronic implementation of the memristor (for the first time in 2008 by the HP group), predicted by Prof. Leon Chua in 1971 using symmetry arguments, opens up a new frontier for AI applications: Deep learning ICs. Less-known by the general public, these hardware-based neuromeorphic systems will allow distributed energy-efficient deployment of AI in many areas requiring real-time response, intelligent decision and fast action. In this Special Issue we will try to give a general overview of this new technology. We will review the concepts of machine learning and deep learning, with a focus on their applications. We will cover the state-of-the-art technological implementation of memristor electron devices with particular emphasis on resistive devices (both ReRAM and PCM). We will also present the actual state-of-the-art of memristor-based deep learning prototypes for different applications. Finally, we will dedicate a few papers to ethical issues related to AI (and also to neurosciences). These two technologies have many potential applications that will aid to face global societal challenges (AI for the Good). However, there are also many serious ethical challenges to be faced because the coupling of these technologies have also many negative applications (AI for the Devil) that might even put the future of humanity at serious risk.

Prof. Dr. Jordi Suñé
Guest Editor

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Keywords

memristors
artificial intelligence
hardware-based deep learning ICs

Related Special Issue

Artificial Intelligence in Materials Science and Engineering in Materials

Published Papers (14 papers)

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9 pages, 234 KiB

Open AccessEditorial

Memristors for Neuromorphic Circuits and Artificial Intelligence Applications

by Enrique Miranda and Jordi Suñé

Materials 2020, 13(4), 938; https://doi.org/10.3390/ma13040938 - 20 Feb 2020

Cited by 29 | Viewed by 3673

Abstract

Artificial Intelligence has found many applications in the last decade due to increased computing power. Artificial Neural Networks are inspired in the brain structure and consist in the interconnection of artificial neurons through artificial synapses in the so-called Deep Neural Networks (DNNs). Training these systems requires huge amounts of data and, after the network is trained, it can recognize unforeseen data and provide useful information. As far as the training is concerned, we can distinguish between supervised and unsupervised learning. The former requires labelled data and is based on the iterative minimization of the output error using the stochastic gradient descent method followed by the recalculation of the strength of the synaptic connections (weights) with the backpropagation algorithm. On the other hand, unsupervised learning does not require data labeling and it is not based on explicit output error minimization. Conventional ANNs can function with supervised learning algorithms (perceptrons, multi-layer perceptrons, convolutional networks, etc.) but also with unsupervised learning rules (Kohonen networks, self-organizing maps, etc.). Besides, another type of neural networks are the so-called Spiking Neural Networks (SNNs) in which learning takes place through the superposition of voltage spikes launched by the neurons. Their behavior is much closer to the brain functioning mechanisms they can be used with supervised and unsupervised learning rules. Since learning and inference is based on short voltage spikes, energy efficiency improves substantially. Up to this moment, all these ANNs (spiking and conventional) have been implemented as software tools running on conventional computing units based on the von Neumann architecture. However, this approach reaches important limits due to the required computing power, physical size and energy consumption. This is particularly true for applications at the edge of the internet. Thus, there is an increasing interest in developing AI tools directly implemented in hardware for this type of applications. The first hardware demonstrations have been based on Complementary Metal-Oxide-Semiconductor (CMOS) circuits and specific communication protocols. However, to further increase training speed andenergy efficiency while reducing the system size, the combination of CMOS neuron circuits with memristor synapses is now being explored. It has also been pointed out that the short time non-volatility of some memristors may even allow fabricating purely memristive ANNs. The memristor is a new device (first demonstrated in solid-state in 2008) which behaves as a resistor with memory and which has been shown to have potentiation and depression properties similar to those of biological synapses. In this Special Issue, we explore the state of the art of neuromorphic circuits implementing neural networks with memristors for AI applications. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

28 pages, 1933 KiB

Open AccessFeature PaperReview

Neuromorphic Spiking Neural Networks and Their Memristor-CMOS Hardware Implementations

by Luis A. Camuñas-Mesa, Bernabé Linares-Barranco and Teresa Serrano-Gotarredona

Materials 2019, 12(17), 2745; https://doi.org/10.3390/ma12172745 - 27 Aug 2019

Cited by 74 | Viewed by 8705

Abstract

Inspired by biology, neuromorphic systems have been trying to emulate the human brain for decades, taking advantage of its massive parallelism and sparse information coding. Recently, several large-scale hardware projects have demonstrated the outstanding capabilities of this paradigm for applications related to sensory information processing. These systems allow for the implementation of massive neural networks with millions of neurons and billions of synapses. However, the realization of learning strategies in these systems consumes an important proportion of resources in terms of area and power. The recent development of nanoscale memristors that can be integrated with Complementary Metal–Oxide–Semiconductor (CMOS) technology opens a very promising solution to emulate the behavior of biological synapses. Therefore, hybrid memristor-CMOS approaches have been proposed to implement large-scale neural networks with learning capabilities, offering a scalable and lower-cost alternative to existing CMOS systems. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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33 pages, 6691 KiB

Open AccessFeature PaperReview

Memristive and CMOS Devices for Neuromorphic Computing

by Valerio Milo, Gerardo Malavena, Christian Monzio Compagnoni and Daniele Ielmini

Materials 2020, 13(1), 166; https://doi.org/10.3390/ma13010166 - 01 Jan 2020

Cited by 79 | Viewed by 10009

Abstract

Neuromorphic computing has emerged as one of the most promising paradigms to overcome the limitations of von Neumann architecture of conventional digital processors. The aim of neuromorphic computing is to faithfully reproduce the computing processes in the human brain, thus paralleling its outstanding energy efficiency and compactness. Toward this goal, however, some major challenges have to be faced. Since the brain processes information by high-density neural networks with ultra-low power consumption, novel device concepts combining high scalability, low-power operation, and advanced computing functionality must be developed. This work provides an overview of the most promising device concepts in neuromorphic computing including complementary metal-oxide semiconductor (CMOS) and memristive technologies. First, the physics and operation of CMOS-based floating-gate memory devices in artificial neural networks will be addressed. Then, several memristive concepts will be reviewed and discussed for applications in deep neural network and spiking neural network architectures. Finally, the main technology challenges and perspectives of neuromorphic computing will be discussed. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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11 pages, 3993 KiB

Open AccessArticle

Multi-Terminal Transistor-Like Devices Based on Strongly Correlated Metallic Oxides for Neuromorphic Applications

by Alejandro Fernández-Rodríguez, Jordi Alcalà, Jordi Suñe, Narcis Mestres and Anna Palau

Materials 2020, 13(2), 281; https://doi.org/10.3390/ma13020281 - 08 Jan 2020

Cited by 3 | Viewed by 3015

Abstract

Memristive devices are attracting a great attention for memory, logic, neural networks, and sensing applications due to their simple structure, high density integration, low-power consumption, and fast operation. In particular, multi-terminal structures controlled by active gates, able to process and manipulate information in parallel, would certainly provide novel concepts for neuromorphic systems. In this way, transistor-based synaptic devices may be designed, where the synaptic weight in the postsynaptic membrane is encoded in a source-drain channel and modified by presynaptic terminals (gates). In this work, we show the potential of reversible field-induced metal-insulator transition (MIT) in strongly correlated metallic oxides for the design of robust and flexible multi-terminal memristive transistor-like devices. We have studied different structures patterned on YBa₂Cu₃O_7−δ films, which are able to display gate modulable non-volatile volume MIT, driven by field-induced oxygen diffusion within the system. The key advantage of these materials is the possibility to homogeneously tune the oxygen diffusion not only in a confined filament or interface, as observed in widely explored binary and complex oxides, but also in the whole material volume. Another important advantage of correlated oxides with respect to devices based on conducting filaments is the significant reduction of cycle-to-cycle and device-to-device variations. In this work, we show several device configurations in which the lateral conduction between a drain-source channel (synaptic weight) is effectively controlled by active gate-tunable volume resistance changes, thus providing the basis for the design of robust and flexible transistor-based artificial synapses. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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18 pages, 694 KiB

Open AccessArticle

On the Application of a Diffusive Memristor Compact Model to Neuromorphic Circuits

by Agustín Cisternas Ferri, Alan Rapoport, Pablo I. Fierens, German A. Patterson, Enrique Miranda and Jordi Suñé

Materials 2019, 12(14), 2260; https://doi.org/10.3390/ma12142260 - 13 Jul 2019

Cited by 4 | Viewed by 3553

Abstract

Memristive devices have found application in both random access memory and neuromorphic circuits. In particular, it is known that their behavior resembles that of neuronal synapses. However, it is not simple to come by samples of memristors and adjusting their parameters to change their response requires a laborious fabrication process. Moreover, sample to sample variability makes experimentation with memristor-based synapses even harder. The usual alternatives are to either simulate or emulate the memristive systems under study. Both methodologies require the use of accurate modeling equations. In this paper, we present a diffusive compact model of memristive behavior that has already been experimentally validated. Furthermore, we implement an emulation architecture that enables us to freely explore the synapse-like characteristics of memristors. The main advantage of emulation over simulation is that the former allows us to work with real-world circuits. Our results can give some insight into the desirable characteristics of the memristors for neuromorphic applications. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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14 pages, 2442 KiB

Open AccessArticle

Memristor-CMOS Hybrid Circuit for Temporal-Pooling of Sensory and Hippocampal Responses of Cortical Neurons

by Tien Van Nguyen, Khoa Van Pham and Kyeong-Sik Min

Materials 2019, 12(6), 875; https://doi.org/10.3390/ma12060875 - 15 Mar 2019

Cited by 7 | Viewed by 3029

Abstract

As a software framework, Hierarchical Temporal Memory (HTM) has been developed to perform the brain’s neocortical functions, such as spatial and temporal pooling. However, it should be realized with hardware not software not only to mimic the neocortical function but also to exploit its architectural benefit. To do so, we propose a new memristor-CMOS (Complementary Metal-Oxide-Semiconductor) hybrid circuit of temporal-pooling here, which is composed of the input-layer and output-layer neurons mimicking the neocortex. In the hybrid circuit, the input-layer neurons have the proximal and basal/distal dendrites to combine sensory information with the temporal/location information from the brain’s hippocampus. Using the same crossbar architecture, the output-layer neurons can perform a prediction by integrating the temporal information on the basal/distal dendrites. For training the proposed circuit, we used only simple Hebbian learning, not the complicated backpropagation algorithm. Due to the simple hardware of Hebbian learning, the proposed hybrid circuit can be very suitable to online learning. The proposed memristor-CMOS hybrid circuit has been verified by the circuit simulation using the real memristor model. The proposed circuit has been verified to predict both the ordinal and out-of-order sequences. In addition, the proposed circuit has been tested with the external noise and memristance variation. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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14 pages, 4088 KiB

Open AccessArticle

Bipolar Analog Memristors as Artificial Synapses for Neuromorphic Computing

by Rui Wang, Tuo Shi, Xumeng Zhang, Wei Wang, Jinsong Wei, Jian Lu, Xiaolong Zhao, Zuheng Wu, Rongrong Cao, Shibing Long, Qi Liu and Ming Liu

Materials 2018, 11(11), 2102; https://doi.org/10.3390/ma11112102 - 26 Oct 2018

Cited by 52 | Viewed by 6887

Abstract

Synaptic devices with bipolar analog resistive switching behavior are the building blocks for memristor-based neuromorphic computing. In this work, a fully complementary metal-oxide semiconductor (CMOS)-compatible, forming-free, and non-filamentary memristive device (Pd/Al₂O₃/TaO_x/Ta) with bipolar analog switching behavior is reported as an artificial synapse for neuromorphic computing. Synaptic functions, including long-term potentiation/depression, paired-pulse facilitation (PPF), and spike-timing-dependent plasticity (STDP), are implemented based on this device; the switching energy is around 50 pJ per spike. Furthermore, for applications in artificial neural networks (ANN), determined target conductance states with little deviation (<1%) can be obtained with random initial states. However, the device shows non-linear conductance change characteristics, and a nearly linear conductance change behavior is obtained by optimizing the training scheme. Based on these results, the device is a promising emulator for biology synapses, which could be of great benefit to memristor-based neuromorphic computing. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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17 pages, 2519 KiB

Open AccessArticle

Hybrid Circuit of Memristor and Complementary Metal-Oxide-Semiconductor for Defect-Tolerant Spatial Pooling with Boost-Factor Adjustment

by Tien Van Nguyen, Khoa Van Pham and Kyeong-Sik Min

Materials 2019, 12(13), 2122; https://doi.org/10.3390/ma12132122 - 01 Jul 2019

Cited by 11 | Viewed by 3088

Abstract

Hierarchical Temporal Memory (HTM) has been known as a software framework to model the brain’s neocortical operation. However, mimicking the brain’s neocortical operation by not software but hardware is more desirable, because the hardware can not only describe the neocortical operation, but can also employ the brain’s architectural advantages. To develop a hybrid circuit of memristor and Complementary Metal-Oxide-Semiconductor (CMOS) for realizing HTM’s spatial pooler (SP) by hardware, memristor defects such as stuck-at-faults and variations should be considered. For solving the defect problem, we first show that the boost-factor adjustment can make HTM’s SP defect-tolerant, because the false activation of defective columns are suppressed. Second, we propose a memristor-CMOS hybrid circuit with the boost-factor adjustment to realize this defect-tolerant SP by hardware. The proposed circuit does not rely on the conventional defect-aware mapping scheme, which cannot avoid the false activation of defective columns. For the Modified subset of National Institute of Standards and Technology (MNIST) vectors, the boost-factor adjusted crossbar with defects = 10% shows a rate loss of only ~0.6%, compared to the ideal crossbar with defects = 0%. On the contrary, the defect-aware mapping without the boost-factor adjustment demonstrates a significant rate loss of ~21.0%. The energy overhead of the boost-factor adjustment is only ~0.05% of the programming energy of memristor synapse crossbar. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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12 pages, 4661 KiB

Open AccessArticle

Three-Dimensional (3D) Vertical Resistive Random-Access Memory (VRRAM) Synapses for Neural Network Systems

by Wookyung Sun, Sujin Choi, Bokyung Kim and Junhee Park

Materials 2019, 12(20), 3451; https://doi.org/10.3390/ma12203451 - 22 Oct 2019

Cited by 12 | Viewed by 3310

Abstract

Memristor devices are generally suitable for incorporation in neuromorphic systems as synapses because they can be integrated into crossbar array circuits with high area efficiency. In the case of a two-dimensional (2D) crossbar array, however, the size of the array is proportional to the neural network’s depth and the number of its input and output nodes. This means that a 2D crossbar array is not suitable for a deep neural network. On the other hand, synapses that use a memristor with a 3D structure are suitable for implementing a neuromorphic chip for a multi-layered neural network. In this study, we propose a new optimization method for machine learning weight changes that considers the structural characteristics of a 3D vertical resistive random-access memory (VRRAM) structure for the first time. The newly proposed synapse operating principle of the 3D VRRAM structure can simplify the complexity of a neuron circuit. This study investigates the operating principle of 3D VRRAM synapses with comb-shaped word lines and demonstrates that the proposed 3D VRRAM structure will be a promising solution for a high-density neural network hardware system. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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25 pages, 4688 KiB

Open AccessArticle

Multiscale Modeling for Application-Oriented Optimization of Resistive Random-Access Memory

by Paolo La Torraca, Francesco Maria Puglisi, Andrea Padovani and Luca Larcher

Materials 2019, 12(21), 3461; https://doi.org/10.3390/ma12213461 - 23 Oct 2019

Cited by 17 | Viewed by 3334

Abstract

Memristor-based neuromorphic systems have been proposed as a promising alternative to von Neumann computing architectures, which are currently challenged by the ever-increasing computational power required by modern artificial intelligence (AI) algorithms. The design and optimization of memristive devices for specific AI applications is thus of paramount importance, but still extremely complex, as many different physical mechanisms and their interactions have to be accounted for, which are, in many cases, not fully understood. The high complexity of the physical mechanisms involved and their partial comprehension are currently hampering the development of memristive devices and preventing their optimization. In this work, we tackle the application-oriented optimization of Resistive Random-Access Memory (RRAM) devices using a multiscale modeling platform. The considered platform includes all the involved physical mechanisms (i.e., charge transport and trapping, and ion generation, diffusion, and recombination) and accounts for the 3D electric and temperature field in the device. Thanks to its multiscale nature, the modeling platform allows RRAM devices to be simulated and the microscopic physical mechanisms involved to be investigated, the device performance to be connected to the material’s microscopic properties and geometries, the device electrical characteristics to be predicted, the effect of the forming conditions (i.e., temperature, compliance current, and voltage stress) on the device’s performance and variability to be evaluated, the analog resistance switching to be optimized, and the device’s reliability and failure causes to be investigated. The discussion of the presented simulation results provides useful insights for supporting the application-oriented optimization of RRAM technology according to specific AI applications, for the implementation of either non-volatile memories, deep neural networks, or spiking neural networks. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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18 pages, 5466 KiB

Open AccessArticle

Self-Organizing Neural Networks Based on OxRAM Devices under a Fully Unsupervised Training Scheme

by Marta Pedró, Javier Martín-Martínez, Marcos Maestro-Izquierdo, Rosana Rodríguez and Montserrat Nafría

Materials 2019, 12(21), 3482; https://doi.org/10.3390/ma12213482 - 24 Oct 2019

Cited by 12 | Viewed by 3521

Abstract

A fully-unsupervised learning algorithm for reaching self-organization in neuromorphic architectures is provided in this work. We experimentally demonstrate spike-timing dependent plasticity (STDP) in Oxide-based Resistive Random Access Memory (OxRAM) devices, and propose a set of waveforms in order to induce symmetric conductivity changes. An empirical model is used to describe the observed plasticity. A neuromorphic system based on the tested devices is simulated, where the developed learning algorithm is tested, involving STDP as the local learning rule. The design of the system and learning scheme permits to concatenate multiple neuromorphic layers, where autonomous hierarchical computing can be performed. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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11 pages, 2956 KiB

Open AccessArticle

Robust Memristor Networks for Neuromorphic Computation Applications

by Dániel Hajtó, Ádám Rák and György Cserey

Materials 2019, 12(21), 3573; https://doi.org/10.3390/ma12213573 - 31 Oct 2019

Cited by 6 | Viewed by 2706

Abstract

One of the main obstacles for memristors to become commonly used in electrical engineering and in the field of artificial intelligence is the unreliability of physical implementations. A non-uniform range of resistance, low mass-production yield and high fault probability during operation are disadvantages of the current memristor technologies. In this article, the authors offer a solution for these problems with a circuit design, which consists of many memristors with a high operational variance that can form a more robust single memristor. The proposition is confirmed by physical device measurements, by gaining similar results as in previous simulations. These results can lead to more stable devices, which are a necessity for neuromorphic computation, artificial intelligence and neural network applications. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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9 pages, 2008 KiB

Open AccessArticle

Resistive Switching and Charge Transport in Laser-Fabricated Graphene Oxide Memristors: A Time Series and Quantum Point Contact Modeling Approach

by N. Rodriguez, D. Maldonado, F. J. Romero, F. J. Alonso, A. M. Aguilera, A. Godoy, F. Jimenez-Molinos, F. G. Ruiz and J. B. Roldan

Materials 2019, 12(22), 3734; https://doi.org/10.3390/ma12223734 - 13 Nov 2019

Cited by 11 | Viewed by 2642

Abstract

This work investigates the sources of resistive switching (RS) in recently reported laser-fabricated graphene oxide memristors by means of two numerical analysis tools linked to the Time Series Statistical Analysis and the use of the Quantum Point Contact Conduction model. The application of both numerical procedures points to the existence of a filament connecting the electrodes that may be interrupted at a precise point within the conductive path, resulting in resistive switching phenomena. These results support the existing model attributing the memristance of laser-fabricated graphene oxide memristors to the modification of a conductive path stoichiometry inside the graphene oxide. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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12 pages, 2179 KiB

Open AccessArticle

A Parasitic Resistance-Adapted Programming Scheme for Memristor Crossbar-Based Neuromorphic Computing Systems

by Son Ngoc Truong

Materials 2019, 12(24), 4097; https://doi.org/10.3390/ma12244097 - 08 Dec 2019

Cited by 5 | Viewed by 2755

Abstract

Memristor crossbar arrays without selector devices, such as complementary-metal oxide semiconductor (CMOS) devices, are a potential for realizing neuromorphic computing systems. However, wire resistance of metal wires is one of the factors that degrade the performance of memristor crossbar circuits. In this work, we propose a wire resistance modeling method and a parasitic resistance-adapted programming scheme to reduce the impact of wire resistance in a memristor crossbar-based neuromorphic computing system. The equivalent wire resistances for the cells are estimated by analyzing the crossbar circuit using the superposition theorem. For the conventional programming scheme, the connection matrix composed of the target memristance values is used for crossbar array programming. In the proposed parasitic resistance-adapted programming scheme, the connection matrix is updated before it is used for crossbar array programming to compensate the equivalent wire resistance. The updated connection matrix is obtained by subtracting the equivalent connection matrix from the original connection matrix. The circuit simulations are performed to test the proposed wire resistance modeling method and the parasitic resistance-adapted programming scheme. The simulation results showed that the discrepancy of the output voltages of the crossbar between the conventional wire resistance modeling method and the proposed wire resistance modeling method is as low as 2.9% when wire resistance varied from 0.5 to 3.0 Ω. The recognition rate of the memristor crossbar with the conventional programming scheme is 99%, 95%, 81%, and 65% when wire resistance is set to be 1.5, 2.0, 2.5, and 3.0 Ω, respectively. By contrast, the memristor crossbar with the proposed parasitic resistance-adapted programming scheme can maintain the recognition as high as 100% when wire resistance is as high as 3.0 Ω. Full article

(This article belongs to the Special Issue Memristors for Neuromorphic Circuits and Artificial Intelligence Applications)

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