Search Results (37)

This study introduces an enhancement-mode AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) featuring a self-aligned p-GaN gate structure, fabricated using a gate-first process. The key innovation of this work lies in simplifying the fabrication process by utilizing gate metallization for both electrical contact and etching mask functions, enabling precise self-alignment. A highly selective Cl₂/N₂/O₂ inductively coupled plasma (ICP) etching process was optimized to etch the p-GaN layer in the access regions, with a selectivity ratio of 33:1 and minimal damage to the AlGaN barrier. Additionally, a novel, non-annealed ohmic contact formation technique was developed, leveraging ICP etching to create nitrogen vacancies that facilitate contact formation without requiring thermal annealing. This technique streamlines the process by combining ohmic contact formation and mesa isolation into a single lithographic step. Incorporating a SiNx gate dielectric layer led to a 4.5 V threshold voltage shift in the fabricated devices. The resulting devices exhibited improved electrical performance, including a wide gate voltage swing (>10 V), a high on/off current ratio (~10⁷), and clear pinch-off characteristics. These results demonstrate the effectiveness of the proposed fabrication approach, offering significant improvements in process efficiency and manufacturability. Full article

This study employed low-pressure chemical vapor deposition (LPCVD) SiN_x as both the gate dielectric layer and surface passivation layer, systematically investigating the effects of different growth conditions on the dielectric layer quality, two-dimensional electron gas (2DEG) characteristics, interface trap density, and devices’ performance, thereby optimizing the growth parameters of LPCVD SiN_x. The experiment investigated the effects of growth parameters such as the growth temperature, chamber pressure, and gas flow ratio on the growth rate of SiN_x during the process of growing SiN_x using the LPCVD technique. Further studies were performed to analyze the impact of SiN_x introduction on the 2DEG performance. The results indicated that both Si-rich and N-rich SiN_x compositions could enhance the 2DEG density improvement induced by SiN_x passivation. The impact of the gas flow ratio on the interface trap density is studied. Through the quantitative characterization of the interface trap density using the pulse-mode I_DS-V_GS method and frequency-dependent capacitance–voltage (C-V) measurement, the results show that the interface trap density decreases with an increased Si-to-N ratio. Full article

With the growing demand for more efficient power conversion and silicon reaching its theoretical limit, wide bandgap semiconductor devices are emerging as a potential solution. For instance, Gallium Nitride (GaN)-based high-electron-mobility transistors (HEMTs) are getting more attention, and several structures for the normally off operation have been proposed. Adding an AlN interlayer in conventional AlGaN/GaN normally on HEMT structures is known to enhance the current density. In this work, the effect of an AlN interlayer in the normally off AlGaN/GaN MISHEMT with a buried p-region was investigated using a TCAD simulation from Silvaco. The added AlN interlayer increases the two-dimensional electron gas density, requiring a higher p-doping concentration to achieve the same threshold voltage. The simulation results show that the overall effect is a reduction in the device’s current density and peak transconductance by 21.83% and 44.4%, respectively. Further analysis of the current profile shows that because of the buried p-region and at high gate voltages, the current flows near the AlGaN/GaN interface and along the insulator/AlGaN interface. Adding an AlN interface blocks the migration of channel electrons to the insulator/AlGaN interface, resulting in a lower current density. Full article

Devices under semi-on-state stress often suffer from more severe current collapse than when they are in the off-state, which causes an increase in dynamic on-resistance. Therefore, characterization of the trap states is necessary. In this study, temperature-dependent transient recovery current analysis determined a trap energy level of 0.08 eV under semi-on-state stress, implying that interface traps are responsible for current collapse. Multi-frequency capacitance–voltage (C-V) testing was performed on the MIS diode, calculating that interface trap density is in the range of $1.37\times {10}^{13}$ to $6.07\times {10}^{12}$${\mathrm{cm}}^{-2}$${\mathrm{eV}}^{-1}$ from $E_C-E_T=0.29$ eV to 0.45 eV. Full article

A comprehensive study of proton irradiation reliability on a bilayer dielectrics SiN_x/Al₂O₃ MIS-HEMT, the common Schottky gate HEMT, and a single dielectric layer MIS-HEMT with SiN_x and with Al₂O₃ for comparison is conducted in this paper. Combining the higher displacement threshold energy of Al₂O₃ with the better surface passivation of the SiN_x layer, the bilayer dielectrics MIS-HEMT presents much smaller degradation of structural materials and of device electrical performance after proton irradiation. Firstly, the least of the defects caused by irradiation suggesting the smallest structural material degradation is observed in the bilayer dielectrics MIS-HEMT through simulations. Then, DC and RF electrical performance of four kinds of devices before and after proton irradiation are studied through simulation and experiments. The smallest threshold voltage degradation rate, the smallest maximum on-current degradation and Gm degradation, the largest cut-off frequency, and the lowest cut-off frequency degradation are found in the bilayer dielectrics MIS-HEMT among four kinds of devices. The degradation results of both structural materials and electrical performance reveal that the bilayer dielectrics MIS-HEMT performs best after irradiation and had better radiation resilience. Full article

The V_th stability and gate reliability of AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) with alternating O₂ plasma treatment were systematically investigated in this article. It was found that the conduction band offset at the Al₂O₃/AlGaN interface was elevated to 2.4 eV, which contributed to the suppressed gate leakage current. The time-dependent dielectric breakdown (TDDB) test results showed that the ALD-Al₂O₃ with the alternating O₂ plasma treatment had better quality and reliability. The AlGaN/GaN MIS-HEMT with the alternating O₂ plasma treatment demonstrated remarkable advantages in higher V_th stability under high-temperature and long-term gate bias stress. Full article

This article presents the utilization of the chemical–mechanical polishing (CMP) method to fabricate high-performance N-polar GaN/AlGaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) through layer transfer technology. The nucleation and buffer layers were removed via CMP to attain a pristine N-polar GaN surface with elevated smoothness, featuring a low root-mean-square (RMS) roughness of 0.216 nm. Oxygen, carbon, and chlorine impurity elements content were low after the CMP process, as detected via X-ray photoelectron spectroscopy (XPS). The electrical properties of N-polar HEMTs fabricated via CMP exhibited a sheet resistance (R_sh) of 244.7 Ω/sq, a mobility of 1230 cm²/V·s, and an n_s of 2.24 × 10¹³ cm⁻². Compared with a counter device fabricated via inductively coupled plasma (ICP) dry etching, the CMP devices showed an improved output current of 756.1 mA/mm, reduced on-resistance of 6.51 Ω·mm, and a significantly reduced subthreshold slope mainly attributed to the improved surface conditions. Meanwhile, owing to the MIS configuration, the reverse gate leakage current could be reduced to as low as 15 μA/mm. These results highlight the feasibility of the CMP-involved epitaxial layer transfer (ELT) technique to deliver superior N-polar GaN MIS-HEMTs for power electronic applications. Full article

In this paper, the degradation behaviors of the ferroelectric gate Gallium nitride (GaN) high electron mobility transistor (HEMT) under positive gate bias stress are discussed. Devices with a gate dielectric that consists of pure Pb(Zr,Ti)O₃ (PZT) and a composite PZT/Al₂O₃ bilayer are studied. Two different mechanisms, charge trapping and generation of traps, both contribute to the degradation. We have observed positive threshold voltage shift in both kinds of devices under positive gate bias stress. In the devices with a PZT gate oxide, we have found the degradation is owing to electron trapping in pre-existing oxide traps. However, the degradation is caused by electron trapping in pre-existing oxide traps and the generation of traps for the devices with a composite PZT/Al₂O₃ gate oxide. Owing to the large difference in dielectric constants between PZT and Al₂O₃, the strong electric field in the Al₂O₃ interlayer makes PZT/Al₂O₃ GaN HEMT easier to degrade. In addition, the ferroelectricity in PZT enhances the electric field in Al₂O₃ interlayer and leads to more severe degradation. According to this study, it is worth noting that the reliability problem of the ferroelectric gate GaN HEMT may be more severe than the conventional metal–insulator–semiconductor HEMT (MIS-HEMT). Full article

GaN devices are nowadays attracting global attention due to their outstanding performance in high voltage, high frequency, and anti-radiation ability. Research on total ionizing dose and annealing effects on E-mode GaN Cascode devices has been carried out. The Cascode device consists of a low-voltage MOSFET and a high-voltage depletion-mode GaN MISHEMT. Cascode devices of both conventional processed MOSFET and radiation-hardened MOSFET devices are fabricated to observe the TID effects. Experiment results indicate that, for the Cascode device with conventional processed MOSFET, the V_TH shifts to negative values at 100 krad(Si). For the Cascode device with radiation-hardened MOSFET, the V_TH shifts by −0.5 V at 100 krad(Si), while shifts to negative values are 500 krad(Si). The annealing process, after the TID experiment, shows that it can release trapped charges and help V_TH recover. On one hand, the V_TH shift and recover trends are similar to those of a single MOSFET device, suggesting that the MOSFET is the vulnerable part in the Cascode which determines the anti-TID ability of the device. On the other hand, the V_TH shift amount of the Cascode device is much larger than that of a previously reported p-GaN HEMT device, indicating that GaN material shows a better anti-TID ability than Si. Full article

A typical method for normally-off operation, the metal–insulator–semiconductor-high electron mobility transistor (MIS-HEMT) has been investigated. Among various approaches, gate recessed MIS-HEMT have demonstrated a high gate voltage sweep and low leakage current characteristics. Despite their high performance, obtaining low-damage techniques in gate recess processing has so far proven too challenging. In this letter, we demonstrate a high current density and high breakdown down voltage of a MIS-HEMT with a recessed gate by the low damage gate recessed etching of atomic layer etching (ALE) technology. After the remaining 3.7 nm of the AlGaN recessed gate was formed, the surface roughness (Ra of 0.40 nm) was almost the same as the surface without ALE (no etching) as measured by atomic force microscopy (AFM). Furthermore, the devices demonstrate state-of-the-art characteristics with a competitive maximum drain current of 608 mA/mm at a V_G of 6 V and a threshold voltage of +2.0 V. The devices also show an on/off current ratio of 10⁹ and an off-state hard breakdown voltage of 1190 V. The low damage of ALE technology was introduced into the MIS-HEMT with the recessed gate, which effectively reduced trapping states at the interface to obtain the low on-resistance (R_on) of 6.8 Ω·mm and high breakdown voltage performance. Full article

A systematic study of epi-AlGaN/GaN on a SiC substrate was conducted through a comprehensive analysis of material properties and device performance. In this novel epitaxial design, an AlGaN/GaN channel layer was grown directly on the AlN nucleation layer, without the conventional doped thick buffer layer. Compared to the conventional epi-structures on the SiC and Si substrates, the non-buffer epi-AlGaN/GaN structure had a better crystalline quality and surface morphology, with reliable control of growth stress. Hall measurements showed that the novel structure exhibited comparable transport properties to the conventional epi-structure on the SiC substrate, regardless of the buffer layer. Furthermore, almost unchanged carrier distribution from room temperature to 150 °C indicated excellent two-dimensional electron gas (2DEG) confinement due to the pulling effect of the conduction band from the nucleation layer as a back-barrier. High-performance depletion-mode MIS-HEMTs were demonstrated with on-resistance of 5.84 Ω·mm and an output current of 1002 mA/mm. The dynamic characteristics showed a much smaller decrease in the saturation current (only ~7%), with a quiescent drain bias of 40 V, which was strong evidence of less electron trapping owing to the high-quality non-buffer AlGaN/GaN epitaxial growth. Full article

In this work, we demonstrated a low current collapse normally on Al₂O₃/AlGaN/GaN MIS-HEMT with in situ H-radical surface treatment on AlGaN. The in situ atomic pretreatment was performed in a specially designed chamber prior to the thermal ALD-Al₂O₃ deposition, which improved the Al₂O₃/AlGaN interface with ${\mathrm{D}}_{\mathrm{i}\mathrm{t}}$ of ~2 × 10¹² cm⁻² eV⁻¹, and thus effectively reduced the current collapse and the dynamic ${\mathrm{R}}_{\mathrm{o}\mathrm{n}}$ degradation. The devices showed good electrical performance with low ${\mathrm{V}}_{\mathrm{t}\mathrm{h}}$ hysteresis and peak trans-conductance of 107 mS/mm. Additionally, when the devices operated under 25 °C pulse-mode stress measurement with ${\mathrm{V}}_{\mathrm{D}\mathrm{S},\mathrm{Q}}$ = 40 V (period of 1 ms, pulse width of 1 $\mathsf{\mu }$s), the dynamic ${\mathrm{R}}_{\mathrm{o}\mathrm{n}}$ increase of ~14.1% was achieved. Full article

In this paper, we compared the characteristics of normally-on/off AlGaN/GaN MISHEMTs passivated by an in situ/ex situ SiN layer. The devices passivated by the in situ SiN layer revealed enhanced DC characteristics, such as the drain current of 595 mA/mm (normally-on) and 175 mA/mm (normally-off) with the high on/off current ratio of ~10⁷, respectively, compared with those of the devices passivated by the ex situ SiN layer. The MISHEMTs passivated by the in situ SiN layer also exhibited a much lower increase of dynamic on-resistance (R_ON) of 4.1% for the normally-on device and 12.8% for the normally-off device, respectively. Furthermore, the breakdown characteristics are greatly improved by employing the in situ SiN passivation layer, suggesting that the in situ SiN passivation layer can remarkably not only suppress the surface-trapping effects, but also decrease the off-state leakage current in the GaN-based power devices. Full article

A novel monocrystalline AlN interfacial layer formation method is proposed to improve the device performance of the fully recessed-gate Al₂O₃/AlN/GaN Metal-Insulator-Semiconductor High Electron Mobility Transistors (MIS-HEMTs), which is achieved by plasma-enhanced atomic layer deposition (PEALD) and in situ N₂ plasma annealing (NPA). Compared with the traditional RTA method, the NPA process not only avoids the device damage caused by high temperatures but also obtains a high-quality AlN monocrystalline film that avoids natural oxidation by in situ growth. As a contrast with the conventional PELAD amorphous AlN, C-V results indicated a significantly lower interface density of states (D_it) in a MIS C-V characterization, which could be attributed to the polarization effect induced by the AlN crystal from the X-ray Diffraction (XRD) and Transmission Electron Microscope (TEM) characterizations. The proposed method could reduce the subthreshold swing, and the Al₂O₃/AlN/GaN MIS-HEMTs were significantly enhanced with ~38% lower on-resistance at V_g = 10 V. What is more, in situ NPA provides a more stable threshold voltage (V_th) after a long gate stress time, and ΔV_th is inhibited by about 40 mV under V_g,stress = 10 V for 1000 s, showing great potential for improving Al₂O₃/AlN/GaN MIS-HEMT gate reliability. Full article

GaN high-electron-mobility transistors (HEMTs) have attracted widespread attention for high-power microwave applications, owing to their superior properties. However, the charge trapping effect has limitations to its performance. To study the trapping effect on the device large-signal behavior, AlGaN/GaN HEMTs and metal-insulator-semiconductor HEMTs (MIS-HEMTs) were characterized through X-parameter measurements under ultraviolet (UV) illumination. For HEMTs without passivation, the magnitude of the large-signal output wave (${\mathrm{X}}_{21}^{\mathrm{FB}}$) and small-signal forward gain (${\mathrm{X}}_{2111}^{\mathrm{S}}$) at fundamental frequency increased, whereas the large-signal second harmonic output wave (${\mathrm{X}}_{22}^{\mathrm{FB}}$) decreased when the device was exposed to UV light, resulting from the photoconductive effect and suppression of buffer-related trapping. For MIS-HEMTs with SiN passivation, much higher ${\mathrm{X}}_{21}^{\mathrm{FB}}$ and ${\mathrm{X}}_{2111}^{\mathrm{S}}$ have been obtained compared with HEMTs. It suggests that better RF power performance can be achieved by removing the surface state. Moreover, the X-parameters of the MIS-HEMT are less dependent on UV light, since the light-induced performance enhancement is offset by excess traps in the SiN layer excited by UV light. The radio frequency (RF) power parameters and signal waveforms were further obtained based on the X-parameter model. The variation of RF current gain and distortion with light was consistent with the measurement results of X-parameters. Therefore, the trap number in the AlGaN surface, GaN buffer, and SiN layer must be minimized for a good large-signal performance of AlGaN/GaN transistors. Full article